JPH10334126A - Wiring compaction method and device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the need of complicated calculation relating to an oblique part and to accelerate a processing speed by executing compaction after replacing oblique wiring with horizontal or vertical wiring beforehand. SOLUTION: For layout data including the oblique wiring, the oblique wiring is replaced with the temporary wiring of 90 deg.. Then, to a wiring part replaced to 90 deg., information referable at the time of restoration is added. Then, a compaction processing of the wiring to which a change processing to 90 deg. is performed is executed. At the time of the compaction processing, a file 14 storing information relating to the design rules of a wiring interval or the like is referred to. Thereafter, for the layout data whose compaction is ended, the oblique wiring is restored corresponding to the previously added information. Thus, even in a wiring pattern including the oblique part, the compaction is executed without substantially increasing the processing procedure of a program. As a result, a minimum chip size is realized in a short time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compaction method for layout, and more particularly to a compaction method for minimizing the area of a wiring portion of a layout pattern of a semiconductor IC.

[0002]

2. Description of the Related Art In a semiconductor LSI, since the chip size greatly affects the manufacturing cost, it is necessary to reduce the chip size as much as possible. In particular, in a product such as a memory IC that produces a small number of products in large quantities, it is required to reduce the chip size to the limit.

In the case of a memory IC, it is necessary to reduce the manufacturing process as much as the chip size in order to reduce the manufacturing cost. For this reason, in many cases, a design method generally called a 1.5-layer wiring using polysilicon as a first layer wiring material and a metal material such as aluminum as a second layer wiring material is used.

In the layout design method of the 1.5-layer wiring, an element arrangement region in which elements such as transistors, capacitors, and resistors are arranged is clearly distinguished from an interconnection region in which wiring for connecting elements is arranged. Is done.

[0005] In a product such as a memory IC which requires a minimum manufacturing cost, oblique wiring is often used in a wiring area in order to minimize the layout area when such a layout method is adopted.

The reason why the oblique wiring is used is that, as shown in FIGS. 6 and 7, by making the bent part of the wiring oblique as compared with forming the bent part of the wiring at an angle of 90 °, as shown in FIGS. This is because the area can be reduced.

When FIG. 6 and FIG. 7 are compared, the area of the bent region 63 when the oblique wiring is used and the area of the bent region 73 when the 90 ° wiring is used are approximately the same when the layout is formed by the 90 ° wiring. The area is increased by 10%. The difference in area between the case where the wiring region is laid out with diagonal wiring and the case where the wiring region is laid out with 90 ° wiring becomes more remarkable as the number of wirings increases. In particular, in recent semiconductor ICs, the number of wirings is steadily increasing with an increase in the degree of integration, and this difference in the area significantly affects the chip area.

In recent years, in semiconductor ICs, development competition has become fierce than ever, and it is necessary to shorten the development period of new products.

In order to shorten the development period, the layout design period is shortened by an automatic design program. Among them, a program called compaction is effective in shortening the design period and reducing the chip area. It is.

FIG. 8 shows an example of a conventional diagonal wiring compaction procedure. Here, in order to show a basic procedure, a wiring 81 serving as a reference for compaction is shown.
In addition, a description will be given using only two wiring patterns of the wiring 82 to be compacted.

The wiring 82 to be compacted is composed of two horizontal parts 83 and 85 and one diagonal wiring part 84.

In the first step, compaction of the line segment 83 at the left end in FIG. Here, the line segment 83 to be compacted is moved in the Y-axis direction so as to have the wiring interval described in the design standard. At this time, the right end coordinates of the line segment 83 indicate the connection state with the oblique line segment 84. Since it is necessary to save the coordinates, it is necessary to calculate the intersection of the coordinate after the movement and the extension of the oblique line segment 83. As a result, the wiring pattern shown in FIG.

In the second step, compaction of the oblique line segment 84 is performed. At this time, since the wiring interval is the interval between the oblique wirings, if the wiring angle is 45 ° and the wiring interval is D, the wiring interval in the Y-axis direction is (√2) D,
The coordinate movement of the oblique line segment 83 is performed so as to be at this interval. However, since the wiring in the normal layout design is defined by the center coordinates, the calculation of the coordinates of the apexes at both ends of the oblique wiring becomes complicated. As a result of this compaction, FIG.
The wiring pattern shown in FIG.

In the third step, compaction of the right end line segment 85 is executed. The processing in this step is basically the same as the processing in the first step. As a result, the wiring pattern shown in FIG. 8D is finally obtained.

[0015]

In the conventional compaction method, as described above, when compacting an oblique portion, the calculation of the vertex coordinates for each line segment of the wiring becomes complicated and the calculation time is required. there were.

[0016]

SUMMARY OF THE INVENTION The present invention proposes a compaction method for oblique wiring in order to solve the above-mentioned problems.

In the compaction method of the present invention,
When compacting a wiring area including diagonal wiring, compaction is performed after replacing diagonal wiring with horizontal or vertical wiring in advance, so that the above-described complicated calculation relating to diagonal parts is not required, and processing speed can be improved.

[0018]

FIG. 1 shows the flow of a compaction method according to the present invention. Hereinafter, the procedure of the process will be described along the flow of the figure. For layout data including diagonal wiring, replace diagonal wiring with temporary wiring of 90 ° (1
1). Subsequently, information that can be referred to at the time of restoration is added to the wiring part replaced by 90 ° in 11 (12). A compaction process is performed on the wiring that has been changed to 90 ° (13). At the time of this compaction processing, a file 14 storing information on design rules such as wiring intervals is referred to. Thereafter, the oblique wiring is restored according to the information added in step 12 with respect to the layout data for which compaction has been completed (15). Here, there is no problem even if the procedure of replacing the oblique wiring 11 with the temporary wiring and adding the information 12 is reversed.

FIG. 2 shows a minimum system configuration equipped with the compaction method of the present invention. The main controller 21 reads a program for performing compaction and the like stored in the magnetic disk device 24 and data to be processed into the main storage device 25 in accordance with control signals from the keyboard 22 and the mouse 23.

The read program similarly reads the design reference file stored in the magnetic disk drive 24 for the data to be processed, and performs compaction based on the minimum wiring interval described in this file.

The graphic display 26 is used to display the state of data before and after compaction processing, the state of execution of processing, and the like.

Here, although not shown because they are not essential, data to be processed, programs, design reference data, etc. are read from a network to which the present apparatus is connected.
It is also possible to write the processing result.

[0023]

FIG. 3 is a layout diagram showing details of compaction in the vertical (Y-axis) direction as an embodiment of the compaction method of the present invention. Here, since the purpose is to show the basic configuration of the present invention, an example in which three horizontal wirings partially including diagonal line segments are compacted will be described.

FIG. 3A shows wiring data before compaction. Here, in order to compact the diagonal portion of the wiring, the diagonal portion is first replaced with a vertical temporary wiring.

FIG. 4 shows details of replacement with temporary wiring.
Here, two vertices of the line segment of the oblique wiring are represented by (X1, Y
If (1), (X2, Y2) are used, the wiring is replaced with a vertical wiring passing through the midpoint of these two vertices. That is, the right end coordinate of the first horizontal wiring portion is ((X2−X1) / 2, Y1)
To the left end of the second horizontal wiring portion in the same manner ((X
2-X1) / 2, Y2). The diagonal wiring is connected in such a manner as to connect the two extended vertices, thereby obtaining a temporary wiring having a desired shape. At this time, an attribute for restoring the diagonal wiring after compaction is added to the temporary wiring at the same time. As a result of the above processing, as shown in FIG. 3B, wiring shape data consisting of only horizontal and vertical components is formed.

Thereafter, compaction is performed based on the minimum wiring interval dimension described in the design standard file. As a result of the compaction, data is formed so as to satisfy the design criteria and have a minimum area in the Y-axis direction as shown in FIG.

After the compaction process is completed, the original slant state is restored based on the information added to the temporary wiring. FIG. 3D shows this state.

FIG. 5 is a layout drawing showing the flow of compaction processing in the horizontal (X-axis) direction as a second embodiment of the compaction method of the present invention. Here, as in the first embodiment, the description will be made with an example in which three horizontal wirings partially including oblique line segments are compacted.

FIG. 5A shows wiring data before compaction. Here, in order to compact the diagonal portion of the wiring, the diagonal portion is first replaced with a vertical temporary wiring. The replacement of the oblique wiring portion is performed in the same manner as in the compaction in the vertical direction. FIG. 5B shows the drawing after replacement. Thereafter, compaction in the horizontal direction is performed based on the minimum wiring interval dimension described in the design standard file. However, when compaction is performed on wirings that are initially slanted, compaction is performed with a size different from the minimum wiring spacing calculated from the minimum wiring spacing described in the design reference file.

In this embodiment, assuming that the minimum wiring interval dimension described in the design standard file is D and the wiring width is W, compaction is performed so that the center interval of the wiring becomes a dimension calculated by (D + W) / √2. carry out.

As a result of the compaction, as shown in FIG. 5C, a wiring pattern having a wiring interval based on the calculated dimensions is formed.

Thereafter, based on the information added to the wiring line segments, the wiring line segments that were initially slanted are restored to a slanted pattern. The resulting pattern is shown in FIG.
As a result, a wiring pattern compacted to the minimum wiring interval dimension D described in the design standard file is created even in the diagonal part of the wiring.

[0033]

As described above, by using the present invention, compaction can be performed without significantly increasing the program processing procedure even in a wiring pattern including an oblique portion, and as a result, the minimum chip size can be reduced. This can be realized in a short time.

[Brief description of the drawings]

FIG. 1 is a flowchart of a compaction method of the present invention.

FIG. 2 is a block diagram showing an example of a compaction device equipped with the compaction method of the present invention.

FIG. 3 is a layout diagram showing a procedure of compaction in a Y direction.

FIG. 4 is a diagram showing details of replacement of diagonal wiring with temporary wiring.

FIG. 5 is a layout diagram showing a procedure of compaction in the X direction.

FIG. 6 is a layout diagram using oblique wiring.

FIG. 7 is a layout diagram without using oblique wiring.

FIG. 8 is a diagram showing a conventional compaction procedure for oblique wiring.

Claims (6)

[Claims] When performing compaction at a minimum interval described in a design standard for a plurality of wirings including a part at an angle different from the horizontal or the vertical to be wired in parallel, the wiring part at an angle different from the horizontal or the vertical. After performing compaction after changing to a horizontal or vertical temporary wiring, and restoring the temporary wiring to the original angle after compaction is completed,
Wiring compaction method. 2. A method according to claim 1, wherein information indicating that the original wiring is oblique is added to the oblique wiring data before compaction is performed on the oblique wiring, and the oblique wiring is restored based on the additional information after compaction. The wiring compaction method according to claim 1, wherein: 3. The wiring compaction method according to claim 1, wherein a temporary wiring is arranged at a middle point of the diagonal wiring when changing the diagonal wiring to a horizontal or vertical temporary wiring. 4. When compacting diagonal wires that are tentatively wired vertically or horizontally, compaction is performed at intervals different from the minimum wiring interval calculated from the minimum wiring interval determined based on the design standard. The wiring compaction method according to claim 1, wherein the method is performed. 5. A compaction device equipped with the compaction method according to claim 1. 6. A recording medium on which the program according to claim 1, 2, 3, 4, or 5 is mounted.