JPH0695356A - Formation of data for mask - Google Patents

Formation of data for mask

Info

Publication number
JPH0695356A
JPH0695356A JP24767092A JP24767092A JPH0695356A JP H0695356 A JPH0695356 A JP H0695356A JP 24767092 A JP24767092 A JP 24767092A JP 24767092 A JP24767092 A JP 24767092A JP H0695356 A JPH0695356 A JP H0695356A
Authority
JP
Japan
Prior art keywords
data
pattern
mask
layout data
exposure mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24767092A
Other languages
Japanese (ja)
Other versions
JP2828372B2 (en
Inventor
Yasushi Kubota
靖 久保田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP24767092A priority Critical patent/JP2828372B2/en
Publication of JPH0695356A publication Critical patent/JPH0695356A/en
Application granted granted Critical
Publication of JP2828372B2 publication Critical patent/JP2828372B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To form data for an exposure mask in a short period of time. CONSTITUTION:The layout data 2 is formed by making the data smaller by a prescribed quantity (for example, 0.2mum) than the pattern size 1 of a semiconductor element to be produced. As a result, the data (set at the size to offset the pattern shift in an actual stage) of the mask for exposure is resized and formed in the direction of expanding the layout data 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明はマスク用データ作成方
法に関する。より詳しくは、半導体製造分野でフォトリ
ソグラフィに用いられる露光マスクのデータを作成する
方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mask data creating method. More specifically, the present invention relates to a method of creating data of an exposure mask used for photolithography in the field of semiconductor manufacturing.

【0002】[0002]

【従来の技術】半導体製造プロセスでは、フォトリソグ
ラフィ工程における露光条件,解像性能などの制約か
ら、半導体素子が露光マスクのパターン(データ)通りに
仕上がらないことが多い。通常、−0.2μm〜+0.2
μmの範囲でパターンシフトが生ずる(マイナス符号はパ
ターンが縮小し、プラス符号はパターンが拡大すること
を表している)。そこで、このようなパターンシフトを
相殺するために、一般に、露光マスクのデータを予め拡
大または縮小する処理(リサイズ)が行なわれている。す
なわち、図2に示すように、実際の工程でパターンが縮
小する向きにシフトするときはプラス・リサイズを行う
一方、実際の工程でパターンが拡大する向きにシフトす
るときはマイナス・リサイズを行う。図中、11は作製
すべき半導体素子の寸法通りのレイアウトデータ、12
はプラス・リサイズ後のデータ、12′はマイナス・リ
サイズ後のデータをそれぞれ示している。
2. Description of the Related Art In a semiconductor manufacturing process, a semiconductor element is often not finished according to a pattern (data) of an exposure mask due to restrictions such as exposure conditions and resolution performance in a photolithography process. Normally, -0.2 μm to +0.2
A pattern shift occurs in the μm range (a minus sign indicates that the pattern shrinks, and a plus sign indicates that the pattern expands). Therefore, in order to cancel such a pattern shift, a process (resizing) of enlarging or reducing the exposure mask data is generally performed in advance. That is, as shown in FIG. 2, when the pattern is shifted in the actual process in the direction of shrinking, the plus resizing is performed, while when the pattern is shifted in the actual process in the direction of expanding, the minus resizing is performed. In the figure, 11 is layout data according to the dimensions of the semiconductor element to be manufactured, 12
Indicates data after plus resize, and 12 'indicates data after minus resize.

【0003】従来は、まず、作製すべき半導体素子の寸
法通りに全データを展開してレイアウトを行った後、こ
のレイアウトデータ11をリサイズして露光マスクのデ
ータ12または12′を作成している。この理由は、基
本単位となるセル毎にリサイズを行うものとすると、図
3に示すように、マイナス・リサイズを行ったとき、セ
ルとセルとの間に隙間21,…,23が生じて、本来つな
がるべきパターン12′が断線するおそれがあるからで
ある。
Conventionally, first, all data is developed according to the dimensions of a semiconductor element to be produced and a layout is performed, and then the layout data 11 is resized to produce exposure mask data 12 or 12 '. . The reason for this is that if resizing is performed for each cell that is a basic unit, as shown in FIG. 3, when minus resizing is performed, gaps 21, ..., 23 are generated between cells, This is because there is a risk that the pattern 12 'that should be originally connected may be broken.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、半導体
素子の高集積化が進んでいる状況下では、展開されたレ
イアウトデータ11が通常膨大な量になるため、上記従
来のマスク用データ作製方法ではリサイズ処理に膨大な
時間を要するという問題がある。
However, under the condition that the integration of semiconductor elements is highly advanced, the developed layout data 11 usually becomes a huge amount. There is a problem that a huge amount of time is required for processing.

【0005】そこで、この発明の目的は、露光マスクの
データを短時間で作製することができるマスク用データ
作成方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a mask data creating method capable of creating exposure mask data in a short time.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するた
め、この発明は、作製すべき半導体素子のパターン寸法
に応じてレイアウトデータを作成した後、上記レイアウ
トデータを実際の工程でのパターンシフトを相殺する寸
法にリサイズして露光用マスクのデータとするマスク用
データ作成方法において、上記レイアウトデータを、上
記作製すべき半導体素子のパターン寸法よりも所定量だ
け縮小して作成して、上記露光用マスクのデータが上記
レイアウトデータを拡大する向きにリサイズして作成さ
れるようにしたことを特徴としている。
In order to achieve the above object, according to the present invention, after layout data is created according to the pattern dimensions of a semiconductor element to be manufactured, the layout data is subjected to pattern shift in an actual process. In the mask data creating method of resize to an offset dimension to be used as exposure mask data, the layout data is created by reducing the layout data by a predetermined amount smaller than the pattern size of the semiconductor element to be created, It is characterized in that the mask data is created by resizing the layout data in a direction in which the layout data is enlarged.

【0007】[0007]

【作用】露光用マスクのデータが一旦作成したレイアウ
トデータを拡大する向きにリサイズして作成されるの
で、リサイズによって、本来つながるべきパターンが断
線するおそれがない。したがって、基本単位となるセル
毎にリサイズを行うことが可能となる。この場合、セル
単位でリサイズを行った後、得られたデータを単に合成
して使用することができる。したがって、データ処理量
が大幅に減少して、露光用マスクのデータが従来に比し
て短時間で作成される。特に、繰り返しパターンが多い
半導体記憶装置では効果が大きい。
Since the exposure mask data is resized in a direction in which the layout data once created is enlarged, there is no possibility that the patterns that should be connected should be disconnected due to the resizing. Therefore, it is possible to perform resizing for each cell that is a basic unit. In this case, after resizing in cell units, the obtained data can be simply combined and used. Therefore, the data processing amount is greatly reduced, and the data of the exposure mask is created in a shorter time than the conventional case. Particularly, the effect is great in a semiconductor memory device having many repeating patterns.

【0008】[0008]

【実施例】以下、この発明のマスク用データ作成方法を
実施例により詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The mask data creating method of the present invention will be described in detail below with reference to embodiments.

【0009】実際の露光工程では、露光マスクのパター
ンが拡大する向きに0.1μm、すなわち、+0.1μmの
パターンシフトが生ずるものとする。この場合、露光用
マスクは、上記パターンシフトを相殺するように、作製
すべき半導体素子のパターン寸法よりも0.1μmだけ縮
小した寸法に仕上げる必要がある。
In an actual exposure process, it is assumed that a pattern shift of 0.1 μm, that is, +0.1 μm occurs in the direction in which the pattern of the exposure mask expands. In this case, the exposure mask needs to be finished in a size reduced by 0.1 μm from the pattern size of the semiconductor element to be manufactured so as to cancel the pattern shift.

【0010】まず、図1に示すように、作製すべき半
導体素子のパターン1よりも0.2μmだけ縮小した寸法
のパターン(レイアウトデータ)2をレイアウトする。こ
のとき、当然ながら、基本となるセルとセルとを接続す
る。 次に、上記レイアウトデータ2を0.1μmだけプラス
・リサイズして露光用マスクのデータとする。
First, as shown in FIG. 1, a pattern (layout data) 2 having a size reduced by 0.2 μm from the pattern 1 of the semiconductor element to be manufactured is laid out. At this time, of course, the basic cells are connected to each other. Next, the layout data 2 is resized by 0.1 .mu.m to obtain exposure mask data.

【0011】このように、レイアウトデータ2をプラス
・リサイズして露光用マスクのデータを作成しているの
で、リサイズによって、本来つながるべきパターンが断
線するおそれがない。一方、露光用マスクを、作製すべ
き半導体素子のパターン寸法よりも拡大した寸法に仕上
げる必要がある場合も、プラス・リサイズの量が増大す
るだけであり、何ら問題はない。したがって、基本単位
となるセル毎にリサイズを行うことができる。この場
合、セル単位でリサイズを行った後、得られたデータを
単に合成して使用することができる。したがって、デー
タ処理量を大幅に減少させることができ、この結果、露
光用マスクのデータを従来に比して短時間で作成するこ
とができる。特に、繰り返しパターンが多い半導体記憶
装置では効果が大きい。
As described above, since the layout data 2 is plus-resized to create the exposure mask data, there is no possibility that the patterns that should be connected should be disconnected due to the resizing. On the other hand, when it is necessary to finish the exposure mask to a size larger than the pattern size of the semiconductor element to be manufactured, the amount of plus resizing only increases, and there is no problem. Therefore, resizing can be performed for each cell that is a basic unit. In this case, after resizing in cell units, the obtained data can be simply combined and used. Therefore, the amount of data processing can be greatly reduced, and as a result, the data of the exposure mask can be created in a shorter time than the conventional case. Particularly, the effect is great in a semiconductor memory device having many repeating patterns.

【0012】[0012]

【発明の効果】以上より明らかなように、この発明のマ
スク用データ作成方法は、まず、作製すべき半導体素子
のパターン寸法よりも所定量だけ縮小してレイアウトデ
ータを作成し、続いて、上記レイアウトデータを拡大す
る向きにリサイズして露光用マスクのデータを作成して
いるので、基本単位となるセル毎にリサイズを行うこと
ができる。したがって、データ処理量を大幅に減少させ
ることができ、この結果、露光用マスクのデータを従来
に比して短時間で作成することができる。
As is apparent from the above, according to the mask data creating method of the present invention, the layout data is created by first reducing the pattern size of the semiconductor element to be manufactured by a predetermined amount, and then the above-mentioned Since the layout mask is resized in the direction of enlarging to create the exposure mask data, the resizing can be performed for each cell that is a basic unit. Therefore, the amount of data processing can be greatly reduced, and as a result, the data of the exposure mask can be created in a shorter time than the conventional case.

【図面の簡単な説明】[Brief description of drawings]

【図1】 この発明の一実施例のマスク用データ作成方
法を説明する図である。
FIG. 1 is a diagram illustrating a mask data creation method according to an embodiment of the present invention.

【図2】 従来のマスク用データ作成方法を説明する図
である。
FIG. 2 is a diagram illustrating a conventional mask data creation method.

【図3】 従来のマスク用データ作製方法の問題点を説
明する図である。
FIG. 3 is a diagram illustrating a problem of a conventional mask data production method.

【符号の説明】[Explanation of symbols]

1 作製すべき半導体素子のパターン 2 レイアウトデータ 3 露光用マスクのデータ 1 Pattern of semiconductor element to be produced 2 Layout data 3 Data of exposure mask

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 作製すべき半導体素子のパターン寸法に
応じてレイアウトデータを作成した後、上記レイアウト
データを実際の工程でのパターンシフトを相殺する寸法
にリサイズして露光用マスクのデータとするマスク用デ
ータ作成方法において、 上記レイアウトデータを、上記作製すべき半導体素子の
パターン寸法よりも所定量だけ縮小して作成して、 上記露光用マスクのデータが上記レイアウトデータを拡
大する向きにリサイズして作成されるようにしたことを
特徴とするマスク用データ作成方法。
1. A mask which, after creating layout data according to a pattern size of a semiconductor element to be manufactured, resizes the layout data to a size that cancels a pattern shift in an actual process and uses it as exposure mask data. In the method for creating the layout data, the layout data is created by reducing the pattern size of the semiconductor element to be manufactured by a predetermined amount, and the exposure mask data is resized so as to expand the layout data. A method for creating mask data, which is characterized by being created.
JP24767092A 1992-09-17 1992-09-17 How to create mask data Expired - Fee Related JP2828372B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24767092A JP2828372B2 (en) 1992-09-17 1992-09-17 How to create mask data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24767092A JP2828372B2 (en) 1992-09-17 1992-09-17 How to create mask data

Publications (2)

Publication Number Publication Date
JPH0695356A true JPH0695356A (en) 1994-04-08
JP2828372B2 JP2828372B2 (en) 1998-11-25

Family

ID=17166918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24767092A Expired - Fee Related JP2828372B2 (en) 1992-09-17 1992-09-17 How to create mask data

Country Status (1)

Country Link
JP (1) JP2828372B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100780775B1 (en) * 2006-11-24 2007-11-30 주식회사 하이닉스반도체 Method for fabricating self assembled dummy pattern for semiconductor device by using circuitry layout
KR100781443B1 (en) * 2006-10-30 2007-12-03 동부일렉트로닉스 주식회사 Manufacturing method of a mask for using to manufacture a semiconductor device
WO2012067246A1 (en) * 2010-11-19 2012-05-24 Nskテクノロジー株式会社 Proximity exposure device and proximity exposure method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6474547A (en) * 1987-09-14 1989-03-20 Motorola Inc Manufacture of semiconductor for compensating strain between pattern on semiconductor body and mask for obtaining pattern
JPH01267657A (en) * 1988-04-20 1989-10-25 Fujitsu Ltd Formation of mask for exposure
JPH04136853A (en) * 1990-09-28 1992-05-11 Hitachi Ltd Mask for proximity exposing and production thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6474547A (en) * 1987-09-14 1989-03-20 Motorola Inc Manufacture of semiconductor for compensating strain between pattern on semiconductor body and mask for obtaining pattern
JPH01267657A (en) * 1988-04-20 1989-10-25 Fujitsu Ltd Formation of mask for exposure
JPH04136853A (en) * 1990-09-28 1992-05-11 Hitachi Ltd Mask for proximity exposing and production thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100781443B1 (en) * 2006-10-30 2007-12-03 동부일렉트로닉스 주식회사 Manufacturing method of a mask for using to manufacture a semiconductor device
KR100780775B1 (en) * 2006-11-24 2007-11-30 주식회사 하이닉스반도체 Method for fabricating self assembled dummy pattern for semiconductor device by using circuitry layout
US7712070B2 (en) 2006-11-24 2010-05-04 Hynix Semiconductor Inc. Method for transferring self-assembled dummy pattern to substrate
US8250496B2 (en) 2006-11-24 2012-08-21 Hynix Semiconductor Inc. Method for transferring self-assembled dummy pattern to substrate
WO2012067246A1 (en) * 2010-11-19 2012-05-24 Nskテクノロジー株式会社 Proximity exposure device and proximity exposure method

Also Published As

Publication number Publication date
JP2828372B2 (en) 1998-11-25

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