JP2958178B2 - IC pattern design system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC pattern design system for creating a layout pattern of an integrated circuit.

[0002]

2. Description of the Related Art At present, a so-called CAD (Computer Aided Design) system is actively used in various fields as a computer-based design system, and is becoming indispensable. As is well known, in the CAD system, a designer performs design while communicating with a computer through a visible device such as a display device, and thereby, a considerable part of the design process can be automated. .

[0003] The CAD has become an indispensable element in the semiconductor field without exception. In particular, when creating a layout pattern of an integrated circuit (hereinafter, referred to as an IC), it is necessary to incorporate required functions in a semiconductor chip having a limited area, or to reduce required functions as much as possible. Since there is a strict requirement that it be stored in a space, many trials and errors have conventionally been performed to clear this.

Here, a conventional design method will be briefly described. Normally, IC layout pattern design is performed in three steps: floor planning, pattern design in each functional block, and matching. Of these, floor planning refers to IC
Is the earliest step in the layout pattern design, and refers to the process of laying out each functional block in a semiconductor chip. Here, the functional block refers to each of the functions of the entire IC divided into several blocks, for example, blocks such as an input / output block, an amplification block, and a control block.

In the floor planning step, the chip area is often determined first, and the necessary functional blocks must be laid out in the chip having the limited area.

On the other hand, since the number of elements such as gates required to realize the function of each functional block is fixed, the area of each functional block is limited, and it cannot be reduced too much.

That is, a required number of functional blocks each having a fixed lower limit area must be laid out in a chip having a fixed upper limit area. For this reason, it is necessary to perform an optimizing operation of correcting the graphic shape of each functional block so that no wasteful space remains between the functional blocks, while keeping the area below a predetermined value.

By the way, when a layout that satisfies the area value limit imposed on each functional block is temporarily completed by such optimization work, when these functional blocks are viewed, for example, in a horizontal direction, the heights thereof are as follows. They do not always match, and there are irregularities. However, the presence of such irregularities complicates the wiring pattern between the functional blocks performed in the subsequent design steps, so that it is necessary to correct them and make the heights uniform.

In such a case, conventionally, the heights have been made uniform by the following method. For example, considering a case where the height Y of the functional block is changed to a common height Y 'as shown in FIG. 4A, first, a frame side 31 to be moved (hereinafter, referred to as a movement target side) 31 is provided. opposing frame sides (hereinafter, referred to as opposite side.) 32 end points of P _1, examine the y-coordinate y ₁ of P _2, calculated by calculator or the like (y ₁ + Y '). Then, the both ends P ₃ and P 4 of the movement target side 31 are represented by y coordinates (y ₁ +
Y ′). The above operation is performed for each functional block.

[0010]

However, in the above-mentioned conventional method, the coordinates of the movement destination of the frame side are manually calculated, and the obtained y coordinate is input by keyboard or pointing input. There was a possibility that a human error such as an input error would occur. In particular, when adjusting the height of a plurality of functional blocks, the above-described processing must be performed for each functional block.
There was a problem that it was troublesome and required a long time.

Therefore, there is a problem that the above problem must be solved.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and an object of the present invention is to provide an IC pattern design system that can modify the shape of a functional block to a desired shape with a very simple operation.

[0013]

An IC pattern design system according to the present invention uses a display device and includes a plurality of functional blocks each having a predetermined function, each of which is constituted by a group of elements such as gates, in a semiconductor chip having a predetermined area. (I) a function block selecting means for selecting a function block displayed on a display device screen, and (ii) a function block selected from among the frame sides of the selected function block. A frame side specifying means for specifying a frame side to be moved; (i
ii) orthogonal frame side length input means for inputting a new length of the frame side orthogonal to the specified frame side, and (iv) extracting a frame side corresponding to the specified frame side from the functional block, Calculating means for calculating the destination coordinate of the specified frame side from the coordinates of the frame side and the input orthogonal frame side length; (v) moving the specified frame side to the coordinate position calculated by the calculating means Frame moving means.

[0014]

In the IC pattern design system according to the present invention, the movement of the functional block displayed on the screen is performed only by specifying the frame side to be moved and by inputting the corrected length of the frame side orthogonal to the specified frame side. The calculation of the coordinates and the execution of the movement are automatically performed.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to embodiments.

FIG. 1 shows an outline of an IC pattern design system according to an embodiment of the present invention. This system is provided with an operation unit 11 and a control unit 13 including a buffer memory 12 for temporarily storing the operation result. Input devices such as a mouse 14 and a keyboard 15 are connected to the control unit 13, and a display device 17 is connected via a display control unit 16. The mouse 14 is used to move a graphic cursor on the screen of the display device 17 and to specify a desired coordinate position.

On the screen of the display device 17, FIG.
An IC pattern design drawing as shown in FIG. In this figure, hatched portions 21 and the like indicate input / output terminals. Also, a white rectangular block 2
2 and the like represent functional blocks each having a predetermined function.

The control unit 13 has a main memory 18.
And a fixed disk device 19 are connected. The fixed disk device 19 stores various control programs and disks necessary for the operation of the system, and is loaded onto the main memory 18 at the time of startup or as needed. In the video RAM area of the main memory 18, graphic data displayed on the display device 17 is stored in a table format.

The operation of the IC pattern design system having the above configuration will be described with reference to FIG. Here, the heights of the five functional blocks 22 to 26 shown in FIG.
Will be described.

First, after inputting a predetermined shape correction command, all the functional blocks to be corrected and the side of the frame to be moved are specified (step S101). That is, the mouse 14 is operated to operate the graphic cursor 28 (see FIGS. 2 and 4).
(A)) is moved to the movement target side 31 of the function block to be corrected, for example, the function block 25, and a click button (not shown) of the mouse is pressed. The control unit 13 sets the corresponding function block data on the graphic data table provided on the main memory 18 to the selected state, and controls the display control unit 16 to display the corresponding function block and the movement target side in the selection mode ( Step S102). here,
The selection mode display is, for example, a bold line display, a reverse display, or the like.

Similarly, another function block 2 to be modified
After selecting 2, 23, 24, 26, the selection end key of the mouse is pressed. Next, a height (distance between upper and lower sides) Y ′ to be shared is input from the keyboard 15 (step S).
103).

The control unit 13 sequentially retrieves the selected function block data from the main memory 18 (step S).
104), the movement target side 31 is extracted therefrom (step S105), and the opposite side 32 is extracted (step S106).

The arithmetic unit 11 calculates y ₂ ′ = y ₁ + Y ′ based on the y-coordinates y _{1 of the two} ends P ₁ and P ₂ of the opposite side 32.
(Step S107), and this value is stored in the buffer memory 12. Then, a process of translating both end points P ₃ and P ₄ of the movement target side 31 so that the y-coordinate thereof becomes y ₂ ′ is performed (step S108). That is,
The control unit 13 transfers the value stored in the buffer memory 12 to the display control unit 16, so that the functional block 25 whose shape has been corrected is displayed on the screen of the display device 17 as shown in FIG. Will be displayed.

Then, the same processing is sequentially performed on the other selected functional blocks, and the correction of the block shape is sequentially performed. Then, when the correction is completed for all the functional blocks (step S109; Y), the processing is ended.

In this embodiment, the function blocks to be corrected are selected one by one. However, for example, a so-called rubber band in which an element in a rectangular area having a diagonal line between two designated points is selected. A plurality of functional blocks to be corrected may be collectively selected using the display function.

[0026]

As described above, according to the present invention,
By simply specifying the frame side to be moved of the function block displayed on the screen and inputting the corrected length of the frame side orthogonal to this, the calculation of the coordinates of the destination and execution of the movement are automatically performed Since the calculation is performed, the manual calculation can be eliminated. Therefore, it is possible to prevent the occurrence of a human error and to greatly reduce the processing time.

Since the area of the functional block is changed by the shape correction as described above, the shape correction in the horizontal direction (x direction) may be further performed to satisfy the predetermined area limit.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of an IC pattern design system according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing an example of a functional block pattern displayed on a display device of the IC pattern design system.

FIG. 3 is a flowchart for explaining the operation of this system.

FIG. 4 is an enlarged view in which a part of the functional block pattern of FIG. 2 is enlarged.

FIG. 5 is an explanatory diagram showing a display screen state after a correction for sharing the height of some of the functional block patterns in FIG. 2 has been performed;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Operation part 12 Buffer memory 13 Control part 14 Mouse 15 Keyboard 16 Display control part 17 Display device 18 Main memory

Continuation of the front page (56) References JP-A-57-128952 (JP, A) JP-A-62-110582 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01L 21 / 82 G06F 17/50

Claims (1)

(57) [Claims] 1. An interactive design system for arranging a plurality of functional blocks each having a predetermined function and having a predetermined function in a semiconductor chip having a predetermined area, using a display device. Function block selection means for selecting a function block displayed on the display device screen, frame side specification means for specifying a frame side to be moved from among the frame sides of the selected function block, Orthogonal frame side length input means for inputting a new length of the orthogonal frame side, extracting a frame side corresponding to the specified frame side from the function block, and obtaining coordinates of the frame side and the input orthogonal frame side From the head,
An IC comprising: arithmetic means for calculating the destination coordinates of the specified frame side; and frame side moving means for moving the specified frame side to the coordinate position calculated by the arithmetic means. Pattern design system.