JP2000114387A - Pattern layout device, its method and storage medium readable via computer and storing pattern layout program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the design period of a circuit pattern by adding a contact pattern to a section which is electrically connected on a wiring pattern in parallel and changing the wiring pattern automatically following the layout of the added contact pattern. SOLUTION: The name of a layer forming a wiring 11, a wiring 12 and a contact 14 on a CAD software and a minimum line width and a minimum line interval, etc., of a pattern in each layer are inputted. Then, a pattern of each of the wiring 11, the contact 14 and the wiring 12 is generated, self- judgment is carried out whether or not the wiring 11 and the wiring 12 are electrically connected to the contact 14, and at the same time, each part is recognized according to a software. A pattern of the contact 14 is added in parallel on a pattern of each of the wirings 11, 12 by the software and a pattern of the wiring 11 is changed following the of layout the pattern of the contact 14.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a pattern layout apparatus for designing a circuit pattern, a method thereof, and a computer-readable storage medium storing a pattern layout program.

[0002]

2. Description of the Related Art In general, a display device using a liquid crystal is directed to a television display or a graphic display, and a large-capacity, high-density active matrix display device has been developed and put into practical use. In such a display device, a semiconductor switch is used for driving and controlling each pixel so that display can be performed with high contrast without crosstalk. As the semiconductor switch, a thin film transistor (TIN) formed on a transparent insulating substrate or a MIM (Metal Insulation) is formed because a transparent display is possible and a large screen is easy.
Metal) elements are used.

Conventionally, on an array substrate of a transparent insulating substrate,
For performance reasons, only thin film transistors for switching pixels could be formed. But,
In recent years, a technology for improving the performance of a thin film transistor has been developed, and a circuit that has been externally attached outside the transparent insulating substrate can be formed on the insulating substrate. Various circuits can be considered as such a circuit. A typical example is a driver circuit that generates a signal for controlling the potential of each pixel from a video signal.

In order to design a pattern on an array substrate of a liquid crystal display device including such a driver circuit, generally, a CAD capable of drawing a two-dimensional plan view having a layer concept is used.
A system is used. In order to draw this two-dimensional plane, the CAD system has an origin and XY axes set on a database, and can draw a pattern using a designated layer.

[0005] The layer is one of elements for expressing a pattern drawn on a CAD, and corresponds to a mask used for manufacturing an array substrate. The pattern drawn on the CAD is represented on the database by a layer and a vertex coordinate list.

However, when the driver circuit is incorporated on the transparent insulating substrate, the yield is expected to be lower than when only the pixel pattern is incorporated on the insulating substrate. One of the causes of a decrease in the yield of the driver circuit is a contact failure. 8 to 10 show a contact portion of the driver circuit. FIG. 8 is a plan view, FIG. 9 is a sectional view, and FIG. 10 is an equivalent circuit diagram.

As shown in FIG. 8, when one wiring 11 and the other wiring 12 are formed of different metal films, so-called layers, in order to connect these wirings 11 and 12, first, After forming the wiring 11 and the insulating film 13, the corresponding portion of the insulating film 13 is cut off. Next, when the wiring 12 is formed on the wiring 11, the wiring 11 and the wiring 12 can be electrically connected by the contact. However, if the contact 14 becomes incomplete for some reason, as shown in FIGS. 11 and 12, a failure in which the wiring 11 and the wiring 12 are not electrically connected, that is, a so-called contact failure occurs.

As means for reducing the decrease in the yield of the driver circuit due to such contact failure,
There are configurations shown in FIGS. That is, FIG.
As shown in the figure, the wiring 11 and the wiring 12 are connected to one contact 14.
, The equivalent circuit is as shown in FIG. In this case, if the contact 14 becomes defective for some reason, the wiring 11 and the wiring 12 are not connected as shown in FIG. Probability P with this contact failure
In the case where there is no so-called redundant design, a failure occurs with a probability P.

On the other hand, as shown in FIG.
When the contact patterns are arranged so that the contacts 14 connecting the wiring 12 and the wiring 12 are located at two positions in the wiring direction, the equivalent circuit is as shown in FIG. Therefore, 1
If the probability that one contact 14 becomes defective is the same probability P, the probability of occurrence of a defect such that the wiring 11 and the wiring 12 are not connected is P * P, and the structure with one contact 14 shown in FIG. In comparison, a reduction in the yield of the driver circuit due to a contact failure can be reduced.

Although connecting the wiring 11 and the wiring 12 with the plurality of contacts 14 in this manner is effective for improving the yield of the driver circuit, the plurality of contacts 14 are arranged in parallel with the wiring 11 and the wiring 12. To do this, it is necessary to consider the surrounding patterns.

In order to process such a contact pattern for improving the yield of the driver circuit, a conventional pattern design method is performed as shown in FIG.

As shown in FIG. 7, first, a target pattern is read out on a CAD from a database such as a hard disk storing CAD data, and a desired driver circuit pattern is drawn or edited (step 1). Next, it is determined whether or not the portion is a portion where a contact is to be arranged with respect to the wiring pattern (step 2). If a contact is to be arranged, a contact pattern is arranged (step 3). Thereafter, the designer checks the peripheral pattern shape where the contacts are arranged (step 4). And
If there is no problem with the peripheral pattern, it is determined whether there is no problem in the driver circuit as a whole, and it is further confirmed whether or not a desired circuit is obtained (step 5).

Here, if there is a problem with the peripheral pattern, the problematic pattern is corrected (step 7).
If it is not the desired pattern, the process returns to the first step. When the desired pattern is obtained, the changed pattern is stored in the database (step 6), and the process ends.

[0014]

In such a conventional pattern design method, the designer manually performs all the work of adding a contact pattern so as not to reduce the yield of the driver circuit. That is, the designer manually determines where to add a contact and how many contacts can be added. For this reason, a long work time is required, and the possibility of occurrence of errors due to manual work increases.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and provides a pattern layout apparatus, a method thereof, and a pattern layout program capable of shortening a circuit pattern design period, reducing errors, and improving design accuracy. It is an object of the present invention to provide a computer-readable storage medium on which is recorded.

[0016]

According to the present invention, there is provided a pattern layout for designing a circuit pattern having a configuration in which wiring patterns of arbitrarily drawn different hierarchies are electrically connected to each other by contact patterns. Recognize the pattern of each wiring and the pattern of the contact formed in a desired circuit, and a portion where the pattern of each wiring is electrically connected by the pattern of the contact, and change the pattern of the contact to the pattern of the wiring. The wiring pattern is added to the above electrically connected portion in a parallel direction, and the wiring pattern is automatically deformed according to the arrangement of the added contact pattern.

In addition, when adding a contact pattern, the distance between the electrically connected portion on the wiring pattern and the pattern around the wiring pattern is measured, and at least the measured distance and the size of the contact pattern are measured. The obtained number and the contact pattern are added.

Further, the side of the wiring pattern to which the contact pattern has been added is moved in the enlargement direction by at least a distance determined from the number and size of the added contact pattern.

And shortening a circuit pattern design period;
The occurrence of errors can be reduced and the design accuracy can be improved, and a high-precision circuit pattern with few contact defects can be designed.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a flow chart for explaining an embodiment of the present invention, and FIGS. 2 to 6 are flow charts showing a detailed program of each part of FIG.

First, the circuit pattern shown in FIG. 8 is targeted. One wiring 11 is a metal 1 layer, the other wiring 12 is a metal 2 layer, and the pattern of the contact 14 is
Each is drawn with a Via layer.

As shown in FIG. 1, CAD data of a driver circuit pattern including the pattern as shown in FIG. 8, for example, coordinates of each vertex and a layer name are read from a storage area of a computer, that is, a database, and CAD data is read.
Display on software. Then, so-called initial settings are entered for inputting the names of the layers for forming the wirings 11, 12 and the contacts 14, and the minimum line width and minimum line interval of the pattern in each layer (step 11).

Next, a wiring is formed so as to constitute a desired circuit.
11, draw or edit the patterns of the contacts 14 and the wirings 12, respectively (Steps 12, 13,
14). Then, whether the part drawn or edited in this way has a shape in which Leia metai1 and metal2 are connected by Via, that is, the wiring 11 and the wiring 12
The self-determination is made by 14 as to whether or not they are electrically connected, and at the same time each part is recognized (step 15). The self-determination step of step 15 will be described with reference to FIG.

First, an area including a pattern drawn or edited as described above is calculated, and this area is set as an edit area, and a newly drawn or edited pattern is set as a new pattern (step 15-1). Next, in this editing area, the new pattern, the wiring 11, the wiring 12, and the contact 14
Calculate the and pattern with the pattern of (Step 15-
2).

As a result, when there is no calculated pattern, it is determined that there is no connection shape, and the process proceeds to the next determination step 16. On the other hand, if there is a calculated pattern,
It is determined that there is a connection shape (step 15-3), and an identification signal is added to each of the obtained patterns of the wiring 11, the wiring 12, and the contact 14 (step 15-6), and the next determination step (step 16) Proceed to.

Then, in a determination step (step 16), it is determined whether or not the above-mentioned connection shape exists. As a result, if there is no connection shape, a connection failure message is displayed on the display (step 17), and the process returns to pattern drawing (steps 12, 13, and 14).

On the other hand, when the connection is made, the interval between the connection portion and the pattern around the connection portion is automatically measured (step 18). Details of the measurement step of step 18 will be described with reference to FIG.

In this program, since the variable designating the upper side and the lower side of the connected wiring is set to D2, the subsequent steps are looped while sequentially assigning "upper" and "lower" to this variable D2. And execute (step
18-1).

That is, the above-mentioned steps (step 15-
In the pattern of the wiring 11 connected with the identification signal added in 4), that is, drawn on the D2 side in the Y-axis direction, for example, from the upper side to the end of the editing area, with the layer of the wiring 11 Then, it is detected whether the pattern exists (step 18-2). If a pattern exists, the distance between the detected wiring 11 and the layer pattern is set as d (Y, D2), and the value is stored in the memory (step 18-3). If the corresponding pattern is not detected, the distance to the end of the editing area is set as d (Y, D2) and the value is stored in the memory (step 18-3). By executing this operation on the “lower side” as well, the distance between the connection portion and the peripheral pattern is measured.

Next, from the interval measured as described above,
An area where the pattern of the contact 14 can be added is automatically calculated (step 19). Details of the calculation step of step 19 will be described with reference to FIG.

First, the values such as the minimum line interval input in the above-mentioned initialization (step 11) are input to each variable as follows and stored in the memory (step 19-1).

E = minimum size of the contact 14 A = minimum distance between the contact 14 and the contact 14 B = minimum distance between the contact 14 and the wiring 11 C = minimum distance between the wiring 11 and the wiring 11 Subsequent steps are looped and executed while sequentially assigning the upper side and the lower side (step
19-2).

First, the number n of the contact patterns that can be added within the measured distance d (Y, D2) is determined by the following equation (step 19-3), and the determined number n is determined by n (Y, D2).
D2) is stored in the memory (step 19-4).

N = int ｛(d (Y, D2) -BC)
/) E + A)｝ Next, a pattern of the contact 14 is automatically generated and added to the area calculated for “upper side” and “lower side” (step 20). Details of this additional step 20 will be described with reference to FIG.

First, "upper" and "lower" are sequentially assigned to a variable D2, and the subsequent steps are executed in a loop (step 20-1). That is, the patterns of the contacts 14 are generated and added by an interval A on the upper or lower D2 side by the number n (Y, D2) of the patterns of the contacts 14 that can be newly added and stored in the memory ( Step 20-
2).

Next, a wiring pattern deformed in accordance with the automatically generated contact 14 pattern is automatically generated (step 20). Details of the modification step of step 20 will be described with reference to FIG.

First, "upper side" and "lower side" are sequentially substituted for the variable D2, and the subsequent steps are executed in a loop (step 21-1). That is, the Y-axis D2 of the pattern of the wiring 11
The side is moved in the direction D2 by a distance represented by the following equation (step 21-2).

(A + E) * n (Y, D2) + B Next, the pattern generated so far is confirmed (step 22). As a result, if there is no problem, the changed pattern is stored in a database such as a hard disk (step 23), and if there is a problem, the pattern is restored to the pattern before the change (step 24).

As described above, by adding the contact pattern to any one of the wiring patterns, the processing of the steps (steps 15 to 21) in FIG. 1 is automatically performed, and the reduction in the yield due to the contact failure is reduced. In this manner, a plurality of contacts can be automatically arranged in parallel with the wiring as many as possible.

As a result, the design period can be shortened, the possibility of mistakes caused by automating manual processes can be eliminated, and the design accuracy can be improved. For example, when designing a circuit pattern having about 1500 contact points, the number of contact patterns to be added to reduce contact defects is three on average per one point, for a total of 45 contact patterns.
It is necessary to draw 00 contact patterns. However, according to the above-described embodiment, only one contact pattern needs to be drawn, and the wiring pattern can be automatically corrected, so that the design period can be reduced to about 1/4.

In the above embodiment, the case where a contact pattern is added in the Y-axis direction has been described. However, this Y-axis is changed to the X-axis, and D2 is changed to “right” and “left”.
Thus, the contact pattern can be added also in the X-axis direction.

The above embodiment may be stored in a computer-readable storage medium, for example, a magnetic disk, an optical disk, or the like.

[0044]

According to the present invention, the arrangement of the contact patterns and the change of the wiring patterns are automated during the design work of the circuit pattern, thereby shortening the design period and reducing the occurrence of errors. Thus, improvement in design accuracy can be achieved.

[Brief description of the drawings]

FIG. 1 is a flowchart showing the operation of an embodiment of the pattern layout apparatus of the present invention.

FIG. 2 is a flowchart showing the operation of step 15 in FIG. 1;

FIG. 3 is a flowchart showing the operation of step 18 in FIG. 1;

FIG. 4 is a flowchart showing an operation of step 19 in FIG. 1;

FIG. 5 is a flowchart showing the operation of step 20 in FIG. 1;

FIG. 6 is a flowchart showing the operation of step 21 in FIG. 1;

FIG. 7 is a flowchart showing a conventional design method.

FIG. 8 is a plan view showing a contact portion of the circuit pattern.

FIG. 9 is a sectional view of the same.

FIG. 10 is an equivalent circuit diagram of the above.

FIG. 11 is a cross-sectional view showing a contact portion in which a contact failure has occurred;

FIG. 12 is an equivalent circuit diagram of the above.

FIG. 13 is a plan view of a circuit pattern before a contact is added in the embodiment.

FIG. 14 is an equivalent circuit diagram in the normal state according to the first embodiment;

FIG. 15 is an equivalent circuit diagram when a contact failure occurs.

FIG. 16 is a plan view of a circuit pattern including a plurality of contacts according to the embodiment.

FIG. 17 is an equivalent circuit diagram at the time of normal operation of the embodiment.

FIG. 18 is an equivalent circuit diagram when one contact failure occurs in the embodiment.

[Explanation of symbols]

 11, 12 Wiring 14 contacts

Claims (8)

[Claims] 1. A pattern layout apparatus for designing a circuit pattern having a configuration in which wiring patterns of arbitrarily drawn different layers are electrically connected to each other by a contact pattern, comprising: a wiring pattern and a contact pattern. A storage device for storing a pattern, a pattern of each wiring and a contact pattern read from the storage device and formed in a desired circuit are recognized, and the respective wiring patterns are electrically connected by the contact pattern Recognizing means for recognizing a part which is provided; additional means for adding the contact pattern in a direction parallel to an electrically connected part on the wiring pattern; and the wiring pattern is added. And a deforming means for deforming according to the arrangement of the contact pattern. Turn layout apparatus. 2. The method according to claim 1, wherein the adding unit measures an interval between an electrically connected portion on the wiring pattern and a peripheral pattern, and determines at least the number obtained from the measured interval and the size of the contact pattern. The pattern layout apparatus according to claim 1, wherein the pattern of the contact is added. 3. The method according to claim 1, wherein the deforming means moves at least the side of the corresponding wiring pattern in the enlargement direction by a distance determined from the number and size of the added contact patterns. Pattern layout device. 4. A pattern layout method for designing a circuit pattern having a configuration in which wiring patterns arbitrarily drawn and having different levels of wiring are electrically connected to each other by a contact pattern, wherein the circuit pattern is formed into a desired circuit. Recognizing the pattern of each of the wirings and the pattern of the contact, and a portion where the pattern of each of the wirings is electrically connected by the pattern of the contact, the pattern of the contact is electrically connected to the pattern of the wiring. A pattern in which the wiring patterns are added in parallel to the existing portions, and the wiring pattern is automatically deformed in accordance with the arrangement of the added contact patterns. 5. When adding a contact pattern, a distance between an electrically connected portion on a wiring pattern and a pattern around the part is measured, and at least the distance between the measured distance and the size of the contact pattern is measured. 5. The pattern layout method according to claim 4, wherein the determined number and the contact pattern are added. 6. The method according to claim 6, wherein the side of the wiring pattern to which the contact pattern is added is at least a distance determined from the number and size of the added contact pattern.
5. The pattern layout method according to claim 4, wherein the pattern is moved in an enlargement direction. 7. A function of reading a wiring pattern and a wiring pattern from a storage device, a wiring pattern of a different hierarchy formed in a desired circuit, and a contact for electrically connecting the wiring patterns to each other. And a function of recognizing a portion where these wiring patterns are electrically connected by a contact pattern, and a function of recognizing a portion of the wiring pattern which is electrically connected and a pattern around the portion. The distance is measured, the number obtained from the measured distance and the size of the contact pattern, the function of adding the contact pattern, and the wiring pattern are deformed according to the arrangement of the added contact pattern. And a computer storing a pattern layout program characterized by having Data readable storage medium. 8. The function of deforming the wiring pattern in accordance with the arrangement of the added contact pattern is determined by at least the number and size of the added contact patterns at the sides of the corresponding wiring pattern. 8. A computer-readable storage medium storing a pattern layout program according to claim 7, wherein the storage medium is moved in the enlargement direction by a distance.