JPH10327355A - Method and device for detecting defect of solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow a single defect detection circuit to detect a defective pixel of a plurality of solid-state image pickup elements. SOLUTION: A spectroscopic video beam is made incident onto CCDs 3R, 3G, 3B and an extracted image pickup signal is fed to defect correction circuits 20R, 20G, 20B of defect detection correction circuits 5R, 5G, 5B and clamp circuits 21R, 21G, 21B. The clamp signal is fed to a selector 22 controlled by a microcomputer 8 and the extracted signal is fed to a defect detection circuit 23. Furthermore, a control signal from the microcomputer 8 is fed to a CCD drive circuit 10 and a synchronizing signal generating circuit 11, from which a synchronizing signal is fed to an address counter 24 so as to form addresses for pixels of image pickup signals extracted from the CCDs 3R, 3G, 3B on a screen. Then the address from the address counter 24 and the detection signal from the defect detection circuit 23 are fed to a memory 25, where the address of a defective pixel on the screen is stored in a memory 25.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a multi-plate (3
The present invention relates to a method and an apparatus for detecting a defect of a solid-state imaging device suitable for use in a (plate) type CCD imaging device.

[0002]

2. Description of the Related Art For example, in detecting a defect in a solid-state image pickup device, charges are accumulated for a predetermined period in a state where incident light to a solid-state image pickup device, for example, a CCD is cut off. Pixel defect (white spot defect)
Has been proposed (Japanese Patent Laid-Open No. 6-3151).
No. 12, etc.).

That is, in FIG. 4, image light supplied through, for example, a lens system (not shown)
Through a CCD (solid-state imaging device) 41 to be converted into an electric signal. The electric signal is supplied to a defect detection / correction circuit 43 through a sample / hold (S / H) for extracting a signal from the CCD 41 and an AGC circuit 42. Further, a signal obtained by detecting and correcting a pixel defect by the defect detection and correction circuit 43 is supplied to a signal processing circuit 44. In the signal processing circuit 44, for example, a video signal of an arbitrary standard system is formed and taken out to an output terminal 45.

A microcomputer (microcomputer) 46 for controlling the entire apparatus is provided, and a signal from the microcomputer 46 is supplied to a timing generation circuit 47 for generating various timing signals for operation. Further, a signal from the timing generation circuit 47 is supplied to a CCD drive circuit 48 for driving the CCD 41. Further, a signal from the timing generation circuit 47 is supplied to a synchronization generation circuit 49 to generate horizontal / vertical synchronization signals and the like, and these synchronization signals are supplied to a signal processing circuit 44 and also to a defect detection and correction circuit 43. Is also supplied.

Further, in the defect detection and correction circuit 43, the signal from the above-mentioned AGC circuit 42
0, and also supplied to the defect detection circuit 52 through the clamp circuit 51. Then, for example, in a preparatory period before photographing, the iris 40 is closed by a control signal from the above-described microcomputer 46, for example, so that light incident on the CCD 41 is cut off. In this state, charge is accumulated for a predetermined period. The accumulated charge is used as the timing generation circuit 47
The signal of the accumulated charge is supplied to the defect detection circuit 52 through the clamp circuit 51.

Therefore, in the defect detection circuit 52, for example, a signal of the supplied stored charge is compared with a predetermined reference level, and when the level of the signal of the stored charge is higher than the reference level, a so-called white spot defect has occurred. What is CCD
41 defects are detected. On the other hand, the pixel clock signal from the above-described timing generation circuit 47 and the horizontal / vertical synchronization signal from the synchronization generation circuit 49 are used in the address counter 5.
3 to form horizontal and vertical addresses on the screen of the pixels of the image pickup signal extracted from the CCD 41 described above.

The address from the address counter 53 and the detection signal from the defect detection circuit 52 are supplied to the memory 54, and the address on the screen of the pixel where the defect is detected is stored in the memory 54. That is, for example, an address corresponding to all the pixels of the above-described CCD 41 is provided in the memory 54, and a signal indicating the defect is stored in the address supplied from the address counter 53 when the above-described defect is detected. You. As a result, the address on the screen of the pixel where the defect is detected is stored in the memory 54.

Further, at the time of photographing, the address counter 53
Are supplied to the memory 54, for example, horizontal and vertical addresses corresponding to the pixels of the image pickup signal taken out from the CCD 41 are supplied to the memory 54. When this address matches the address on the screen of the pixel in which the defect is stored, a signal indicating the stored defect is read from the memory 54. Further, the read signal is used as a defect correction circuit 51.
, The pixel defect is corrected by, for example, previous value interpolation or average value interpolation.

[0009]

As described above, in the above-described apparatus, a defect (white spot defect) of a pixel of a solid-state image sensor, for example, a CCD is detected, and the detected pixel defect is corrected. Meanwhile, in FIG. 4 described above, one CCD 4
1 shows an apparatus using, for example, a monochrome imaging apparatus or a single-panel CCD imaging apparatus using a mosaic filter.

On the other hand, when the above-described configuration is used for, for example, a multi-plate (three-plate) type CCD image pickup device, it is necessary to provide the configuration for each CCD. That is, in this case, as shown in FIG. 5, the image light supplied through, for example, a lens system (not shown)
Is incident on the spectroscopic device 100 through the
At 0, the image light separated into red (R), green (G), and blue (B) are respectively divided into CCDs (solid-state imaging devices) 41R, 41G,
The light is incident on 41B and converted into an electric signal.

The three CCDs 41R, 41
The above configuration is provided in parallel for each of G and 41B. In the figure, parts corresponding to those in FIG. 4 are denoted by the same reference numerals, and circuits provided in parallel have R,
G and B are added. In this way, the above-described configuration can be used, for example, in a three-plate CCD imaging device.
However, in this configuration, for example, the defect detection circuit 5
Providing 2R, 52G, and 52B in parallel complicates the configuration and increases the circuit scale.

By the way, for example, a three-plate CCD using the above-mentioned three CCDs of red (R), green (G) and blue (B)
In the image pickup apparatus, the required sensitivity of the CCD differs for each color signal. That is, the above-mentioned pixel defect affects the image quality, because of the narrow band color signal.
The one in the luminance signal is remarkable. On the other hand, R, G, B
When a luminance signal of a television signal is formed from the three color signals described above, synthesis is performed with a mixture ratio of R: G: B = 30: 59: 11.

Therefore, the effect of the synthesized luminance signal is most affected by the green (G) color signal, the effect of the red (R) color signal is １ ／ of that, and the effect of the blue (B) signal is obtained. The influence of the color signal is about 1/6, and the detection of the defect may be performed in accordance with this sensitivity. However, in order to perform such sensitivity adjustment in the conventional defect detection circuit, it is necessary to individually adjust the gains of the analog AGC circuits 42R, 42G, and 42B, and such adjustment cannot be easily performed. Met.

The present application has been made in view of such a point, and the problem to be solved is that the conventional method and apparatus require a complicated configuration and a large circuit scale. In addition, the sensitivity cannot be easily adjusted for each color signal.

[0015]

For this reason, in the present invention, the charge accumulation time is selected according to the sensitivity set for each of the plurality of solid-state imaging devices, and the timing for extracting the accumulated charge is made different. According to this, the sensitivity can be easily adjusted for each color signal, and, for example, by using a defect detection circuit in a time-division manner for each timing, for example, one defect detection circuit can be used. Accordingly, pixel defects of a plurality of solid-state imaging devices can be detected.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS That is, the present invention has a plurality of solid-state imaging devices, accumulates electric charges for a predetermined period in a state where incident light to the plurality of solid-state imaging devices is blocked, and extracts the accumulated electric charges. In the defect detection method of a solid-state imaging device for detecting a defect of a pixel of a plurality of solid-state image sensors, the charge accumulation time is selected according to the sensitivity set for each of the plurality of solid-state image sensors. According to the difference, the timing of taking out the accumulated charge is made different, and the timing is made different to switch the taken out accumulated charge to detect the defect of the pixel of the plurality of solid-state imaging devices in a time-sharing manner by a single detection means. It is performed by using.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram showing a configuration of an example of a device to which a defect detection method for a solid-state imaging device according to the present invention is applied.

In FIG. 1, image light supplied through, for example, a lens system (not shown) is incident on a spectroscopic device 2 through an iris 1, and the spectroscopic device 2 emits red (R), green (G), The video light separated into blue (B) is CC
D (solid-state imaging device) 3R, 3G, and 3B are incident and converted into electric signals.

The electric signal is supplied to a sample hold (S / H) for extracting a signal from the CCD and a defect detection / correction circuit 5R, 5G through AGC circuits 4R, 4G and 4B.
G, 5B. Further, the defect detection and correction circuit 5
The signals detected and corrected for pixel defects in R, 5G, and 5B are supplied to the signal processing circuit 6. And this signal processing circuit 6
Then, for example, an image signal of an arbitrary standard system is formed from the image pickup signals of the three primary colors in which the above-described pixel defect has been corrected, and is taken out to the output terminal 7.

A microcomputer (microcomputer) 8 for controlling the entire apparatus is provided.
Are supplied to a timing generation circuit 9 for generating various timing signals for operation. Further, a signal from the timing generation circuit 9 is used as a signal for driving the CCD.
The CCD driving circuit 10 is supplied to the CD driving circuit 10 and
Is supplied to the CCDs 3R, 3G, and 3B. Thus, the CCDs 3R, 3G, and 3B are scanned, and the above-described signals are extracted.

Further, a signal from the timing generation circuit 9 is supplied to a synchronization generation circuit 11 to generate horizontal and vertical synchronization signals and the like. These synchronization signals are supplied to a signal processing circuit 6 and a defect detection and correction circuit. 5 as well. In the defect detection and correction circuit 5, the above-mentioned AGC
The signals from the circuits 4R, 4G, and 4B are supplied to the defect correction circuits 20R, 20G, and 20B, respectively, and are also supplied to the clamp circuits 21R, 21G, and 21B.

These clamp circuits 21R, 21G, 2
The signal from 1B is supplied to the selector 22, and the selector 22 is controlled by the microcomputer 8 as described later.
The signal extracted through the selector 22 is
It is supplied to the defect detection circuit 23. This defect detection circuit 23
Then, for example, the supplied stored charge signal is compared with a predetermined reference level, and when the level of the stored charge signal is equal to or higher than the reference level, it is determined that a so-called white spot defect has occurred, and a CCD pixel defect is detected. Is performed.

The pixel clock signal from the timing generation circuit 9 and the horizontal / vertical synchronization signal from the synchronization generation circuit 11 are supplied to the address counter 24, and the image pickup taken out from the CCDs 3R, 3G, and 3B. Horizontal and vertical addresses on the screen of the pixel of the signal are formed. And the addresses from these address counters 24,
The detection signal from the defect detection circuit 23 is supplied to the memory 25, and the address on the screen of the pixel where the defect is detected is stored in the memory 25.

In this apparatus, the detection of a pixel defect of the CCD is performed as follows. That is, for example, in a preparation period before photographing, the iris 1 is closed by the control signal from the microcomputer 8 and the CCD 3R,
Light incident on G and 3B is cut off, and in this state, charge is accumulated for a predetermined period. Here, during this charge accumulation period, the CCD readout signal from the timing generation circuit 9 is stopped, and charge accumulation is performed.

Further, the length of the charge accumulation period (accumulation time) is controlled for each of the CCDs 3R, 3G, and 3B.
That is, for example, when the defect detection operation period is set as shown in FIG.
A read pulse (XS) for discharging the accumulated charges before the read pulse (XS
GG1, XSGG2, XSGR1, XSGR2, XSG
B1, XSGB2) are generated. The two pulses correspond to even and odd fields.

Thus, each CCD 3R, 3D
G and 3B accumulation periods are started, and after that, the generation of the read pulse is stopped, so that the CCD 3
In R, 3G and 3B, electric charges are accumulated in each defective pixel. Further, when the next read pulse is generated, each of the CCDs 3R, 3G, and 3B outputs (C
As shown in CDRch, CCDGch, and CCDBch, the accumulated electric charges are the inspection signals (G1, G2, R1, R2, B).
1, B2).

On the other hand, the sensitivity of the above-described CCD defect detection is as follows.
This is proportional to the length of the accumulation period. Therefore, the accumulation time until the next read pulse is generated depends on the CCD sensitivity required for each of the above-described red (R), green (G), and blue (B) color signals, for example. Be controlled. That is, in the case of the above-described television signal, the effect of the red (R) color signal is の of the effect of the green (G) color signal, and the effect of the blue (B) color signal is the effect of the green (G). It is about 1/6 of the color signal.

Therefore, for example, as shown in FIG. 2, the timing of the generation of the next read pulse (XSGG1, XSGG2) of the CCD 3G of the above-mentioned green (G) color signal corresponds to the red (R) color signal. The timing at which the next read pulse (XSGR1, XSGR2) of the CCD 3R is generated is set to half the time, and the CCD 3R for the blue (B) color signal is generated.
The timing at which the read pulse (XSGB1, XSGB2) next to B is generated is set to 1/6 time.

Accordingly, the defective pixels of the CCDs 3R, 3G, 3B are detected by using the above-mentioned inspection signals (G1, G2, R1, R2, B1, B2) extracted as described above. Detection sensitivity is CCD3
G and set the sensitivity of CCD3B defect detection to CCD
Each of the CCDs 3R, 3G, 3B can be reduced to 1/6 of 3G, depending on the CCD sensitivity required for each of the above-mentioned red (R), green (G), and blue (B) color signals, for example.
Of defective pixels can be detected.

Further, in this case, each CCD 3R,
The inspection signals (G1, G2, R
1, R2, B1, B2) are different from each other as shown in the figure, so that these test signals (G1, G2,
R1, R2, B1, B2) are switched by the selector 22 as shown in FIG. 2B, so that a single defect detection circuit 23 can be used to detect defective pixels of each of the CCDs 3R, 3G, 3B. You can do it.

At the time of photographing, the address counter 24
Are supplied to the memory 25, and horizontal and vertical addresses corresponding to the pixels of the image pickup signals taken out from the CCDs 3R, 3G, and 3B are supplied to the memory 25. And when this address matches the address on the screen of the pixel where the above-mentioned defect is stored,
A signal indicating the stored defect described above is stored in this memory 25.
, And the read signals are supplied to the defect correction circuits 20R, 20G, and 20B, whereby pixel defects are corrected by, for example, previous value interpolation or average value interpolation.

Therefore, in this device, the charge accumulation time is selected in accordance with the sensitivity set for each of the plurality of solid-state imaging devices, and the timing of taking out the accumulated charge is varied to adjust the sensitivity for each color signal. In addition, for example, by using a defect detection circuit in a time-division manner at each timing, for example, one defect detection circuit can detect pixel defects of a plurality of solid-state imaging devices.

Thus, in the conventional method and apparatus,
According to the present invention, although the configuration for realizing it becomes complicated and the circuit scale becomes large, and the sensitivity of each color signal cannot be easily adjusted, these problems are solved according to the present invention. Can be easily eliminated.

That is, in the conventional device, for example, A in FIG.
In response to the setting of the defect detection operation period as shown in FIG. 7, the read pulses (XSGG1, XSGG2, XS
GR1, XSGR2, XSGB1, XSGB2). Therefore, from each CCD 3R, 3G, 3B,
(CCDRch, CCDGch, CCDBc in FIG. 3)
h), the test signals (G1, G2, R1, R
2, B1, B2) were taken out.

In this case, as shown in FIG. 3B, the timings at which the inspection signals (G1, G2, R1, R2, B1, B2) are taken out are the same, and if there are no three defect detection circuits, three CCD defects are detected. The pixel cannot be detected. On the other hand, in the present invention, as shown in FIG. 2B, the inspection signals (G1, G2, R1, R2, B1,.
The extraction timing of B2) is different, and a single defect detection circuit can detect defective pixels of three CCDs.

Thus, according to the above-described method and apparatus for detecting a defect in a solid-state imaging device, a plurality of solid-state imaging devices are provided, and charge is accumulated for a predetermined period in a state where incident light to the plurality of solid-state imaging devices is blocked. In the defect detection method for a solid-state imaging device that takes out the accumulated charge and detects a pixel defect of a plurality of solid-state imaging devices, a charge accumulation time is selected according to the sensitivity set for each of the plurality of solid-state imaging devices. In this way, the timing of taking out the accumulated charge is changed in accordance with the difference in the accumulation time, and the timing of differentiating the accumulated charge is changed to detect the defect of the pixels of the plurality of solid-state imaging devices in a time division manner. By using a single detection means, the sensitivity of each color signal can be easily adjusted, and for example, a defect detection cycle can be performed at each timing. By using a time divided manner, it is capable of detecting the pixel defect of the plurality of solid-state imaging device in one of the defect detection circuit, for example.

In the method and apparatus described above, for example, the memory 25 in FIG. 1 may be configured to store the address value of a pixel where a defect is detected. Therefore, in this case, at the time of photographing, when the address value stored in the memory 25 matches the value of the address counter 24, a defective pixel is recognized and correction is performed. In this case, for example, when the number of defects exceeds the storage capacity of the memory 25, the microcomputer 8 can adjust the charge accumulation period to perform detection with reduced overall sensitivity.

[0038]

Therefore, according to the first and second aspects of the present invention,
The charge accumulation time is selected according to the sensitivity set for each of the plurality of solid-state imaging devices, and the timing of extracting the accumulated charge is made different, so that the sensitivity of each color signal can be easily adjusted. For example, by using a defect detection circuit in a time-division manner for each timing,
For example, a single defect detection circuit can detect pixel defects of a plurality of solid-state imaging devices.

Thus, in the conventional method and apparatus,
According to the present invention, although the configuration for realizing it becomes complicated and the circuit scale becomes large, and the sensitivity of each color signal cannot be easily adjusted, these problems are solved according to the present invention. Can be easily eliminated.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an example of a solid-state imaging device to which a defect detection method and device according to the present invention is applied.

FIG. 2 is a diagram for explaining the operation.

FIG. 3 is a diagram for explaining the operation of a conventional device.

FIG. 4 is a configuration diagram of a conventional single-plate solid-state imaging device.

FIG. 5 is a configuration diagram of a conventional multi-plate solid-state imaging device.

[Explanation of symbols]

1: Iris, 2: Spectroscopic device, 3R, 3G, 3B: CC
D, 4R, 4G, 4B: sample hold and AGC circuit, 5R, 5G, 5B: defect detection and correction circuit, 6: signal processing circuit, 7: output terminal, 8: microcomputer, 9
... Timing generation circuit, 10 ... CCD drive circuit, 11 ...
Synchronization generation circuit, 20R, 20G, 20B: defect correction circuit, 21R, 21G, 21B: clamp circuit, 22: selector, 23: defect detection circuit, 24: address counter, 25: memory

Claims (2)

[Claims] 1. A plurality of solid-state imaging devices, wherein charge is accumulated for a predetermined period in a state where incident light to the plurality of solid-state imaging devices is blocked, and the accumulated charges are taken out to obtain the plurality of solid-state imaging devices. In the defect detection method for a solid-state imaging device for detecting a defect of a pixel of an element, the charge accumulation time is selected according to the sensitivity set for each of the plurality of solid-state image pickup elements, and the charge accumulation time is determined according to the difference in the accumulation time. The timing of taking out the accumulated charge is made different, and the accumulated charge taken out by making the timing different is switched to detect a defect of a pixel of the plurality of solid-state imaging devices by a single unit in a time-division manner. A defect detection method for a solid-state imaging device, wherein the method is performed by using the method. 2. A solid-state imaging device comprising: a plurality of solid-state imaging devices; and accumulating electric charges for a predetermined period in a state in which light incident on the plurality of solid-state imaging devices is blocked; In a defect detection device of a solid-state imaging device that detects a defect of a pixel of an element, a unit that controls a charge accumulation time of the plurality of solid-state imaging devices is provided, and the charge accumulation time is set to each of the plurality of solid-state imaging devices. In addition to the selection according to the sensitivity set in the above, the storage charge extracted at different timings according to the difference in the storage time is switched to a single detection unit that detects a defect of a pixel of the solid-state imaging device by time division. Wherein the single detecting means detects a defect in each pixel of the plurality of solid-state imaging devices.