JPH10313418A - Digital gamma correction circuit, liquid crystal display device using the same and electronic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the capacity of a memory used to apply gamma correction to received digital image data according to a gamma correction characteristic whose input-output characteristic is represented as a curve. SOLUTION: A correction circuit corrects received digital image data into digital image data suitable for display drive in a liquid crystal display section according to a gamma correction characteristic including a curve. Correction data corresponding to the gamma correction characteristic represented by a curve are divided into reference straight line data placed on at least one reference straight line, and difference data added to or subtracted from the reference data. The difference data are stored in a RAM 102 in cross reference with the received digital image data. Data on at least one reference straight line are outputted from a 3rd selector 130 that selects one or a plurality from bit shifters 104A-104C and fixed data. The data are added by an adder 132, from which final correction data on a curve are found.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital gamma correction circuit for correcting input digital image data into digital image data having an applied voltage-transmittance characteristic of a liquid crystal display section, and a liquid crystal display device using the same. And electronic devices. More specifically, the present invention relates to gamma correction for correcting image data subjected to gamma correction for CRT in accordance with characteristics of a liquid crystal display unit.

[0002]

2. Description of the Related Art As an image display unit of an electronic device, a thin liquid crystal display panel has been widely used in place of a conventional relatively large CRT. In the liquid crystal display panel, as shown in FIG. 14, the TV characteristic indicated by the relationship between the applied voltage V and the transmittance T is not linear. In particular, the change in the transmittance T with respect to the change in the applied voltage V is small near the black level where the gradation value is low. Therefore, near the black level, there is little change in the gradation (light transmittance T) with respect to the change in the image data (applied voltage V), and the resolution in this region is reduced. Correcting this so as to obtain an appropriate resolution in all regions is called gamma correction in a liquid crystal display device.

On the other hand, even in a CRT including a television receiver, there is a similar phenomenon that the input signal voltage and the light emission output are not linear. CR
Gamma correction for T is performed. Therefore, gamma correction is not required on the side of the television receiver using the CRT.

[0004] Here, it is known to perform gamma correction in a photographing camera digitally. Japanese Patent No. 25428 discloses an example in which a gamma correction is performed by performing a linear approximation calculation using a photographing camera.
No. 64 and JP-A-8-32837. Japanese Patent Application Laid-Open No. H2-230873 discloses that digital gamma correction is performed by a photographic camera by using both a linear approximation operation and a memory.

Here, in order to display an image on a liquid crystal display panel based on a television signal, gamma correction for a CRT is unnecessary, and finally gamma correction is performed in accordance with the TV characteristics of the liquid crystal display panel. Must be implemented.

To perform gamma correction when an image is displayed based on a television signal by a projector using a liquid crystal display panel as a light valve is disclosed in Japanese Patent Application Laid-Open No. 8-18 / 1994.
No. 6833. However, in this publication,
There is no clear disclosure of gamma correction for a television signal that has been subjected to gamma correction for CRT in advance, and since gamma correction at the subsequent stage is performed in analog, a liquid crystal drive circuit including a gamma correction circuit cannot be integrated into an IC. Was.

The analog gamma correction is performed by using a diode or the like and using a gamma correction characteristic of one-point break as shown in FIG.

[0008] However, since the characteristics vary among the individual diodes, adjustment for uniform characteristics in each liquid crystal display device is complicated. Further, in a case where a total of three liquid crystal display panels for R, G, and B are used in the same device, such as a color projector, adjustment between the three liquid crystal display panels is necessary, which is complicated. Met.

Further, with the gamma correction characteristic of one-point break as shown in FIG. 16, only the black level region of the TV characteristic shown in FIG. 14 can be corrected, and the correction in the black level region is performed by linear approximation. For this reason, there has been a limit in securing accurate correction suitable for TV characteristics.

Here, in order to perform the correction more faithfully by the TV characteristic shown in FIG. 14, since there is a limit in the gamma correction characteristic of one-point breaking, correction using a curve or correction using many straight lines is required. desired.

However, such a correction requires a memory, and if the capacity of the memory increases, it becomes difficult to integrate a liquid crystal drive circuit including a gamma correction circuit into an IC.

SUMMARY OF THE INVENTION It is an object of the present invention to minimize the storage capacity of a memory table for gamma correction in accordance with the TV characteristics unique to individual liquid crystal display panels, and to enable gamma correction to enable the liquid crystal drive circuit to be integrated into an IC. An object of the present invention is to provide a circuit, a liquid crystal display device and an electronic device using the circuit.

[0013]

According to a first aspect of the present invention, there is provided a digital gamma correction circuit for correcting input digital image data into digital image data suitable for display driving in a liquid crystal display unit in accordance with a gamma correction characteristic including a curve. In, the correction data corresponding to the gamma correction characteristic to be a curve is divided into reference straight line data located on at least one reference straight line and difference data to be added or subtracted therefrom, and the difference data is input digital image data And a memory table stored in association with the input digital image data, a straight-line approximation calculating unit that outputs data on the at least one reference straight line, and the difference data output from the second memory table, A calculation unit for adding or subtracting the reference straight line data output from the straight line approximation calculation unit. It is characterized in.

According to the first aspect of the present invention, when digital gamma correction is performed on image data in accordance with a gamma correction characteristic that becomes a curve, the memory table stores a reference straight line set for the curve and the curve between the reference straight line and the curve. Need only be stored in the memory table. Since the number of bits of the difference data can be smaller than the number of bits of the correction data on the curve, the capacity of the memory table can be reduced accordingly.

On the other hand, the data on the reference straight line is obtained by a straight line approximation calculation unit in accordance with the input image data, and the data on the reference straight line and the difference data are added or subtracted by the calculation unit, and the final correction on the curve is performed. Data is required.

According to a second aspect of the present invention, in the first aspect, in an area other than the gamma correction characteristic, which is a curve, the input digital image data is corrected by linear approximation using at least one correction straight line. A part of the straight line approximation calculation unit is also used for calculating and outputting data on the at least one reference straight line and the correction straight line.

According to the second aspect of the present invention, the curve is corrected for a part of all the gradation values of the input image data, and the linear correction is performed for the other part, so that the capacity of the memory table is further reduced. In addition, since the data on the reference straight line at the time of curve correction is obtained by also using a part of the straight line approximation calculation unit,
The circuit scale can be reduced. An example of this shared circuit is
It is defined in claim 3.

According to a fourth aspect of the present invention, there is provided a straight line for linearly approximating input digital image data for each straight line approximation section using a plurality of straight lines, and correcting the digital image data to digital image data suitable for display driving in a liquid crystal display unit. In the digital gamma correction circuit having an approximation operation unit, the straight line approximation operation unit converts the reference correction data common in a line approximation section of a 2 ^k (k is a natural number) gradation range of the input digital image data into each linear approximation section. The first memory table stored for each straight line and the reference correction data corresponding to each straight line within the straight line approximation section of the ^2k gradation range are added or subtracted at least (2
a second memory table for storing ( ^k- 1) pieces of difference data, and the reference correction data and the difference data respectively read from the first and second memory tables in accordance with the gradation values of the input digital image data. And an arithmetic unit for adding or subtracting.

According to the fourth aspect of the present invention, it is possible to reduce the capacity of a memory used when performing a straight line approximation operation using a plurality of straight lines. In other words, the difference data to be added or subtracted from the reference correction data corresponding to each straight line within the straight line approximation section of the ^2k gradation range is such that at least (2 ^k -1) difference data per line is shared for the same straight line. Can be used. Therefore, the capacity of the second memory table can be reduced by the difference data that can be used for the same straight line. At least (2
^k -1) had been a number of difference data, when the boundary point between the straight line does not match the start point or end point of the 2 ^k gray-scale range, the difference data of 2 ^k grayscale range including the boundary points and special Because it becomes. If the boundary point between the straight lines coincides with the start point or end point of the 2 ^k gradation range, only (2 ^k −1) difference data per straight line is required. Since the linear approximation section is set for each 2 ^k gradation range, only the upper bits of the input image data can be used for addressing the first memory table.

According to a fifth aspect of the present invention, a straight line for linearly approximating input digital image data for each straight line approximation section using a plurality of straight lines and correcting the digital image data to digital display data suitable for display driving in a liquid crystal display unit. In the digital gamma correction circuit having an approximation operation unit, the straight line approximation operation unit converts the reference correction data common in a line approximation section of a 2 ^k (k is a natural number) gradation range of the input digital image data into each linear approximation section. (2 ^k −1) per line, which is added or subtracted from the first memory table stored for each straight line and the reference correction data corresponding to each straight line within the straight line approximation section of the 2 ^k gradation range. A second memory table for storing at least one difference data for each straight line among the difference data; and at least one difference for each straight line from the second memory table. A difference data calculation unit that calculates the remaining difference data in the straight line approximation section for each straight line based on the data, and the first memory table based on a gradation value of the input digital image data. A calculating unit for adding or subtracting at least one difference data from the second memory table or another difference data from the difference data calculating unit to the reference correction data.

According to the fifth aspect of the present invention, the capacity of the second memory table can be further reduced as compared with the fourth aspect of the present invention. That is, the second memory table stores at least one difference data for each straight line among (2 ^k -1) difference data per straight line.
The remaining difference data is obtained by calculation in the difference data calculation unit.

Each of the inventions of claims 6 and 7 is based on claim 4 or 5
Is characterized in that the value K of the gradation range 2 ^K is set to 2 or 3. This is because when K is 1, the number of reference correction data increases, and the capacity of the first memory table increases. This is because when K is 4, the number of difference data increases and the capacity of the second memory table increases.

Claims 8 and 9 define a liquid crystal display device and an electronic device including the above-described digital gamma correction circuit. In these devices, a liquid crystal having excellent image quality in which the applied voltage-transmittance characteristic of the liquid crystal display panel is compensated. Display becomes possible.

[0024]

Embodiments of the present invention will be described below with reference to the drawings.

(Overall Description of Data Processing Circuit) FIG. 1 is a block diagram schematically showing a data processing / liquid crystal display driving circuit for driving a liquid crystal display panel. In this embodiment shown in FIG. 1, three liquid crystal display panels are respectively R, G, B
The present invention is applied to a projector used as a light valve. In this embodiment, the three liquid crystal display panels are constituted by active matrix substrates using TFTs as switching elements, but other liquid crystal display substrates can be used.

In FIG. 1, the liquid crystal display device of this projector is roughly divided into a signal processing board 10 used for data processing of each color R, G, B, and a liquid crystal provided for each color R, G, B. Display-only boards 30R, 30G, 30B
And three liquid crystal display panels 50R, 50G, and 50B respectively functioning as three light valves.

The signal processing board 10 is an overall control board on which elements and circuits for realizing the following functions are mounted in addition to various circuits (not shown) for a projector, which is an electronic apparatus of the present embodiment. You can also. First, as input terminals for image data, a first input terminal 12 for inputting an analog television signal such as NTSC or PAL, and a second input terminal 14 for inputting a digital image signal such as a computer output or a CDROM output. Having. Here, the analog television signal input to the first input terminal 12 is C
Although gamma correction is performed in consideration of the characteristics of the RT, the digital image signal input to the second input terminal 14 is not gamma corrected. It is also possible to provide another terminal for inputting a digital image signal subjected to gamma correction for a CRT, such as a CCD camera output.

The first input terminal 12 has an AD converter 1
6 are connected to perform analog-to-digital conversion of the television signal. Further, a digital decoder 18 is connected to the AD converter 16. This digital decoder 18
Calculates the luminance signal Y and the color difference signals U and V in the television signal,
The signal is decoded into R, G, and B signals of three colors.

A frame memory 20 is provided downstream of the digital decoder 18. The data input through the first input terminal 12 is stored in the frame memory 20 via the AD converter 16 and the digital decoder 18 as one.
It is written for the frame. Digital R, G, and B data input through the second input terminal 14 is directly written into the frame memory 20. The liquid crystal display panel 50
When the interlaced scanning is performed in R, 50G, and 50B, one frame of R, G, and B data is read out of the frame memory 20 in two fields in the order of odd lines and even lines. It is.

A primary gamma correction circuit 24 is connected to the subsequent stage of the frame memory 20 via a switch 22. When the data from the frame memory 20 is data input through the first input terminal 12, the switch 22 outputs the data to the primary gamma correction circuit 24. R, G, B which are the above-mentioned CCD camera outputs
Similarly, the primary gamma correction circuit 2
4 is input. On the other hand, when the data from the frame memory 20 is data input through the second input terminal 14, the switch 22 does not lead the data to the primary gamma correction circuit 24 but directly passes through the bypass line 26. To the liquid crystal display dedicated boards 30R, 30G and 30B.
The details of the primary gamma correction circuit 24 will be described later.

Next, the liquid crystal display dedicated board 30R and the liquid crystal display panel 50R will be described with reference to FIG. FIG. 5 is a block diagram of a liquid crystal driving IC mounted on the liquid crystal display dedicated board 30R. The configuration of the liquid crystal driving IC for the other colors G and B is the same as the configuration of the color R.

A secondary gamma correction circuit 32 is provided on the liquid crystal display dedicated board 30R. The details of the secondary gamma correction circuit 32 will also be described later.

At a stage subsequent to the secondary gamma correction circuit 32, a phase expansion circuit 34 is provided. This phase expansion circuit 34
Data phase expansion is performed to reduce the driving frequency of the liquid crystal display panel 50R. For this purpose, as shown in FIG. 5, a shift register 200 and a latch circuit 202 are provided. In FIG. 5, for convenience of explanation, 4 in the case of N = 4
This is an example of phase development. The phase expansion circuit 3 of FIG.
Operation 4 will be described with reference to the timing chart of FIG.

Data of each pixel is input to the phase expansion circuit 34 in a time series in accordance with the dot clock of FIG. As an output from the shift register 200, FIG.
As shown in FIG. 3, the output line for R color data is divided into N lines, pixel data of 0, 0 + N, 0 + 2N,... Is assigned to the first output line, and 1, 1 + N, 1 + 2N for the second output line. ,
.. Are assigned, and similarly, pixel data is assigned to the remaining two output lines and output. In this case,
The data time of the pixel on each output line can be N times the original data time. This is called N-phase development. As described above, since the data time of each pixel becomes longer, the sampling frequency at the time of data sampling in the liquid crystal display panel 50R becomes 1 / N, and especially in the case of a liquid crystal display panel having a high pixel density, the response of the switching element is reduced. The combined sampling frequency can be used. When the liquid crystal display panel 50R has a high pixel density called XGA, unless phase expansion is performed, the data sampling frequency in the liquid crystal display panel becomes as high as 65 MHz, and the TFT cannot respond. Thus, a 12-phase expansion with N = 12 is performed to reduce the sampling frequency to a value that can be responded by the TFT. In the case of VGA and SVGA having a lower pixel density than this, a sampling frequency responsive to the TFT can be obtained by the six-phase expansion where N = 6.

In this embodiment, data of four output lines in the case of four-phase development is latched by the latch circuit 202 at the same timing. As a result, the output of the latch circuit 202 becomes as shown in FIG. 13, and the phases of the data of the respective output lines are aligned. Without providing the latch circuit 202, the data of the four output lines may be sampled at different timings or at the same timing in the liquid crystal display panel 50R.

A polarity inverting circuit 36 is provided at a stage subsequent to the phase expanding circuit 34. The polarity inversion circuit 36 is provided for inverting the polarity of the electric field applied to the liquid crystal of each pixel of the liquid crystal display panel 50R at a predetermined cycle to drive the polarity inversion. In this embodiment, since the switching element of the liquid crystal display panel is constituted by a TFT, the polarity of the data potential supplied to the pixel is inverted with respect to the potential of the common electrode formed on the substrate facing the TFT substrate. It is driven.

The digital data processing for the polarity inversion may be performed by inverting the logic of the digital data. Therefore, as shown in FIG. 5, the polarity inversion circuit 36 includes four inverters 210A to 210D for inverting the data logic of the four output lines and four inverters for selecting and outputting one of the data before and after the inversion. Selectors 212A-212D
Having. When polarity inversion driving is performed for each pixel, for example, data before inversion is selected by the first and third selectors 212A and 212C, and the second and fourth selectors 212B and 212B are selected.
At 212D, the inverted data is selected.

A DA converter 38 having four converters 38A to 38D is provided downstream of the polarity inversion circuit 36, and performs digital-to-analog conversion of the polarity-inverted data of the N lines that have undergone phase development. This analog signal is the output of the liquid crystal display drive IC.

The liquid crystal display drive IC is provided with a timing generation circuit 220, and the above-described phase expansion circuit 34, polarity inversion circuit 36, and DA converter 38 generate necessary timing signals based on the image synchronization signal. You.

As shown in FIG. 1, the liquid crystal display dedicated board 30R is further provided with an amplifier 40 and a buffer 42. The data on which the bias voltage corresponding to the positive and negative polarity inversion drive is superimposed by the amplifier, for example, the operational amplifier 40, is supplied to the liquid crystal display panel 50R via the buffer 42, and the liquid crystal display panel 50R is controlled based on the data. The polarity inversion driving is performed at a predetermined cycle such as one dot or one line.

(Relationship between Primary Gamma Correction and Secondary Gamma Correction) In this embodiment, gamma correction is performed in two steps. The first gamma correction is called primary gamma correction, and the second correction is called secondary gamma correction. However, in this embodiment, since all of the corrections are digital corrections, the same result can be obtained even if the correction order is reversed. However, as in this embodiment, the boards 30R, 30G, 3
When the secondary gamma correction circuit 32 is mounted on the 0B side, the adjustment process of the liquid crystal display panel, which will be described later, is simplified, and the circuit mounted on the liquid crystal display dedicated board can be integrated into an IC.

Here, the primary gamma correction of this embodiment is mainly performed by converting the image data subjected to the CRT gamma correction
The purpose is to return to the original data before the gamma correction for RT. Therefore, the correction data can be determined independently of the characteristics of the individual liquid crystal panels, which is different from the secondary gamma correction described later. In the case where the primary gamma correction is intended only for canceling the CRT gamma correction, and when image data that has not been subjected to the CRT gamma correction is input, the bypass line 26 is used as described above. There is no need to pass through the primary gamma correction circuit 24. Instead, for example, when image data that has been always subjected to CRT gamma correction is input, the primary gamma correction circuit 24 supplies a partial area of the TV characteristic shown in FIG. Other functions such as correction according to the above may be added. Since the primary gamma correction circuit 24 of this embodiment uses a RAM table, it can cope with the correction data stored in the RAM table only by adding those functions.

On the other hand, the secondary gamma correction circuit 32
The main object of the present invention is to perform gamma correction suitable for TV characteristics of individual liquid crystal display panels shown in FIG. This TV
Since the characteristics are different for each liquid crystal display panel, they are different from the primary gamma correction in that they always need to be adjusted. in this way,
Since it is necessary to change gamma correction data according to each liquid crystal display panel, it is necessary to change the gamma correction data separately from the correction (primary gamma correction) mainly for canceling the gamma correction for the CRT, which does not need to be changed. High correction contents are implemented as secondary gamma correction. Moreover, the secondary gamma correction circuit 3
The adjustment process can be simplified by mounting the liquid crystal display 2 on a boat dedicated to liquid crystal display and forming an integral structure with the display panel. further,
By performing the secondary gamma correction that needs to be changed in this way separately from the primary gamma correction, the calculation at the time of changing the secondary gamma correction data is simplified. Can be implemented.

(Description of Primary Gamma Correction Circuit) Next, details of the primary gamma correction circuit 24 will be described with reference to FIG.

FIG. 2 shows an example of the conversion characteristics of the primary gamma correction performed by the primary gamma correction circuit 24. The horizontal axis represents the input data and the vertical axis represents the output data in 256 gradations (8 bits). Represents. As described above, the purpose of the primary gamma correction is that the gamma correction for the CRT (the dashed line in FIG. 2) performed on the television signal input through the first input terminal is performed. 2 is to perform primary gamma correction and substantially return to the original data (linear characteristics indicated by broken lines in FIG. 2) before gamma correction for CRT.

The primary gamma correction circuit 24 is composed of a RAM that stores correction data addressed based on input image data. That is, when data X on the horizontal axis of FIG. 2 is input, data Y stored in advance in association with an address generated according to the input data X is read out from the RAM, and primary gamma correction is performed. You. As a result, the image data after the primary gamma correction has a substantially linear characteristic as shown by a broken line in FIG.

Here, the reason why the primary gamma correction circuit 24 is mounted on the signal processing board 10 is as follows.
That is, since the purpose of the primary gamma correction is as described above, this primary gamma correction can be carried out independently of the characteristics of the liquid crystal display panel, and production and inspection are performed ignoring the characteristics of the individual liquid crystal panels. Because it is possible.

However, in this embodiment, after the signal processing board 10 and the three liquid crystal display boards 30R, G, B are electrically connected, the individual liquid crystal display panels 50R, G,
Due to the relationship with the characteristic B, the data in the RAM table constituting the primary gamma correction circuit 24 can be rewritten. The data rewriting of the RAM can be performed in the adjustment process at the factory before the device is shipped, or may be performed by the user operating the operation unit. The data rewriting of the RAM will be described later.

(Description of Secondary Gamma Correction Circuit) An example of the secondary gamma correction circuit 32 shown in FIG. 1 is shown in FIG. Also,
FIG. 6 shows the correction characteristics of the secondary gamma correction performed by the secondary gamma correction circuit shown in FIG. In the correction characteristic of FIG.
Mainly, the TV characteristic on the black level side is compensated. Therefore, the primary gamma correction circuit 24 can have a function of gamma correction in an area other than the vicinity of the black level.

FIG. 6 shows input data of 256 gradations (8 bits) on the horizontal axis and output data of 512 gradations (9 bits) on the vertical axis. As described above, in the secondary gamma correction, by outputting a bit number larger than the bit number of the input data, it is possible to express different gradations even in an area with a small change rate. In this case, the number of gradations of the output data is doubled to 512 gradations for the input data. However, if necessary, the number of gradations may be quadrupled to 1024 gradations.

If the number of bits of the output data is an integral multiple of the number of bits of the input data, if all the output data is stored in the RAM in the same way as the primary gamma correction, the capacity of the RAM increases. Power consumption increases and R
It is difficult to incorporate the AM into the IC. Therefore, in this embodiment, as described below, the output data of only the area A in FIG. 6 is stored in the RAM to reduce the capacity.

In FIG. 5, the secondary gamma correction circuit 3
2, a correction unit 32A using a RAM used for the secondary gamma correction of the area A of the hatched portion in FIG.
A linear approximation correction calculation unit 32B mainly used for the secondary gamma correction of the area B other than that in FIG. Correction unit 32
A and the correction unit 32B, the bit shifters 104A to 104A
4B is also used. Here, the straight line in the area B in FIG. 6 is represented by Y = a × X + b, a is referred to as inclination data, and X =
The value b of Y at 0 is called offset data. Also,
The input data c located at the boundary between the areas A and B is called boundary data.

As shown in FIG. 5, the secondary gamma correction circuit 32 includes an address generation unit 100 and a RAM as a correction unit 32A for performing the secondary gamma correction in the area A.
102, bit shift circuits 104A to 104B, a third selector 130, and an adder 132. In addition,
The adder 132 can also perform subtraction if necessary.

Here, in FIG. 6, a reference straight line Y 'is assumed in the area A, and only the difference data between the reference straight line Y' and the final correction data is stored in the RAM 102 in FIG. I have. This will be described with reference to FIG. 7 which is a partially enlarged view of FIG. 6. The data on the reference straight line Y ′ in the area A is obtained by the bit shifters 104A to 104C and the third selector 130 by a linear approximation calculation. , And only the difference data Δ1, Δ2.
2 is stored. Therefore, the capacity of the RAM 102 is further reduced.

The address generator 100 generates an address based on the input image data X, and reads out the difference data in the RAM 102 corresponding to the address.
Since the boundary data c is input to the address generation unit 100, no address is generated from the address generation unit 100 when image data having a value larger than the boundary data c is input. Therefore, in this case, the RAM 102
, And power consumption can be reduced accordingly. The difference data from the RAM 102 is added by an adder 132 to data on a reference straight line Y ′ output via a third selector 130 described later.

On the other hand, as a linear approximation correction operation unit 32B which mainly performs the secondary gamma correction in the area B in FIG. 6, for example, three bit shifters 104A, 104B and 104C for bit shifting the input image data, and a set inclination. A first selector for selecting at least one bit shifter output based on the data a;
06, the offset data b is added to the output of Y = a ·
And an adder 108 for calculating X + b. The adder 108 can also perform subtraction if necessary.

The bit shifter 104A shifts the input image data X upward by one bit and outputs a value of 2 · X. The bit shifter 104B shifts the input image data X by one bit to the lower side and outputs a value of (（) · X. The bit shifter 104C shifts the input image data X by 2 bits to the lower side and outputs a value of (（) · X.

In the first selector 106, the inclination data a is "1/4", "1/2", "3/4", "2", "2+
When they are "1/4" and "2 + 3/4", one or more corresponding outputs among the bit shifters 104A to 104C are selected.

On the other hand, the third selector 130 of the correction unit 32A
Selects data matching the reference straight line Y 'from the three bit shifters 104A to 104C and the fixed data. The output of the third selector 130 and the RAM 1
The difference data from 02 is added or subtracted by the adder 132 (FIG. 6 shows an example of addition), and correction data in the first area A of FIG. 6 is obtained.

As described above, the three bit shifters 104A
The outputs of .about.104C are used for the linear approximation calculation in the area B of FIG.
Is also used for the linear approximation calculation using Third selector 1
The fixed data input to 30 is used alone when the reference straight line Y 'is parallel to the X axis, that is, when the inclination is zero, or the fixed data of the reference straight line Y' added to the calculation results of the three bit shifters 104A to 104C. Is used as offset data.

The area determining unit 110 compares the value of the input image data with the boundary data c, and determines that the area is A if X ≦ c, and determines that the area is B if X> c. Based on the determination result of the area determination unit 110, the second selector 112 selects the output of the adder 132 in the area A, and selects and outputs the output of the adder 108 in the area B.

According to the circuit of FIG. 5, when the area judgment section 110 judges that the input image data X belongs to the area A of FIG. 6, the third selector 13 to which the judgment signal is inputted is inputted.
At 0, any one or more of the data matching the reference straight line Y ′ in FIG. 6 are selected from the three bit shifters 104A to 104B and the fixed data. Also, based on the address generated by the address generator 110 in correspondence with the input image data X, the RAM 102
Is output. These are added by an adder 132, and the output of the adder 132 is
2 is selected.

In this way, the number of bits of the differential data is smaller than the number of bits of the final correction data in the area A in FIG. 6, so that the capacity of the RAM 102 in FIG. 5 can be reduced.

The number of reference straight lines Y 'set in the area A is not limited to one, and a plurality of reference straight lines can be set. In this case, the area determination unit 110 determines which of the straight-line approximation sections the image data X belongs to using a different straight line, and based on the determination result, the third selector 130 determines that the image data X corresponds to the reference straight line. What is necessary is just to select data similarly to the above.

In this embodiment, the area A in which the change rate of the applied voltage-transmittance is not uniform in FIG. 6 uses the RAM 102 and the area in which the change rate of the applied voltage-transmittance is almost constant and has a characteristic close to a straight line. In B, correction data is obtained by linear approximation calculation. The purpose of this secondary gamma correction is to make the TV curve of FIG. 14 showing the correlation between the applied voltage V and the light transmittance T of the liquid crystal display panel, such that the applied voltage V in the region near the black level where the gradation value is low. An object of the present invention is to prevent a decrease in resolution in a region near a black level caused by a small change in transmittance with respect to the change. For this reason, in the present embodiment, of the correction data of the area A, only the difference data with respect to the reference straight line Y ′ is calculated as R
Since it is stored in the AM 102, the capacity of the RAM 102 can be reduced to reduce power consumption, and the RAM 102 can be built in an IC.

When the area B in FIG. 6 is approximated by a straight line based on a plurality of straight lines, the following configuration may be used. First, a register for storing the inclination data and offset data of each straight line is added to the circuit of FIG. Further, boundary data of a straight line approximation section using each straight line is set in the area determination unit 110 of FIG. Then, the area determination unit 11
Based on the instruction from 0, the inclination data read from the register may be output to the first selector 106, and the offset data may be output to the adder 108.

(Change of secondary gamma correction data)
Since the characteristics of the individual liquid crystal display panels are different from each other, it is necessary to adjust the gamma correction data according to the characteristics of the individual liquid crystal display panels at least before shipment in a factory. For this purpose, as shown in FIG. 8, an operation unit 300 for inputting data for adjustment, a storage unit for storing TV characteristics of individual panels, for example, a PROM 302, and an operation unit 300 and a PROM 302 Based on the information,
A CPU 304 for calculating various adjustment data. The operation input unit 300 and the PROM 302
The CPU 304 is incorporated in an adjustment device installed in the factory when such adjustment can be performed only at the factory shipment stage, and when the user can make adjustments, the overall control board 10 and the liquid crystal display It is mounted on the substrate 30R or another built-in substrate. These operations will be described in different cases.

In the adjustment process before shipment of the device, the TV characteristics of the individual liquid crystal display panels 50R, 50G, 50B are measured and stored in the PROM 302, respectively.
Thereafter, a predetermined pattern is formed on the liquid crystal display panels 50R, 50R.
G, 50B to display on the panel or R, G, B
Is visually inspected and inspected, for example, on a projector screen on which is synthesized.

As a result of this inspection, in order to change the secondary gamma correction data in the area A in FIG. 6, the contents of the RAM 102 and the data a, b, and c supplied to the linear approximation operation unit may be changed. For example, a case will be described in which a command to increase the gradient of the area A in FIG. In this case, CP
U 304 calculates the correction data of the RAM 102 in the second gamma correction unit 32 based on the TV characteristics in the PROM 302 and the newly set reference line Y ′, and based on the calculation result, Overwrites the correction data in. The CPU 304 also changes the correction data of the area B in accordance with the change of the correction data of the area A. This change is performed by changing and setting the inclination data a and the offset data b. Further, the boundary position between the areas A and B can be changed based on a command from the operation input unit 300. In this case, the CPU may change the 304 boundary data c.

(Change of primary gamma correction data)
In the present embodiment, by changing the primary gamma correction data for the entire screen, it is possible to adjust the contrast ratio and the brightness over the entire screen.

The adjustment of the contrast ratio is performed by operating, for example, a rotary knob for adjusting the contrast ratio of the operation input unit 300. For example, the primary gamma correction characteristic of the solid line in FIG. 3 can be changed to the primary gamma correction characteristic of the broken line in FIG. Thus, the correction data of the RAM table in the primary gamma correction circuit 24 is
Rewriting to include the contrast ratio adjustment data increases the contrast ratio.

On the other hand, the brightness adjustment is performed by operating, for example, a rotary knob for brightness adjustment of the operation input unit 300. For example, while maintaining the gradient of the primary gamma correction characteristic of the solid line in FIG. 4, the whole can be shifted so as to become the primary gamma characteristic of the broken line in FIG. As described above, the correction data of the RAM constituting the primary gamma correction circuit 24 is
Rewriting to include the brightness adjustment data lowers the brightness of the entire screen.

As described above, the contrast ratio of the entire screen,
In order to adjust the luminance, the contents of the primary gamma correction RAM table storing the primary gamma correction data for the entire area, instead of the secondary gamma correction RAM table 102 storing the correction data for some areas, are rewritten. Can be easily handled.

(First Modification of Secondary Gamma Correction Circuit) This embodiment uses the circuit of FIG. 5 and performs correction in accordance with the secondary gamma correction characteristic of FIG. The secondary gamma correction characteristic shown in FIG. 9 has an advantage that the secondary gamma correction characteristic shown in FIG. 6 is closer to the ideal secondary gamma correction characteristic shown in FIG. . Also, by utilizing the secondary gamma correction characteristic of FIG. 9, FIG.
Even if the first driving range shown in FIG. 14 is expanded to the second driving range toward the low-voltage driving region having a large curvature on the white level side shown in FIG. That is, the driving range can be expanded to a range that cannot be realized by the linear approximation. As described above, by expanding the driving range on the white level side, the upper limit of the transmittance is widened, and the contrast ratio is further increased. As a result, even if the power of the backlight is reduced, the same brightness as before can be secured,
This has the effect of reducing power consumption. Further, since the drive voltage range is widened, there is also an advantage that the step of the voltage per gradation is widened and the S / N ratio is increased.

When the correction is performed using the secondary gamma correction characteristic shown in FIG. 9, the regions A and B shown in FIG. 9 can be corrected in the same manner as the above-described embodiment according to the secondary gamma correction characteristic shown in FIG.

In this embodiment, the difference data with respect to the reference straight line Y ″ is also stored in the RAM 1 for the white level side area C in FIG.
02 stores the correction data. Therefore, when the area determination section 110 of the secondary gamma correction circuit of FIG. 5 determines that the input image data X satisfies X> j, the area determination section 110 of FIG. The difference data of the area C is read. Further, the data of the reference straight line Y ″ is selected by the third selector 130, and the difference data is added or subtracted from the data of the reference data Y ″ by the adder 132 (this embodiment is an example of the case of subtraction). is there). Further, the adder 132 is
Output is selected.

This embodiment can also be applied to the case of a secondary gamma correction characteristic in which a straight line is approximated using a plurality of straight lines in the region B between the regions A and C in FIG.

(Second Modification of Secondary Gamma Correction Circuit) In this embodiment, secondary gamma correction is performed by linear approximation using a RAM, for example, over the entire gradation range.
This is to reduce the capacity of AM. FIG. 10 shows the secondary gamma correction circuit of this embodiment, and FIG.
It is shown in FIG.

In FIG. 10, the secondary gamma correction circuit includes a RAM 140, a register address generator 142, a register 144, and an adder 146.

The RAM 140 stores reference correction data D (0), D (4), D (8),... D (n), D (n) in FIG.
+4),... Are stored. The reference correction data is correction data for every 2 ^k (k is a natural number) gradations, for example, every 4 gradations of the input image data. As for a straight line, the reference correction data is shared in each straight line approximation section of the four gradation range of the input image data. N in FIG. 11 is a multiple of 4, and the reference data for each gradation of multiples of 4 is shown in FIG.
As shown in FIG. 1, D (0), D (4), D (8),.
D (n), D (n + 4),...

The RAM 140 is used for every four gradations of the input image data.
, Only the upper 6 bits of the 8-bit input image data are stored in the RAM 140.
Used as the address of

The register 144 stores the difference data Δ1, Δ2, Δ3,..., Δ15,.
In each straight line approximation section of the 2 ^k gradation range for the same straight line, there are only 2 ^k −1 difference data.
In each straight line approximation section of the straight line f1 (X), there are three types of difference data, Δ1, Δ2, and Δ3. Similarly, in each straight line approximation section of the straight line f2 (X) in FIG.
7, Δ8, and Δ9, and a straight line f3 in FIG.
In each straight line approximation section of (X), the difference data is Δ13, Δ
14, Δ15. Further, in the present embodiment, an example is given in which the boundary points between the straight lines are inconsistent with the position of the input image data for every four gradations. Therefore, independent difference data is required even in a linear approximation section of the four gradation range including this boundary point. Difference data of Δ4, Δ5, Δ6 in FIG.
The difference data of Δ10, Δ11, and Δ12 becomes difference data in the four gradation range including the boundary point. When the boundary points between the straight lines coincide with the positions of the input image data for every four gradations, these difference data become unnecessary.

A register address generator 142 is provided to read out various types of difference data in the register 144. This register address generation unit 142
Based on the input image data of bits, an address for reading the corresponding difference data is generated. Since there is no difference data corresponding to image data having a gradation value that is a multiple of 4, no address is generated from the register address generation unit 142 at this time. Then, the read difference data is added to or subtracted from the reference correction data from the RAM 140 by the adder 146 (FIG. 14 shows an example in which addition is performed), and this is combined with the image data after the secondary gamma correction. Become.

Next, the operation of the secondary gamma correction circuit will be described. For example, in FIG. 11, when image data having a gradation value n which is a multiple of 4 is input to the secondary gamma correction circuit, While the correction data D (n) is read, no address is generated in the register address generator 142. Therefore, the reference correction data D (n) is output from the adder 146. When the image data of the gradation value (n + 1) is input to the secondary gamma correction circuit, RA
The same reference correction data D (n) is read from M140, and the difference data Δ10 is output from the register 144 based on the address in the register address generator 142. Therefore, the adder 146 outputs D (n) + Δ10.

As described above, in the present embodiment, while the secondary gamma correction is performed by using the linear approximation, the bit shift used in each of the above embodiments is not required, and the RAM 1
40, the storage capacity of the register 144 is reduced. Moreover, in the present embodiment, the bit shift for fixedly setting the inclination of each straight line is not used, and the inclination of each straight line is stored in the RAM 14.
0, since it can be determined only by the contents stored in the register 144, the degree of freedom of the inclination of the straight line is increased.

If the interval between the gradation values of the input image data corresponding to the individual reference correction data is every 2 ^k gradations,
It is preferable that the address designation of the RAM 140 can be performed by using a part of the bit number of the input image data as it is. This interval is optimal for every 4 tones or every 8 tones. This is because if the interval is every two gradations, the number of types of reference correction data increases, and the capacity of the RAM 140 increases.
If the interval is every 16 gradations, the types of difference data increase,
This is because the capacity of the register 144 increases.

This embodiment is not limited to the case where correction is performed by linear approximation for all gradation areas of input digital image data. For example, the circuit of FIG. 10 can be applied to a case where the region B of FIG. 6 is approximated by a plurality of straight lines and correction data of the region B is obtained.

(Third Modification of Secondary Gamma Correction Circuit) This embodiment is a modification of the secondary gamma correction circuit of FIG. 10, and the circuit configuration is shown in FIG. 12, the RAM 140 and the adder 146 have the same functions as those in FIG. Register address generator 142 in FIG.
Instead of the register 144 and the register 144, the circuit of FIG. 12 has the following configuration.

First, a slope data register 150 is provided, and each straight line f1 (x), f2 (X), f3 shown in FIG.
(X),... Among the differential data of (x),..., The minimum differential data Δ1, Δ7, Δ1 in a section other than the linear approximation section including the boundary point.
.. Are stored as inclination data 1, 2, 3,.

Here, the difference data Δ1 of the straight line f1 (X)
Considering difference data Δ2 and Δ3 other than the above, Δ2 = 2 × Δ1 (1) Δ3 = Δ1 + Δ2 (2) The relationship between the difference data is the same for other straight lines.

For this reason, as shown in FIG. 12, difference data calculation units 152, 154 and 156 for calculating difference data other than the minimum difference data Δ1, Δ7 and Δ13 are provided. Each of the difference data calculation units has the same configuration, and includes a bit shifter 160 for doubling the gradient data (Δ1, Δ7 or Δ13), and a bit shifter 160
And an adder 162 for adding the output and the inclination data. The bit shifter 162 performs the operation of the above equation (1), and the adder 162 performs the operation of the above equation (2).

Difference data Δ4 to Δ in the vicinity of the boundary between straight lines
6, Δ10 to Δ12 are the boundary vicinity data register 170
Is stored in Then, the difference data calculation unit 160,
162, 164 to 〜, and the difference data from the boundary vicinity data register 170 are input,
A selector 172 for selecting any one of the difference data is provided.

Further, an area judging section 174 for outputting a select signal for selecting any one of the difference data by the selector 172 from the input image data and the boundary data.
Is provided.

Also in this embodiment, as in the embodiment of FIG. 10, the inclination of each straight line can be set based on the contents stored in the register 150, so that the degree of freedom of the inclination of the straight line used for the straight line approximation is increased. The circuit in FIG. 12 can also be applied to a case where the region B in FIG. 6 is approximated by a straight line using a plurality of straight lines.

(Explanation of Electronic Apparatus) The electronic apparatus constructed using the liquid crystal display device of the above embodiment includes a display information output source 1000, a display information processing circuit 1002, a display drive circuit 1004, a liquid crystal panel shown in FIG. Display panel 10 such as
06, clock generation circuit 1008 and power supply circuit 1010
It is comprised including. The display information output source 1000 is RO
M, a memory such as a RAM, a tuning circuit for tuning and outputting a television signal, and the like.
Based on the clock from 008, display information such as a video signal is output. The display information processing circuit 1002 processes and outputs display information based on the clock from the clock generation circuit 1008. This display information processing circuit 1002
Is constituted by the data processing board 10 described above. The display driving circuit 1004 is a board for exclusive use of the liquid crystal display described above.
The liquid crystal panel 1006 includes a scanning side driving circuit and a data side driving circuit in addition to the 0R, 30G, and 30B.
Is driven for display. The power supply circuit 1010 supplies power to each of the above circuits.

FIG. 18 shows an electronic apparatus having such a configuration.
And a personal computer (PC) compatible with multimedia shown in FIG.

The liquid crystal projector shown in FIG. 18 is a projection type projector using a transmission type liquid crystal panel as a light valve, and uses, for example, a three-plate prism type optical system.

In FIG. 18, in the projector 1100, the projection light emitted from the lamp unit 1102 of the white light source is divided into R, G, and B light by a plurality of mirrors 1106 and two dichroic mirrors 1108 inside the light guide 1104. Three liquid crystal panels 1110R, 1110 that are divided into primary colors and display images of each color
G and 1110B. The light modulated by each of the liquid crystal panels 1110R, 1110G and 1110B is applied to a dichroic prism 1112.
Is incident from three directions. Dichroic prism 11
In 12, the red R and blue B lights are bent by 90 ° and the green G light goes straight, so that the images of the respective colors are synthesized, and a color image is projected on a screen or the like through the projection lens 1114.

The personal computer 12 shown in FIG.
00 is a main body 1204 having a keyboard 1202
And a liquid crystal display screen 1206.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the present invention.

[0101]

[Brief description of the drawings]

FIG. 1 is a block diagram of a data processing / liquid crystal display driving circuit for driving a liquid crystal display panel according to an embodiment in which the present invention is applied to a projector.

FIG. 2 is a characteristic diagram of primary gamma correction data stored in a RAM table of a primary gamma correction circuit.

FIG. 3 is a characteristic diagram for explaining primary gamma correction data including contrast ratio adjustment data rewritten in a RAM table of a primary gamma correction circuit.

FIG. 4 is a characteristic diagram for explaining primary gamma correction data including luminance adjustment data rewritten in a RAM table of a primary gamma correction circuit.

FIG. 5 is a block diagram of a liquid crystal display driving IC mounted on the liquid crystal exclusive board shown in FIG. 1;

6 is a characteristic diagram of secondary gamma correction data stored in a RAM table of the secondary gamma correction circuit shown in FIG.

FIG. 7 is a characteristic diagram for explaining a relationship between difference data and a reference straight line by partially enlarging FIG. 6;

FIG. 8 is a block diagram showing a configuration for rewriting data in a RAM table of the primary and secondary gamma correction circuits.

FIG. 9 is a characteristic diagram showing a modified example of the secondary gamma correction characteristic used in the circuit of FIG.

FIG. 10 is a block diagram showing a modified example of a secondary gamma correction circuit in which linear approximation for secondary gamma correction is realized using a RAM and a register.

11 is a characteristic diagram showing a secondary gamma correction characteristic of the circuit of FIG.

FIG. 12 is a block diagram of another secondary gamma correction circuit using the secondary gamma correction characteristic of FIG.

FIG. 13 is a timing chart showing the operation of the phase expansion circuit shown in FIGS. 1 and 5;

FIG. 14 shows the relationship between the applied voltage and the transmittance (T-
It is a characteristic view which shows V) characteristic.

15 is a characteristic diagram showing an ideal secondary gamma correction characteristic for compensating the TV characteristic of FIG.

FIG. 16 is a characteristic diagram showing a conventional analog gamma correction characteristic using one-point broken linear approximation.

FIG. 17 is a block diagram of an electronic device of the invention.

FIG. 18 is a schematic sectional view of a color projector which is an example of the electronic apparatus of the invention.

FIG. 19 is a schematic perspective view of a personal computer which is an example of the electronic apparatus according to the invention.

[Explanation of symbols]

 Reference Signs List 10 signal processing board 12, 14 input terminal 16 AD converter 18 digital decoder 20 frame memory 22 switch 24 primary gamma correction circuit 24 RAM 30R, 30G, 30G liquid crystal display dedicated board 32 secondary gamma correction circuit (digital gamma correction circuit) 34 Phase expansion circuit 36 Polarity inversion circuit 38 DA converter 40 Amplifier 42 Buffer 50R, 50G, 50B Liquid crystal display panel 100 Address generation unit 102 RAM (memory table) 104A to 104B Bit shifter 106 First selector 108 Adder 110 Area judgment unit 112 Second Selector 130 Third selector 132 Adder (arithmetic unit) 140 RAM (first memory table) 142 Register address generator 144 Difference data register (second memory table) 46 adder (calculation section) 150 inclination data register (second memory table) 152 difference data calculation section 160 bit shifter 162 adder 170 near the boundary data register 172 selector 174 area determining portion

Claims (9)

[Claims] A digital gamma correction circuit for correcting input digital image data into digital image data suitable for display driving in a liquid crystal display unit according to a gamma correction characteristic including a curve, wherein the gamma correction characteristic corresponds to a curve. The correction data is divided into reference straight line data located on at least one reference straight line and difference data to be added or subtracted from the reference straight line data, and a memory table that stores the difference data in association with the input digital image data. A linear approximation unit that outputs data on the at least one reference line according to the input digital image data; the difference data output from the second memory table; And a calculation unit for adding or subtracting the reference straight line data. Comma correction circuit. 2. The linear approximation operation unit according to claim 1, wherein in an area other than the gamma correction characteristic, which is a curve, the input digital image data is corrected by linear approximation using at least one correction straight line. A digital gamma correction circuit, wherein a part of the digital gamma correction circuit is also used for calculating and outputting data on the at least one reference straight line and the correction straight line. 3. The method according to claim 2, wherein the linear approximation operation unit shifts the input digital image data by bits, and multiplies the input digital image data by 2 ⁿ or 1/2 ⁿ (n is a natural number). A digital gamma correction circuit having a bit shifter, wherein the plurality of bit shift circuits are also used for calculating and outputting data on the at least one reference straight line and the correction straight line. 4. A linear approximation calculating unit for linearly approximating input digital image data for each linear approximation section using a plurality of straight lines and correcting the digital image data to digital image data suitable for display driving on a liquid crystal display unit. In the digital gamma correction circuit, the straight-line approximation operation unit stores, for each straight-line approximation section, common reference correction data in a straight-line approximation section of a 2 ^k (k is a natural number) gradation range of the input digital image data. A first memory table for storing at least (2 ^k -1) difference data for each straight line to be added to or subtracted from the reference correction data corresponding to each straight line within the straight line approximation section of the 2 ^k gradation range Second
And a calculation unit for adding or subtracting the reference correction data and the difference data respectively read from the first and second memory tables according to the gradation value of the input digital image data. Characteristic digital gamma correction circuit. 5. A linear approximation operation unit for linearly approximating input digital image data for each linear approximation section using a plurality of straight lines and correcting the digital image data to digital image data suitable for display driving on a liquid crystal display unit. In the digital gamma correction circuit, the straight-line approximation operation unit stores, for each straight-line approximation section, common reference correction data in a straight-line approximation section of a 2 ^k (k is a natural number) gradation range of the input digital image data. Among the (2 ^k -1) difference data per line, which is added or subtracted from the first memory table and the reference correction data corresponding to each straight line within the straight line approximation section of the 2 ^k gradation range, A second memory table for storing at least one difference data for each straight line; and at least one difference data for each straight line from the second memory table. A difference data calculation unit for calculating the remaining difference data in the straight line approximation section for each straight line, and a first data processing unit based on a gradation value of the input digital image data.
An operation unit for adding or subtracting at least one difference data from the second memory table or another difference data from the difference data operation unit to the reference correction data from the memory table. Characteristic digital gamma correction circuit. 6. The digital gamma correction circuit according to claim 4, wherein the value K of the gradation range 2 ^K is set to 2. 7. The digital gamma correction circuit according to claim 4, wherein the value K of the gradation range 2 ^K is set to 3. 8. A liquid crystal display unit, and a digital gamma correction circuit according to claim 1, wherein an image is displayed and driven on said liquid crystal display unit based on image data on which digital gamma correction has been performed. A liquid crystal display device comprising: a liquid crystal display driving circuit. 9. A liquid crystal display unit, comprising: the digital gamma correction circuit according to claim 1; and displaying an image on the liquid crystal display unit based on image data on which digital gamma correction has been performed. An electronic device, comprising: a liquid crystal display driving circuit; and a power supply circuit for supplying power to the liquid crystal display driving circuit.