JPH10289923A - Manufacture of semiconductor package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a package without bringing a metal mold into contact onto a chip at low cost without losing, simpleness and reliability, in a resin sealed semiconductor package. SOLUTION: A protective film 21 is formed on the surface on the side of a semiconductor chip 2 where a chip electrode 3 is formed, and continuously, an opening hole part 21a is formed on the protective film 21. Continuously, a conductive ball 1 comprising solder, etc., acting as an external connecting terminal, is fit into the opening hole part 21a, and connected to the chip electrode 3. Continuously, the entire surface of the semiconductor chip 2 and the entirety of the conductive ball 1 are covered and sealed with a resin. And then the resin surface of the side where the conductive ball 1 is formed is polished, to expose the conductive ball 1 from the resin surface. Thereby an external connecting terminal is formed without bringing a metal mold into contact with the chip electrode 3 in a resin sealing process, so that the chip electrode 3 is prevented from breaking, etc., and deterioration of reliability is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor package, and more particularly to a method of manufacturing a resin-sealed semiconductor package in which a semiconductor chip is sealed with a resin.

[0002]

2. Description of the Related Art In the recent information age, the demand for information and communication equipment is increasing year by year. A camera-integrated VT for which the demand is particularly growing among information and communication equipment.
Portable information devices such as R, PHS (Personal Handyphone System), and notebook computers tend to be smaller and thinner due to their ease of carrying. Therefore,
Of course, LSI packages mounted inside these devices also need to be reduced in size and thickness.

[0003] On the other hand, as the large-scale integration of semiconductor elements progresses, the chip area gradually increases, and the semiconductor element is housed in a package having the required dimensions in a package method for die-bonding a chip to an island of a lead frame. Things are getting harder.

To cope with this problem, a package structure as disclosed in Japanese Patent Application Laid-Open No. 8-279575 has been proposed. FIG. 5 is a schematic sectional view of such a conventional package. In this package, conductive terminals are provided which extend vertically from the electrodes on the semiconductor chip toward the surface of the semiconductor package, and these terminals are used for soldering to a pattern on a printed circuit board.

In the semiconductor package shown in FIG.
The semiconductor chip 11 is sealed by a sealing resin portion 12. A plurality of chip electrodes 13 are formed on one surface (upper surface) of the semiconductor chip 11, and a thin plate-shaped die pad portion 22 is provided on the opposite surface (rear surface) of the die bond material 18.
Are joined by

On the other hand, the chip electrode 13 of the semiconductor chip 11
A protective film 21 having an opening is formed on the surface where is formed, and a part of the surface of the chip electrode 13 is exposed in the opening. The sealing resin portion 12 is provided with a connection hole 16 communicating with the chip electrode 13 in the package thickness direction. The connection hole 16 is filled with a conductive material, and the conductive material forms a terminal portion 17 for external connection.

Next, a method of manufacturing the semiconductor package will be described with reference to FIGS. First, as shown in FIG. 6A, a chip electrode 13 is formed on an upper surface of a semiconductor chip 11 on which a circuit is formed. Next, as shown in FIG. 6B, a protective film 21 is formed on the surface on which the chip electrodes 13 are formed in order to prevent α rays from entering the inside of the semiconductor chip 11 from the outside.

Next, as shown in FIG.
A resist 22 is applied to one surface, and a pattern is formed by ordinary photolithography.

Next, as shown in FIG. 6 (d), the protective film 21 on the chip electrode 13 is removed by anisotropic etching to form an opening exposing a part of the surface of the chip electrode 13. You.

Next, as shown in FIG. 6E, a surface of the semiconductor chip 11 on which the chip electrodes 13 are not formed is fixed to one surface of the die pad portion 22 via a die bond material 18 serving as a buffer material.

Next, as shown in FIG. 7A, the semiconductor chip 11 is placed in the cavity of the mold 23. At this time, the tip electrode 1 exposed in the opening portion
A pin 24 protruding from the cavity surface is brought into contact with the upper surface of 3.

In this state, by injecting and filling a resin into the mold 23, the semiconductor chip 11 is sealed by the sealing resin portion 12 as shown in FIG. A connection hole 16 is formed in the sealing resin portion 12 so as to communicate with the chip electrode 13.

[0013] Finally, as shown in FIG.
6 is filled with a conductive material to form terminals 17 for external connection to obtain a semiconductor package.

[0014]

However, in the conventional semiconductor package as described above, it is necessary to form a portion for forming a connection hole in a mold.
In the future, it is essential to increase the number of external connection terminals as seen in further miniaturization of packages and logic products for specific applications. Is required, so that the cost of the mold rises.

In addition, since the die is brought into contact with the surface of the chip electrode when the connection hole is formed, the chip electrode may be damaged. Further, in order to prevent damage, it is necessary to provide a buffer portion below the semiconductor chip, which causes an increase in the number of steps. In addition, there is a need for a process to fill the package with external connection terminals after the completion of molding, and when the terminal is manufactured separately, the number of parts increases, which reduces workability. I was invited.

An object of the present invention is to provide a method of manufacturing a semiconductor package in which connection terminals extending from the electrodes of the semiconductor chip toward the surface of the semiconductor package are embedded in the semiconductor package. And a method of manufacturing a semiconductor package in which contact of the semiconductor package is prevented.

Another object of the present invention is to provide a method of manufacturing a semiconductor package in which connection terminals extending from the electrodes of the semiconductor chip toward the surface of the semiconductor package are embedded in the semiconductor package. An object of the present invention is to provide a method of manufacturing a semiconductor package in which damage is prevented.

Still another object of the present invention is to provide a method of manufacturing a semiconductor package in which connection terminals extending from the electrodes of the semiconductor chip toward the surface of the semiconductor package are embedded in the semiconductor package. It is an object of the present invention to provide a method of manufacturing a semiconductor package which can simplify the shape of the semiconductor package.

[0019]

In order to solve the above-mentioned problems, a method of manufacturing a semiconductor package according to the present invention comprises a first step of forming a protective film on a surface of a semiconductor chip on which chip electrodes are formed; A second step of forming an opening in the protective film such that at least a part of the surface of the chip electrode is exposed; and a third step of inserting a conductive ball into the opening and connecting the chip electrode and the conductive ball. And a fourth step of covering and sealing the entire surface of the semiconductor chip and the conductive ball with resin,
Polishing a resin surface formed on the upper surface of the conductive ball to expose the conductive ball from the resin surface.

According to another method of manufacturing a semiconductor package of the present invention, a first step of forming a protective film on the surface of a semiconductor chip on which chip electrodes are formed, and forming an opening in the protective film to form a chip electrode. A second step of exposing in the opening, a third step of inserting a conductive member into the opening, and connecting the chip electrode and the conductive member, and a resin covering the entire surface of the semiconductor chip and the conductive member. A fourth step of covering and sealing; and a fifth step of polishing the surface of the resin and exposing a part of the conductive member from the resin surface.

Here, preferably, the conductive ball or the conductive member is formed of a material having a melting temperature higher than a melting temperature of solder used when connecting the semiconductor package to a printed circuit board.

It is preferable to use gold, aluminum, or solder as such a material.

[0023]

According to the present invention, before the semiconductor chip is sealed with a resin, conductive balls serving as external connection terminals are formed on the chip electrodes in advance. That is, in this case, it is not necessary to form the connection hole with a mold or the like, and it is not necessary to form a portion for forming the connection hole in the mold. Even for a required package, it is possible to prevent a rise in die cost without requiring precise processing in the die manufacturing process.

In addition, since it is not necessary to contact the die on the chip electrode for forming the connection hole, damage to the chip electrode can be prevented, and furthermore, it is necessary to provide a buffer for preventing damage to the semiconductor chip. Therefore, the thickness of the package can be reduced.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a specific embodiment of a method for manufacturing a sealing resin type semiconductor package of the present invention will be described in detail with reference to the drawings.

First, a schematic configuration of the semiconductor device will be described. FIG. 1 is a cross-sectional view of a semiconductor package showing one embodiment of the present invention, and FIGS. 2 and 3 are cross-sectional views sequentially showing the manufacturing steps of the semiconductor package of FIG.
FIG. 4 is a sectional view of a jig used in a semiconductor package manufacturing process.

In the semiconductor package of the embodiment shown in FIG. 1, the semiconductor chip 2 is sealed by the sealing resin portion 12. A plurality of chip electrodes 3 are formed on one surface (upper surface) of the semiconductor chip 2, and a protective film 21 having an opening 21 a is formed on a surface of the semiconductor chip 2 on which the chip electrodes 3 are formed. The surface of the chip electrode 3 is partially exposed in the opening 21a. On the upper surface of the chip electrode 3, a terminal portion for external connection composed of the solder ball 1 is formed. Although the semiconductor chip 2 is completely covered with the sealing resin portion 12, a part of the terminal for external connection is exposed on the surface of the sealing resin portion 12.

Next, a method of manufacturing a semiconductor package according to the present embodiment will be described with reference to the drawings. First, as shown in FIG. 2A, a chip electrode 3 is formed on the upper surface of the semiconductor chip 2. For the chip electrode 3, a conventional wire bonding pad may be used, or an electrode formed by laminating and patterning aluminum on a conventional bonding pad and projecting from the surface of the semiconductor chip 2 may be used. .

Next, as shown in FIG. 2B, in order to prevent α rays from entering the semiconductor chip 2 from the outside,
A protective film 21 is formed on the surface of the semiconductor chip 2 on which the chip electrodes 3 are formed.

Next, as shown in FIG.
A resist 25 is applied on the upper surface of the substrate 1 and patterned by ordinary photolithography.

Next, as shown in FIG. 2D, the protective film 21 on the chip electrode 3 is removed by anisotropic etching.
An opening 21a is formed.

Subsequently, as shown in FIG. 2E, a solder ball 1 having a diameter of about 120 μm is arranged on the chip electrode 3 exposed from the opening 21a of the protective film 21, and the chip electrode 3 is formed. Glue. The following method can be used as an example of the solder ball forming method, arrangement and bonding method.

In order to form a solder ball, first, the solder of the wire is cut into a predetermined length and dropped freely. A high-frequency furnace is provided in the path of the free fall, and when the solder passes through the high-frequency furnace, the solder is melted by high frequency. In the process of further dropping, the solder is cooled and becomes spherical due to its own surface tension, and the solder ball 1 is completed. According to this method, it is possible to form a ball having a diameter of about 10 μm, wiring can be performed with a ball having a diameter much smaller than a ball formed by a wire bonding method, and the area of the external connection terminal portion occupying the semiconductor chip 2 can be reduced. This is an effective method when the element is miniaturized because it can be reduced.

In the present embodiment, the solder ball 1 is used as described above, but the present invention is not limited to this, and a gold ball, an aluminum ball, or the like may be used instead of the solder ball 1. Gold balls and aluminum balls can be formed in substantially the same manner as the solder balls 1, and have excellent adhesiveness like the solder balls 1.

Here, the step shown in FIG. 2E will be described in more detail with reference to FIG. First, the solder balls 1 were arranged in the depressions 51 on the jig 50 shown in FIG. 4 having the depressions 51 previously adjusted to the arrangement of the chip electrodes 3, and the solder balls 1 were heated to around the melting temperature of the solder balls 1. The jig 50 is inverted in this state, and the jig 50 and the semiconductor chip 2 are positioned so that the solder ball 1 is located in the opening 21 a above the chip electrode 3 formed on the protective film 21. Jig 5
0 and a predetermined pressure are applied to the semiconductor chip 2 and heated at a predetermined temperature. Thereby, the solder ball 1 is pressed against the chip electrode 3. The melting temperature of the solder ball 1 is required to be higher than the temperature applied to the solder ball 1 at the time of molding performed later. This is because if the solder ball 1 melts during molding, it comes into contact with the adjacent chip electrode 3 and causes a short circuit.

The melting temperature of the solder ball 1 is required to be higher than the soldering temperature applied to the solder ball 1 when the completed semiconductor package is mounted on a printed circuit board. When the solder balls 1 melt during mounting, the pattern of the printed board has a larger area than the chip electrodes 3, so that the solder balls 1 in the openings 21a flow into the pattern on the printed board due to surface tension,
This is because the electrical connection between the solder ball 1 and the chip electrode 3 in the opening may not be maintained.

By pressing and heating the jig 50 and the semiconductor chip 2, the chip electrode 3 and the solder ball 1 are substantially connected in the opening 21a, and the wiring step in the semiconductor package is completed. Here, the solder ball 1 functions as an external connection terminal of the chip electrode 3.

Next, as shown in FIG. 3A, the semiconductor chip 2 is placed in the cavity of the mold 23. The mold 23 used at this time has a thickness such that the solder ball 1 is completely contained. In addition, since the solder balls 1 serving as external connection terminals are already connected to the semiconductor chip 2, it is not necessary that the pins for forming the connection holes are formed in the mold 23 in advance. Therefore, it is not necessary to protrude the pin on the upper surface of the chip electrode 3, and it is possible to prevent the chip electrode 3 from being damaged.

In this state, the semiconductor chip 2 and the solder balls 1 are sealed by the sealing resin portion 12 by injecting and filling a resin into the mold 23 as shown in FIG. At this time, not only the semiconductor chip 2 but also the upper surface of the solder ball 1 is sealed with a resin to such an extent that the upper surface of the solder ball 1 is hidden.
When the surface of the resin 12 and the upper surface of the solder ball 1 are polished later, the solder ball 1 can be prevented from peeling off from the resin 12 or the chip electrode 3.

Finally, as shown in FIG. 3C, the sealing resin 12 on the upper surface of the semiconductor chip 2, that is, on the surface on which the solder balls 1 are formed, is polished with a diamond grindstone or the like. At this time, the sealing resin 12 is polished until the thickness L from the upper surface of the protective film 21 to the upper surface of the package becomes about 100 μm, and the solder balls 1 are exposed from the sealing resin 12. In this embodiment, the thickness of the sealing resin 12 is set to about 100 μm.
If the material of the sealing resin 12 is different, the thickness can be made 100 μm or less. Thus, the semiconductor package of the present embodiment is completed.

Therefore, according to the present embodiment, in the resin-sealed semiconductor package, the solder ball as the external connection terminal is formed on the chip electrode before the resin sealing, so that the connection hole is formed. Processing becomes unnecessary, and the number of steps can be reduced. Further, since there is no need to push up the pin on the chip electrode at the time of drilling, damage to the chip electrode can be prevented. Furthermore, since it is not necessary to process fine pins on the mold, it is possible to prevent an increase in the cost of the mold and to manufacture a semiconductor package at low cost.

[0042]

According to the present invention, in a resin-sealed semiconductor package, it is not necessary to form a portion to be a connection hole after resin sealing with a mold or the like, so that a small package or an external connection terminal is provided. Even in a package that requires a large number of molds, it is possible to prevent an increase in mold cost without requiring precise processing in the mold manufacturing process.

In addition, since it is not necessary to contact a mold on the semiconductor chip for forming the connection hole, damage to the semiconductor chip can be prevented, and furthermore, a buffer for preventing damage to the semiconductor chip needs to be provided. Therefore, the thickness of the package can be reduced.

[Brief description of the drawings]

FIG. 1 is a schematic plan view of a semiconductor package according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view for explaining a manufacturing process of the semiconductor package in FIG.

FIG. 3 is a schematic cross-sectional view for explaining a manufacturing process of the semiconductor package, following FIG. 2;

FIG. 4 is a schematic cross-sectional view for explaining a manufacturing process of the semiconductor package.

FIG. 5 is a schematic sectional view of a conventional semiconductor package.

FIG. 6 is a schematic cross-sectional view for explaining a conventional semiconductor package manufacturing process.

FIG. 7 is a schematic cross-sectional view for explaining the conventional semiconductor package manufacturing process following FIG. 6;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Solder ball 2,11 Semiconductor chip 3,13 Chip electrode 12 Sealing resin part 21 Protective film

Claims (6)

[Claims] 1. A method of manufacturing a resin-sealed semiconductor package in which a semiconductor chip is sealed with a resin, wherein a first step of forming a protective film on a surface of the semiconductor chip on which chip electrodes are formed. A second step of forming an opening in the protective film so that at least a part of the surface of the chip electrode is exposed; and fitting a conductive ball into the opening, the chip electrode and the conductive ball. A fourth step of covering the entire surface of the semiconductor chip and the conductive ball with a resin, and sealing the resin surface formed on the upper surface of the conductive ball; A fifth step of exposing the conductive balls from a resin surface. 2. A method of manufacturing a resin-sealed semiconductor package in which a semiconductor chip is sealed with a resin, wherein a first step of forming a protective film on a surface of the semiconductor chip on which chip electrodes are formed. A second step of forming an opening in the protective film and exposing the chip electrode in the opening; and a step of fitting a conductive member in the opening and connecting the chip electrode and the conductive member. A fourth step of covering and sealing the entire surface of the semiconductor chip and the conductive member with a resin; and a fifth step of polishing a surface of the resin and exposing a part of the conductive member from the resin surface. And a method for manufacturing a semiconductor package. 3. The conductive member is formed of a conductive material,
3. The method according to claim 2, wherein the semiconductor package has a ball shape. 4. The method of manufacturing a semiconductor package according to claim 2, wherein in order to connect the chip electrode and the conductive member, the semiconductor member is heated to a temperature equal to or higher than a melting point of the conductive member while applying pressure. 5. The conductive ball or the conductive member,
The method of manufacturing a semiconductor package according to claim 1, wherein the semiconductor package is formed of a material having a melting temperature higher than a melting temperature of solder used when connecting the semiconductor package to a printed circuit board. 6. The conductive ball or the conductive member,
2. The semiconductor device according to claim 1, wherein the metal member is formed of any one material selected from gold, aluminum, and solder.
Or the method of manufacturing a semiconductor package according to 2.