JPH10289530A - Reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress reproducing noises caused by crosstalk components and to reduce errors at the time of reproducing data detection by providing a low band emphasis characteristic based on crosstalk components from tacks adjacent to each other and equalizing a digital signal obtained by a rotary head. SOLUTION: During recording, interleaved NRZI processing is performed by a modulation circuit 2 so as to suppress the DC components of a recording signal. During reproducing, integration equalizing processing is performed for a reproducing digital video signal by an equalizer circuit 8 so as to make a frequency characteristic of an equalized signal coincident with Nyquist reference. Further, reverse interleaved NRZI processing, that is, partial response(PR) 4 processing, is performed of an output signal from the equalizer circuit 8 by a demodulation circuit 9. An original digital video signal is detected from the PR 4 processed reproducing signal by viterbi decoding. During recording, inter- code interference is provided by performing interleaved NRZI processing, during reproducing, inter-code interference following high density recording is reduced by performing PR 4 processing and further data detection having little errors is performed by viterbi decoding.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a playback apparatus, and more particularly, to a playback apparatus for digital signals.

[0002]

2. Description of the Related Art As this type of apparatus, a digital VTR for recording and reproducing an image signal as a digital signal on a magnetic tape has been known.

In a digital VTR, since the amount of information to be recorded is large, high-density recording is required, and both heads and magnetic tapes are designed to be suitable for high-density recording. For example, in a digital VTR, guard bandless recording is generally performed in which azimuth angles are different between adjacent tracks in order to realize high-density recording.

At this time, since the magnetic recording / reproducing system cannot transmit a low frequency component including a DC component, a scramble
By performing digital modulation processing such as interleaved NRZI and recording, the DC component in the recording signal is suppressed.

On the other hand, when reproducing the digital signal recorded in this way, the reproduced digital signal is equalized by an equalizer based on the electromagnetic conversion characteristics of the apparatus and the frequency characteristics desired by a data detection circuit at the time of reproduction. Is becoming

For example, the SD of the HD Digital VTR Council
Format (Relative speed between head and tape 10.2m
/ S, V at a recording bit rate of 41.85 MHz)
The electromagnetic conversion characteristics of the TR are the characteristics shown in FIG. Here, when the data detection unit needs the Nyquist criterion characteristics shown in FIG. 12B (integral detection method by PR (1) equalization), the equalizer equalization characteristics of FIG.
(C).

[0007]

The characteristics of the reproduced signal from the track traced by the head are shown in FIG.
When the characteristic is as shown in FIG.
By equalizing the reproduced digital signal by the equalizer having the equalizing characteristic shown in FIG. 12C, a reproduced digital signal satisfying the Nyquist criterion shown in FIG. 12B can be obtained.

However, since the width of the head is usually designed to be wider than the track width, when reproducing a digital signal recorded with guard band-less azimuth, even if azimuth recording is performed, as shown in FIG. The low frequency component of the track adjacent to the track traced by the head is referred to as a crosstalk component a (in FIG. 13, the crosstalk component is 4.
(Less than 5 MHz, almost 1/10 of the bit rate).

Therefore, when a reproduced digital signal including a low-frequency crosstalk component from an adjacent track is equalized by an equalizer having the equalization characteristics shown in FIG. Since the low-frequency crosstalk component is also emphasized in this way, the low-frequency characteristics of the signal after equalization differ from the Nyquist criterion, and the crosstalk is included as noise.

As a result, the amplitude of the eye pattern of the reproduced digital signal after the equalization processing greatly fluctuates as shown in FIG. 14, and there is a problem that the reproduced data cannot be correctly detected.

An object of the present invention is to solve the above-mentioned problems.

Another object of the present invention is to eliminate the influence of noise due to crosstalk components even when a reproduced signal contains crosstalk components from adjacent tracks, thereby enabling accurate data detection. It is in the place to be.

[0013]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems and achieve the object, the present invention traces a magnetic tape on which a number of helical tracks are formed by a rotating head,
A device for reproducing a digital signal, having a low-frequency emphasis characteristic in consideration of a crosstalk component from an adjacent track,
It is provided with an equalizing means for equalizing a digital signal obtained by the rotary head.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a diagram showing a configuration of a digital VTR to which the present invention is applied.

In FIG. 1, an input digital video signal is compressed and encoded in a recording signal processing circuit 1 by using techniques such as DCT, quantization, and variable length coding, and then modulated. Is output to Modulation circuit 2
Is a synchronization signal or I signal for the compressed digital video signal.
The error correction coding is performed by adding the D signal and the parity data, and is further subjected to digital modulation processing to convert the signal into a signal suitable for magnetic recording, and output the signal to the amplifier 3. The amplifier 3 amplifies the modulated digital video signal and supplies it to the head 5 via the switch 4. Head 5
Are provided on the rotating drum with a phase difference of 180 degrees,
It has two magnetic heads having different azimuth angles from each other. The two heads alternately trace the tape 6 to record a digital video signal supplied while forming a number of helical tracks on the tape 6. .

FIG. 2 shows how two heads form a large number of helical tracks on a tape to record a video signal. As shown in FIG. 2, by tracing the tape 6 alternately by the two heads, tracks Tra and Trb having different azimuths are alternately formed, and a video signal is recorded. In this embodiment, the width of the head is made larger than the track width to be formed, so that the head is overlapped.

Next, at the time of reproduction, as shown in FIG. 2, the tape 6 on which the digital video signal is recorded is traced by the head 5 to reproduce the video signal, and output to the amplifier 7 via the switch 4. The amplifier 7 amplifies the reproduced video signal and outputs the amplified video signal to the equalization circuit 8. The equalizing circuit 8 is a so-called integral equalizing circuit, which compensates for the deterioration of the reproduced digital video signal in the electromagnetic conversion system and outputs the signal to the demodulating circuit 9 as described later. The demodulation circuit 9 performs demodulation processing corresponding to the modulation processing at the time of recording, and detects the original digital video signal from the demodulated video signal. Further, the demodulation circuit 9 corrects an error in the reproduced digital video signal by using the parity data added at the time of recording.
Output to The reproduction signal processing circuit 10 decodes the reproduction signal by applying a process substantially opposite to that at the time of recording to the reproduction digital video signal from the demodulation circuit 9, expands the information amount, and outputs the decoded signal.

In this embodiment, during recording, the modulation circuit 2 performs interleaved NRZI processing to suppress the DC component (DC component) of the recording signal. Further, at the time of reproduction, the equalization circuit 8 performs integral equalization processing on the reproduced digital video signal so as to match the Nyquist criterion, and further performs demodulation on the output signal from the equalization circuit by the demodulation circuit 9. Interleaved NRZI processing is performed. This deinterleaved NRZI processing is known as a partial response (1, 0, -1) processing (PR4 processing). In the present embodiment, an original digital video signal is obtained from the reproduced signal subjected to the PR4 processing by using Viterbi decoding. Has been detected.

The PR4 + Viterbi decoding technique is a technique which has been used in recent years for high-density recording and reproduction. Interleave NRZI processing is performed during recording to give intersymbol interference, and recording is performed by PR4 processing during reproduction. By removing the intersymbol interference, the influence of the intersymbol interference accompanying the high-density recording can be reduced. Further, by using Viterbi decoding, data detection with less errors can be performed.

In this embodiment, the equalization circuit 8 performs integral equalization processing to convert the data into binary data, and further performs PR4 processing to convert the data into ternary data. The effect of the sampling phase fluctuation in the / D conversion is suppressed, and data detection by Viterbi decoding is enabled.

FIG. 3 is a diagram showing the configuration of the data detection unit in the demodulation circuit 9. Referring to FIG.
The reproduced signal equalized to the value signal is sampled by the A / D converter 201 and converted into a digital signal of a plurality of bits per sample, and output to the clock generation circuit 202, the delay circuit 203, and the adder 204. The clock generation circuit 202 generates a clock phase-synchronized with the digital signal from the A / D converter 201 and outputs the clock to the A / D converter 20.
1. The data is supplied to the delay circuit 203 and the Viterbi decoding circuit 205. The delay circuit 203 delays the digital signal from the A / D converter 203 by two sample clocks and outputs it to the adder 204. The adder 204 subtracts the output of the delay circuit 203 from the output of the A / D converter 201, and
5 is output. The PR4 processing (1-D2 when expressed using a delay operator D) is performed by the delay circuit 203 and the adder 204.
) And converted into a ternary signal. The Viterbi decoding circuit 205 detects a 1-bit 1-sample digital signal from the digital signal output from the adder 204.

Next, the equalizing circuit 8 of FIG. 1 will be described.

FIG. 4 is a diagram showing a configuration of the equalizing circuit 8 of the present embodiment. The equalization circuit 8 of the present embodiment includes an amplitude correction unit 101 and a group delay correction unit 102. FIG. 5 shows the configuration of the amplitude correction unit 101, and FIG. 6 shows the configuration of the group delay correction unit 102.

As shown in FIG. 5, the amplitude corrector 101 includes an integrating circuit 101a for correcting low frequencies, a high frequency emphasizing circuit 101b for enhancing high frequencies, and a high frequency suppressing circuit 101 for suppressing high frequencies.
c. Also, as shown in FIG. 6, the group delay correction unit is composed of three secondary all-pass filters having the group delay characteristics shown in FIG.

That is, the group delay characteristic of the second-order all-pass filter is as follows: t (f) = (f ² −fa / Q × f + fa ² ) / (f ² + fa /
Q × f + fa ² ), and a target group delay characteristic can be realized by adjusting Q and fa.

For example, in a first-order all-pass filter, Q = CR / 2π≪, and in a second-order all-pass filter, fa = (1 / LC) × (1 / 2π) Q = (fa / 2π) Become. Therefore, by adjusting the LCR, fa,
Q can be changed.

In this embodiment, Q is variably controlled while fa of the second-order all-pass filter is fixed.

As for the amplitude characteristic, in order to achieve the equalization characteristic shown in FIG. 12C and satisfy the Nyquist criterion as shown in FIG. Integration is performed in the low frequency range below 5 MHz, and 1
Emphasize about 6 db around 9 MHz. At this time, fa and Q of the three secondary all-pass filters are respectively set to f1.
F0 = 7M as 0, Q0, f1, Q1, f2, Q2
If Hz, f1 = 11 MHz and f2 = 19 MHz are set, target group delay characteristics can be achieved with Q0 = 3.3, Q1 = 1.1, and Q2 = 1.0.

However, as shown in FIG. 10A, there is an effect of a low-frequency crosstalk component from an adjacent track, and when the reproduced signal is equalized by the equalization characteristics shown in FIG. The frequency characteristics of the converted signal are as shown in FIG.

For this reason, in the present embodiment, the values of R and C of the integrating circuit shown in FIG. 5 are adjusted to perform integration in the lower frequency range than 1.6 MHz, and the higher frequency range is the same as in FIG. 19
MHz is emphasized.

As a result, as shown in FIG. 8A, the equalizing characteristic of the equalizing circuit 8 has a low-frequency integration range from 4.5 MHz indicated by a to 1.6 MHz indicated by b. It has shifted to lower frequencies.

Therefore, the frequency characteristic of the signal which does not include the crosstalk and is equalized with the equalization characteristic of FIG.
As shown in FIG. 13B, low-frequency suppression is performed as compared with that shown in FIG. 13B, and low-frequency crosstalk does not satisfy the Nyquist criterion, but can be suppressed.

FIG. 8 shows a reproduction signal including crosstalk.
When the equalization processing is performed with the equalization characteristic shown in FIG. 8A, the frequency characteristics of the processed signal have low-frequency components suppressed as shown in FIG. 8C, and the influence of crosstalk can be suppressed.

At this time, since the compensation characteristic in the amplitude correction section is changed from the characteristic shown in FIG. 12, the group delay characteristic also changes. In this embodiment, Q0 of the group delay circuit is set to 5.
By setting the value to 5, the group delay characteristic can be changed and the special group delay can be optimized.

As a result, a signal having less crosstalk noise can be obtained as an equalized signal, and errors at the time of data detection can be reduced.

FIG. 9 shows an eye pattern of a reproduced signal that has been equalized by the equalizing circuit 8 of the present embodiment.

As is clear from FIG. 9, the reproduced signal of the present embodiment has smaller amplitude fluctuations at the sampling points than the eye pattern shown in FIG. 14, so that reproduced data can be detected more accurately.

In this embodiment, the equalization processing is performed by the circuits shown in FIGS. 5 and 6. Alternatively, the equalization circuit 8 may be formed by the circuit shown in FIG.

That is, in FIG. 10, the amplitude correction unit is
As shown in FIG. 1A, a 1 + D processing circuit and a 3-tap transversal filter are used.
It is composed of one secondary all-pass filter shown in FIG. FIG. 11 shows the characteristics of the signal after the equalization processing by the circuit of FIG. 10, wherein a shows the Nyquist criterion and b shows the characteristics of the present embodiment. In the present embodiment, as shown in FIG. 11, the tap coefficient of the transversal filter is adjusted so as to suppress the low frequency band of 4 MHz or less, and the group delay characteristic fluctuation caused by the adjustment is corrected by the group delay correction unit. .

When the equalizing circuit 8 is configured as shown in FIG. 10, the number of LCR circuits can be reduced and adjustment from the outside can be easily performed.

In the amplitude correction section shown in FIG.
Although the integration was performed in the low frequency range equal to or lower than z, the ratio between the recording bit rate and the frequency of the crosstalk component was almost the same even if the recording bit rate fluctuated. On the other hand, even when the present embodiment is applied, the frequency component to be integrated is substantially 1/1 of the bit rate.
Setting from 0 to 1/100 makes it possible to effectively suppress the crosstalk component.

[0043]

As described above, according to the present invention,
Reproduction noise due to crosstalk components can be suppressed, and errors at the time of detecting reproduction data can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a digital VTR as an embodiment of the present invention.

FIG. 2 is a diagram showing how data is recorded on a tape by the apparatus shown in FIG. 1;

FIG. 3 is a diagram illustrating a configuration of a demodulation circuit in FIG. 1;

FIG. 4 is a diagram illustrating a configuration of an equalization circuit in FIG. 1;

FIG. 5 is a diagram illustrating a configuration of an amplitude correction unit of the circuit of FIG. 4;

FIG. 6 is a diagram illustrating a configuration of a group delay correction unit of the circuit of FIG. 4;

FIG. 7 is a diagram illustrating a group delay characteristic of the filter illustrated in FIG. 6;

FIG. 8 is a diagram for explaining a state of an equalization process performed by the apparatus of FIG. 1;

9 is a diagram showing an eye pattern of a signal after the equalization processing in FIG. 1;

FIG. 10 is a diagram illustrating another configuration of the equalization circuit of FIG. 1;

FIG. 11 is a diagram for explaining the operation of FIG. 10;

FIG. 12 is a diagram for explaining a conventional VTR equalization process.

FIG. 13 is a diagram for explaining a conventional VTR equalization process.

14 is a diagram illustrating an eye pattern of a signal after the equalization processing when the equalization processing is performed with the characteristics illustrated in FIG. 13;

[Explanation of symbols]

 8 Equalization circuit 101 Amplitude correction unit 102 Group delay correction unit

Claims (11)

[Claims] An apparatus for reproducing a digital signal by tracing a magnetic tape on which a number of helical tracks are formed by a rotary head and having a low-frequency emphasis characteristic in consideration of a crosstalk component from an adjacent track. A reproducing apparatus comprising: an equalizing unit that equalizes a digital signal obtained by the rotating head. 2. The apparatus according to claim 1, wherein said equalizing means includes an amplitude corrector for correcting an amplitude characteristic of said reproduced digital signal, and a group delay corrector for correcting a group delay characteristic of said reproduced digital signal. Item 2. The playback device according to Item 1. 3. The reproducing apparatus according to claim 2, wherein the amplitude correction section has a low-frequency emphasis characteristic considering the crosstalk component. 4. The reproducing apparatus according to claim 2, wherein the group delay correction unit corrects a group delay of the reproduced digital signal in the amplitude correction unit. 5. The reproducing apparatus according to claim 1, further comprising a detecting unit for detecting reproduced data from the reproduced digital signal equalized by the equalizing unit. 6. The apparatus according to claim 1, wherein said detecting means includes sampling means for sampling a reproduced digital signal from said equalizing means, and detects said reproduced data from the digital signal sampled by said sampling means. 6. The playback device according to 5. 7. The equalizing means performs an integral equalization process for compensating for signal deterioration caused by a magnetic recording / reproducing system, and the detecting means performs the reproduction using a Viterbi decoding method from a digital signal sampled by the sampling means. 7. The reproducing apparatus according to claim 6, further comprising a Viterbi decoding means for detecting data. 8. The equalizing unit performs a process corresponding to PR1, the detecting unit samples a digital signal from the equalizing unit, and a PR4 corresponding to the sampled digital signal. 6. The reproducing apparatus according to claim 5, further comprising: a processing unit that performs a process of performing the processing, and a Viterbi decoding unit that detects the reproduction data from the digital signal processed by the processing unit using a Viterbi decoding method. 9. The reproducing apparatus according to claim 1, wherein the equalizing means has a second-order all-pass filter. 10. An apparatus for reproducing a digital signal by tracing a magnetic tape on which a number of helical tracks are formed by a rotary head, and reproducing a digital signal obtained by the rotary head from a low frequency band from an adjacent track. And an equalizing means for suppressing the crosstalk component and performing integral equalization processing on the reproduced digital signal. 11. The reproducing apparatus according to claim 10, further comprising a detecting unit for detecting reproduction data using the signal equalized by the equalizing unit.