JPH08273302A - Digital recording-reproducing device - Google Patents

Abstract

PURPOSE: To realize an optimal adjustment in the inner part of an apparatus by providing an arithmetic circuit for counting code error information to adjust a waveform equalization constant by the code error information from an error correction circuit at the time of reproduction. CONSTITUTION: A waveform equalization circuit 7 has the characteristic of canceling a regenerative signal in which the phase characteristic change of an electromagnetic conversion system 5 is contained, and waveform equalization is performed in order to obtain a characteristic suitable for demodulation. An error correction circuit 9 sends a detected data error to an arithmetic circuit 11 as error correction information, and the ratio of a data error and the ratio of a code error with respect to the total number of bits are computed in the arithmetic circuit 11 and at the same time a control signal is outputted to the waveform equalization circuit 7 so that the code error ratio is made smaller than the result of the computed code error ratio. The waveform equalization circuit 7 changes its characteristic so as to reduce the code error information outputted from the error correction circuit 9 by the information from the arithmetic circuit 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording / reproducing apparatus for digitally recording / reproducing a video signal, and more particularly to adjusting a waveform equalizing circuit of a video tape recorder (hereinafter abbreviated as VTR).

[0002]

2. Description of the Related Art In recent years, digitalization of equipment has progressed, and a digital VTR in which recording / reproduction is performed by a digital signal is about to be developed in consumer VTR equipment. When a video signal with a large amount of information is digitized, it is necessary to handle high-frequency signals. In an electromagnetic conversion system, a head, tape,
It is necessary to perform waveform equalization on the reproduced signal waveform in order to make the reproduced signal including each characteristic of the rotary transformer suitable for demodulation.

A digital VTR as a conventional digital recording / reproducing apparatus will be described below.

FIG. 8 is a block diagram of a conventional digital VTR. In FIG. 8, reference numeral 1 denotes a digital recording processing circuit, in which an input video signal is digitized by the digital recording processing circuit 1 and subjected to recording processing, and then an error correction code redundancy circuit 2 is provided for redundancy of digital data. Add and create a regular signal sequence. Three
Is a modulation circuit that performs digital modulation, and is recorded on a magnetic tape (not shown) through a recording / amplifying circuit 4 and an electromagnetic conversion system 5 via a ring head (not shown). Reference numeral 6 denotes a reproduction amplification circuit, which reads a signal from the magnetic tape through the ring head in the electromagnetic conversion system 5 during reproduction, and the reproduction amplification circuit 6 amplifies the reproduction signal. Reference numeral 7 denotes a waveform equalization circuit, which has a characteristic of canceling a reproduced signal including a phase characteristic variation of the electromagnetic conversion system 5, and a demodulation circuit 8 of the next stage.
Waveform equalization is performed to obtain characteristics suitable for demodulation by. 9
Indicates an error correction circuit, the reproduced signal demodulated by the demodulation circuit 8 is input, and the error correction code redundancy circuit 2 determines a data error from the redundant part added to the data part. Decrypts. Reference numeral 10 denotes a digital reproduction processing circuit, which performs the reverse processing of the digital recording circuit 1 at the time of recording and outputs it as an original video signal.

The waveform equalization of the waveform equalization circuit 7 will be described. In a digital magnetic recording apparatus using a ring head, the digital signal recorded as shown in FIG. 9 (a) is a square wave, but the reproduced signal output from the reproducing head is differentiated as shown in FIG. 9 (b). It has characteristics. In order to read the reproduced signal correctly as digital data, the amplitude of the reproduced waveform must match the level of 0 or 1 for each clock cycle of the signal as shown in FIG. If the waveform deviates from the 0 or 1 level at the data detection timing (the position of the vertical line in FIG. 10) and exceeds the intermediate value between 1 and 0, that is, the threshold value for discriminating 1, 0, the waveform becomes the other level. An error occurs because it is erroneously detected.

Further, since noise is included in the actual reproduced signal, even if the threshold value for discriminating between 1 and 0 is not exceeded, if the waveform is distorted and approaches the threshold value, noise is added from that point. This increases the probability that an error will occur. FIG.
In FIG. 1, the original reproduced waveform before the noise is placed and the distorted waveform when the noise is placed are described. At the data detection timing A, the signal level in the original waveform is above the threshold value and should be discriminated as 1. However, in the distorted waveform the signal level is below the threshold value and is discriminated as 0. appear.

The waveform shown in FIG. 10 in which the amplitude of the reproduced waveform matches the level of 0 or 1 for each clock cycle of the signal is called a Nyquist waveform, and is written by Yoshizumi Eto, "Digital Video Recording Technology" (published by Nikkan Kogyo Shimbun). As shown on page 53, the frequency characteristics are

[0008]

[Equation 1]

The cosine roll-off characteristic, which is the standard of (3), must be satisfied. Figure 1 shows the cosine roll-off characteristic
It is shown in FIG.

However, the frequency characteristic of FIG. 12 is when the signal waveform is a square wave, and the reproduced waveform by the combination of the magnetic tape and the ring head is a differential waveform, so that the frequency characteristic and the differential characteristic of FIG. 12 are combined. Becomes This is the frequency characteristic for making the waveform suitable for the detection of the data shown in FIG. 10, and is shown in FIG.

In order to make the reproduced signal have a waveform whose amplitude matches the level of 0 or 1 for each clock cycle of the signal, that is, the Nyquist waveform, the frequency of the reproducing amplifier circuit is made equal to the frequency characteristic of the Nyquist condition of FIG. It is necessary to correct the characteristics, which is called waveform equalization or simply equalization. The phase characteristic of Nyquist condition is linear phase,
A transversal filter that can change the amplitude frequency characteristic independently of the phase characteristic is often used in the equalization circuit for waveform equalization.

FIG. 14 shows a simple block diagram of a 3-tap transversal filter. Reference numerals 141 and 142 denote delay units for delaying a signal for a predetermined period T.
Reference numeral 5 is a coefficient unit, and 146 is a differential amplifier.

For example, in a combination of a magnetic tape and a ring head, the phase does not change during the recording / reproducing process, so that the equalizing circuit also needs to change the amplitude frequency characteristic while keeping the linear phase. In the transversal filter of FIG. 14, the tap coefficients C0, C1, and C2 of each coefficient unit are left-right symmetric (C0 = C2) about the center tap C1 and the linear phase is changed by changing the difference between C1 and C0 or C2. The amplitude frequency characteristic can be changed as it is.

Further, depending on the combination with the magnetic tape, the reproduced waveform becomes asymmetrical to the left and right, and the phase characteristic is distorted. Therefore, the phase characteristic of the equalization circuit needs to have an inverse characteristic that cancels this distortion. In the transversal filter of FIG. 14, the amplitude frequency can be changed after fixing the difference between the tap coefficients C0 and C2 of the coefficient units at both ends to a certain value to cancel the distortion generated in the reproduced signal. As described above, the transversal filter can effectively cancel the distortion generated in the magnetic recording system.

[0015]

However, there are characteristic variations including the characteristics of the magnetic tape, the ring head, and the transmission path characteristics of the rotary transformer. Further, in order to digitize and process the video signal, a signal frequency exceeding several tens of MHz is required, and there are problems in processing speed, circuit scale, and cost in configuring the waveform equalizing circuit 7 digitally. Analog technology is suitable for this technology. However, when the transversal filter is configured by analog, there are variations in delay accuracy, gain accuracy, etc. of the delay device, which causes characteristic variation. In this way, the desired Nyquist characteristics cannot be obtained due to fluctuations in the phase characteristics of the electromagnetic conversion system and variations in the characteristics of the waveform equalizer circuit. It is necessary to adjust the reproduction signal waveform by In order to carry out the adjustment, it is necessary to observe a very high frequency signal, which has a problem that the structure of the digital recording / reproducing apparatus main body is adversely affected or the equipment cost due to the production process is increased.

In view of the above problems, the present invention optimizes the total characteristics of the electromagnetic conversion system by adjusting the characteristics of the waveform equalization circuit using error correction information which is a digital signal of the error correction circuit. The purpose is to match.

[0017]

To achieve the above object, a digital recording / reproducing apparatus of the present invention comprises a digital recording processing circuit for converting a video signal into a digital signal and processing a recording signal, and an error in recording data. An error correction code redundancy circuit for making a correction code redundant, a modulation circuit for modulating a recording signal, a recording amplifier circuit for recording on a recording medium, a reproduction amplifier circuit for amplifying a reproduction signal at the time of reproduction, and a reproduction signal. Waveform equalization circuit for performing the waveform equalization of the above, a demodulation circuit for demodulating a reproduction signal into data, an error correction circuit for performing data decoding for a data error of the reproduction data, and a digital reproduction processing circuit for performing reproduction signal processing. A digital recording / reproducing apparatus for performing digital recording / reproducing, wherein the error correction circuit outputs error correction information in error correction during reproduction, An arithmetic circuit that counts error correction information output from the error correction circuit and calculates a code error rate, and a waveform in which an equalization constant for performing waveform equalization of a reproduced signal waveform is variable according to the information of the arithmetic circuit. And an equalization circuit.

[0018]

According to the present invention, the code error rate is calculated from the error correction information output from the error correction circuit according to the above configuration, and the equalization constant of the waveform equalization circuit is adjusted so that the code error rate is reduced. This eliminates the need to take out a signal for adjustment and makes it possible to perform optimum adjustment completed inside the digital recording / reproducing apparatus.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of a digital VTR as a digital recording / reproducing apparatus according to the present invention. In FIG. 1, reference numeral 11 denotes an arithmetic circuit, which inputs the error correction information output from the error correction circuit 9,
The waveform equalization circuit 7 is controlled based on it. Other components are the same as those of the conventional example shown in FIG.

Digital VTR constructed as described above
The operation will be described with reference to FIG.

As in the conventional example, in the digital VTR, the input video signal is digitized by the digital recording processing circuit 1 and subjected to recording processing, and then the error correction code redundancy circuit 2 adds a redundant portion to the digital data. Then, a regular signal sequence is created, digital modulation is performed by the modulation circuit 3, and the data is recorded on the magnetic tape (not shown) through the recording / amplification circuit 4 and the electromagnetic conversion system 5 via the ring head (not shown). It At the time of reproduction, the signal is read from the magnetic tape through the ring head in the electromagnetic conversion system 5,
The reproduction amplifier circuit 6 amplifies the reproduction signal. Waveform equalization circuit 7
In this case, the reproduction signal including the phase characteristic variation of the electromagnetic conversion system 5 has a characteristic of canceling it, and waveform equalization is performed to obtain a characteristic suitable for demodulation. The demodulation circuit 8 demodulates the reproduction signal into reproduction data. The reproduced data demodulated by the demodulation circuit 8 is discriminated by the error correction circuit 9 in the error correction code redundancy circuit 2 from the redundant portion added to the data portion, and further the error data is decoded from the regularity. Finally, the digital reproduction processing circuit 10 performs the reverse processing of the digital recording circuit 1 at the time of recording and outputs it as an original video signal. Here, the data error detected in the error correction circuit 9 is sent to the arithmetic circuit 11 as error correction information, and the arithmetic circuit 11 calculates the ratio of the data error to the total number of bits, that is, the code error rate. The arithmetic circuit 11 also outputs a control signal to the waveform equalization circuit 7 so that the code error rate becomes smaller than the result of the calculated code error rate. The waveform equalization circuit 7 is the arithmetic circuit 1.
The information is changed from 1 to the characteristic so that the code error information output from the error correction circuit 9 is reduced.

FIG. 2 shows an example in which a transversal filter is used in the waveform equalization circuit 7. 71 and 7
2 is a delay device for delaying a predetermined period T, 73, 74, 75
Is a coefficient multiplier having coefficients of C0, C1 and C2, 76
Is composed of a differential amplifier, and the coefficient of each coefficient unit is changed according to the calculation result of the code error rate of the calculation circuit 11, and adjustment is performed so as to finally reduce the code error rate.

The output of the error correction information from the error correction circuit 9 is described in FIG. FIG. 3 is an error correction information output diagram of the error correction circuit 9. The error correction information (b) is output every predetermined period in synchronization with the system clock (a) as shown in FIG. For example, when the synchronous data for head-adjusting the data block for error correction cannot be obtained, the error correction information is not output and the state of (b) 1 is set. When there is no error, the H state is output for two clock periods as shown in (b) 2. When there is an error, in addition to the state of (b) 2 as in (b) 3 to (b) 7, the clock period H is twice the number of errors.
The operation circuit 11 outputs the error correction information by outputting the status.
Output to.

Next, the operation of the arithmetic circuit 11 will be described with reference to the count timing chart of the arithmetic circuit 11 shown in FIG.

As shown in FIG. 4, the arithmetic circuit 11 creates an error correction information punching clock (e) which is doubled from the system clock (a), and counts code errors with the error correction information punching clock (e). The state of the error correction information (b) is detected at the rising timing of the error correction information punching clock (e), and the next system clock (a) is detected.
The error correction count (f) is counted at the rising edge of. As is well known, a VTR provided with a plurality of heads
In the above, if the head switching signal (c) is input as a reference for counting and reset (d) is started at the rising edge of the head switching signal (c) to start counting, the code error rate for each head can be known. The adjustment of each head can be performed also on the waveform equalization circuit 7, and the adjustment accuracy can be further improved.

The demodulation circuit will be described with reference to FIGS. 5, 6 and 7. A configuration block diagram of the demodulation circuit 8 is shown in FIG. In FIG. 5, the output of the waveform equalization circuit 7 is first passed through a demodulator 81 for demodulation. Since the output of the demodulator 81 is converted into digital data, the comparator 82
It discriminates the level of 1 or 0 and outputs it to the phase synchronizing circuit 83 and the phase adjusting circuit 84. The phase synchronization circuit 83 extracts a clock component from the reproduced data, matches the phase with the reference frequency to create a clock, and outputs the clock to the comparator 82 as a data punching timing clock at the time of discriminating the level of the reproduced data. In addition, the phase adjustment circuit 8
At 4, the phase of the clock input from the phase synchronization circuit 83 and the data input from the comparator 82 are adjusted and input to the error correction circuit 9. The error correction circuit 9 detects and decodes a code error. Here, in addition to making the coefficient of the coefficient unit of the waveform equalization circuit 7 variable according to the calculation result of the code error rate of the calculation circuit 11, the threshold value of the comparator 82 can be shifted up and down as shown in FIG. To do so. Alternatively, instead of swinging up and down, the data output of the phase adjustment circuit 84 is a data flip-flop (abbreviated as DFF in FIG. 7) as shown in the block diagram of the phase adjustment circuit in FIG.
The output is switched by a switch with a configuration in which several stages are provided. As a result, the phase of the output data can be made variable with respect to the clock, and the code error rate can be further reduced even with respect to power supply voltage fluctuations and circuit variations.
In FIG. 7, reference numerals 841 to 845 are data flip-flops, 846 is a changeover switch, 847 is an encoder, and an adjustment signal is an output of the arithmetic circuit 11.

With such a configuration, the error correction circuit outputs the error correction circuit in order to obtain the originally desired characteristics with respect to the fluctuations in the phase characteristics of the electromagnetic conversion system and the characteristic variations in the waveform equalization circuit. By calculating the code error rate from the information and adjusting the equalization constant of the waveform equalization circuit so that this code error rate will be reduced, the entire device will be incorporated even if it is a compact device for consumer use. The adjustment can be performed in a closed state, and the optimum adjustment can be performed completely within the VTR.

Although an example of the digital VTR is described in the present embodiment, the same effect can be obtained by introducing the processing of the present invention in a digital recording / reproducing apparatus for recording / reproducing with a digital signal. Becomes

[0030]

As is apparent from the above embodiments, according to the present invention, a digital recording processing circuit for converting a video signal into a digital signal and performing recording signal processing, and an error correction code for the recording data. A redundant error correction code redundancy circuit, a modulation circuit that modulates a recording signal, a recording amplification circuit that performs recording on a recording medium, a reproduction amplification circuit that amplifies a reproduction signal during reproduction, and waveform equalization of the reproduction signal. Digital recording / reproduction is performed by a waveform equalization circuit that performs the demodulation, a demodulation circuit that demodulates the reproduction signal into data, an error correction circuit that performs data decoding for a data error in the reproduction data, and a digital reproduction processing circuit that performs reproduction signal processing. A digital recording / reproducing apparatus for performing the above, wherein the error correction circuit outputs error correction information for error correction during reproduction, and an output from the error correction circuit. A calculation circuit that counts the error correction information and calculates the code error rate, and a waveform equalization circuit that can change the equalization constant for performing the waveform equalization of the reproduced signal waveform based on the information of the calculation circuit. This allows the waveform equalization circuit and demodulation circuit to be adjusted inside the device by using the digital error correction information inside the digital recording / reproducing device, the high frequency reproduction signal is not routed outside the device, and the spectrum analyzer Also, there is no need to make adjustments with expensive measuring instruments such as oscilloscopes that support high-frequency signals. Further, since the adjustment can be performed in a state where all the final components are incorporated, it is possible to perform the most optimal adjustment in terms of productivity and to provide the one with good serviceability in the market.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of a digital VTR according to an embodiment of the present invention.

FIG. 2 is a block diagram of a waveform equalizing circuit according to an embodiment of the present invention.

FIG. 3 is an error correction information output diagram of the error correction circuit in the embodiment of the present invention.

FIG. 4 is a count timing chart of an arithmetic circuit according to an embodiment of the present invention.

FIG. 5 is a block diagram of a demodulation circuit according to an embodiment of the present invention.

FIG. 6 is a threshold characteristic diagram of a comparator of a demodulation circuit according to an embodiment of the present invention.

FIG. 7 is a block diagram of a phase adjustment circuit of a demodulation circuit according to an embodiment of the present invention.

FIG. 8 is a block diagram of a digital VTR in a conventional example.

FIG. 9 is a recording / reproducing waveform in a VTR and its frequency characteristic diagram.

FIG. 10 is a waveform diagram suitable for detection in a digital VTR.

FIG. 11 is a distortion waveform diagram with noise on a digital VTR.

FIG. 12: Cosine roll-off characteristic diagram

FIG. 13 is a composite characteristic diagram of cosine roll-off characteristics and differential characteristics.

FIG. 14 is a block diagram of a 3-tap transversal filter.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Digital recording processing circuit 2 Error correction code redundant circuit 3 Modulation circuit 4 Recording amplification circuit 5 Electromagnetic conversion system 6 Reproduction amplification circuit 7 Waveform equalization circuit 8 Demodulation circuit 9 Error correction circuit 10 Digital reproduction processing circuit 11 Arithmetic circuit 71, 72 Delay Device 73, 74, 75 Coefficient device 76 Differential amplifier 81 Demodulator 82 Comparator 83 PLL circuit 84 Phase adjustment circuit

Claims (7)

[Claims] 1. A digital recording processing circuit for converting a video signal into a digital signal and processing a recording signal, an error correction code redundancy circuit for making a code for error correction redundant in recording data, and a modulation for modulating a recording signal. A circuit, a recording amplification circuit for recording on a recording medium, a reproduction amplification circuit for amplifying a reproduction signal at the time of reproduction, a waveform equalization circuit for equalizing the waveform of the reproduction signal, and a demodulation for demodulating the reproduction signal into data Circuit,
A digital recording / reproducing apparatus for performing digital recording / reproduction by an error correction circuit for performing data decoding on a data error of reproduced data and a digital reproduction processing circuit for performing reproduction signal processing, wherein error correction information in error correction during reproduction is provided. The error correction circuit that is output to the outside, an arithmetic circuit that counts error correction information output from the error correction circuit and calculates a code error rate, and waveform equalization of a reproduced signal waveform based on the information of the arithmetic circuit. A digital recording / reproducing apparatus comprising: a waveform equalization circuit capable of varying an equalization constant for performing the above. 2. A digital recording / reproducing apparatus according to claim 1, further comprising a comparator capable of changing a threshold value for discriminating a signal level of the reproduced signal according to information of an arithmetic circuit when demodulating the reproduced signal. apparatus. 3. A digital recording / reproducing apparatus according to claim 1, further comprising a phase adjusting circuit capable of changing the phases of the reproduced data and the reproduced clock according to the information of the arithmetic circuit when demodulating the reproduced signal. 4. The equalization constant of the waveform equalization circuit, the threshold value of the comparator, the phase of the data and clock of the phase adjustment circuit are adjusted so that the code error rate calculated in the arithmetic circuit is reduced. Claim 1 constructed
A digital recording / reproducing apparatus as described in 2 or 3 above. 5. The digital recording / reproducing apparatus according to claim 1, wherein the arithmetic circuit is configured to perform an arithmetic operation by a microcomputer in the recording / reproducing apparatus. 6. The digital circuit according to claim 1, wherein the arithmetic circuit is configured to calculate the count of the error correction information of the error correction circuit for each head channel by a head switching control signal and to calculate an average value of n tracks. Recording / playback device. 7. The digital recording / reproducing apparatus according to claim 1, wherein the error correction circuit is configured to detect dropout and output it to the arithmetic circuit to reduce the influence of burst error on the count of the error correction information in the arithmetic circuit. .