JPH10270745A - Semiconductor relay - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the damage of a MOSFET, by thinning the single-crystal region of its overcorrect sensing resistor to suppress its drain current. SOLUTION: In a semiconductor relay, there are provided with a light emission element for emitting a light in response to its input signal, a photodetector for generating a photoelectromotive force by receiving the light of the light emission element, a MOSFET whose drain and source are brought into a conductive state by applying the photoelectromotive force and charging it across its gate and source, a charge and discharge control element for controlling the charge and discharge of the MOSFET, an overcorrect sensing resistor 5 connected with the source of the MOSFET, and a bipolar transistor having its base and emitter connected respectively with both the ends of the overcorrect sensing resistor 5 and its collector connected with the gate of the MOSFET. Each of the photodetector and the overcorrect sensing resistor 5 is so formed as to be provided as a single-crystal region on a silicon substrate 10. In this case, the thickness of a single-crystal region 5a of the overcorrect sensing resistor 5 is made smaller than the thickness of a single-crystal region 2b of the photodetector.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor relay for suppressing a current supplied to a MOSFET to a predetermined current or less.

[0002]

2. Description of the Related Art Conventionally, as this kind of semiconductor relay, there is one shown in FIGS. The light-emitting element A emits light in response to an input signal, the light-receiving element B receives light from the light-emitting element A to generate a photoelectromotive force, and a photoelectromotive force is applied between the gate and the source. An output MOSFET C that becomes conductive between the drain and source when charged, a charge / discharge control element D that controls charging and discharging of the output MOSFET C, and an overcurrent detection resistor E connected to the source of the output MOSFET C. , A base and an emitter are connected to both ends of an overcurrent detection resistor E, and an output MOSFET
A bipolar transistor F having a collector connected to the gate of TC. Specifically, the charge / discharge control element D is composed of a control MOSFET D ₁ and its control MOSFET
Control resistor connected between the gate and source of ETD ₁
Consisting of D _2. The light receiving element B includes a plurality of photodiodes B ₁
Are connected in series. Photodiode of light receiving element B
Each element of B ₁ , control resistor D ₂ and overcurrent detection resistor E
Each is provided on the silicon substrate S as a single crystal region.

Next, the operation will be described. When the light emitting element A emits light according to the input signal, the light receiving element B receives the light of the light emitting element A and generates a photovoltaic voltage. Then, output M
OSFETC is charged by the application of photovoltaic voltage between its gate and source, the drain and source become conductive, and a drain current flows.

When the drain current exceeds a predetermined current, the voltage across the overcurrent detection resistor E connected to the source of the output MOSFET C increases, and the base and the emitter are connected across the overcurrent detection resistor E. Is connected, the base current of the bipolar transistor F flows, and the collector current of the bipolar transistor F flows. When the collector current of the bipolar transistor F flows in this way, the charge charged in the output MOSFET C is discharged, and the drain current of the output MOSFET C is suppressed to a predetermined current.

[0005]

In the above-described conventional semiconductor relay, when the drain current of the output MOSFET C exceeds a predetermined current, as described above, the drain current of the output MOSFET C becomes the predetermined current. Therefore, it is possible to prevent the drain current exceeding the predetermined current from continuing to flow through the output MOSFET C.

However, since the drain current of the output MOSFET C does not become smaller than the predetermined current, if the drain MOSFET C continues to flow for a long time, the output MOSFET C may be damaged.

The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor relay in which an output MOSFET is not damaged.

[0008]

In order to solve the above-mentioned problems, the present invention is directed to a light-emitting element which emits light in response to an input signal, and a photo-electromotive force generated by receiving light from the light-emitting element. A light-receiving element, a MOSFET that conducts between the drain and source when photoelectromotive force is applied between the gate and the source, and a charge-discharge control element that controls charging and discharging of the MOSFET; An overcurrent detection resistor connected to the source; a bipolar transistor having a base and an emitter connected to both ends of the overcurrent detection resistor and a collector connected to the gate of the MOSFET; In the semiconductor relay in which each of the resistors for the overcurrent detection is provided on the silicon substrate as a single crystal region, It is the thinly provided configuration than the pass.

According to a second aspect of the present invention, in the first aspect, the single-crystal region of the overcurrent detecting resistor has an insulating film provided on a boundary surface, and the thickness of the insulating film is reduced. , 1.1 μm to 3.0 μm.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. This semiconductor relay includes a light emitting diode (light emitting element) 1, a photodiode array (light receiving element) 2, an output MOSFET 3, 3, an NPN bipolar transistor 4, 4, an overcurrent detecting resistor 5, 5, a control MOSFET 6, and a control MOSFET. A photodiode array 2, NPN bipolar transistors 4 and 4, overcurrent detection resistors 5 and 5, a control MOSFET 6
The control resistor 7 is provided on the same silicon substrate 10 as a single crystal region.

The light emitting diode (light emitting element) 1 emits an optical signal according to an input signal inputted between the input terminals 20a and 20b. The photodiode array (light receiving element) 2
A plurality of photodiodes 2a are provided on a silicon substrate 10 and are connected in series. The photodiodes 2a receive an optical signal from the light emitting diode 1 and generate a photoelectromotive force.

Each of the output MOSFETs 3, 3 is of an n-channel enhancement type, and has its gate connected to the anode of the photodiode array 2,
The drain is connected to the output terminal 20c on the power supply (not shown) side, and the source is connected via the overcurrent detection resistor 5 to the output terminal 20d on the load (not shown) side.

Each of the overcurrent detection resistors 5, 5 is connected between the source of the output MOSFET 3 and the source of the control MOSFET 6. This overcurrent detection resistor 5
Although the details will be described later, the single crystal region 5a constituting the overcurrent detection resistor 5 is used as a photodiode constituting a photodiode array 2 having a standard thickness of a single crystal region generally provided on a silicon substrate 10. Single crystal region 2b of diode 2a
Since it is formed thinner, it is difficult to dissipate heat when generating heat by energization, and the generated heat heats itself, so that the resistance value of the overcurrent detection resistor 5 rapidly increases.

The single crystal region 5a of the overcurrent detecting resistor 5
Is provided with an insulating film 5b made of silicon oxide on its boundary surface. The thickness of the insulating film 5b is designed to be 2.0 μm. The thickness of the insulating film 5b may be 1.1 μm to 3.0 μm. Since the thermal conductivity of the silicon oxide forming this insulating film 5b is 1.40 W / m · K, it is 145 W / m · K which is the thermal conductivity of the single crystal silicon.
It is smaller than that.

The NPN bipolar transistors 4 and 4 have their bases connected to the source of the output MOSFET 3 and their emitters connected via the overcurrent detecting resistor 5 to the output M3.
Connected to the source of OSFET3. That is, NP
An overcurrent detecting resistor 5 is connected between the base and the emitter of the N bipolar transistor 4. This NPN
The collector of the bipolar transistor 4 is an output MOS
Connected to the gate of FET3.

The control MOSFET 6 is of an n-channel normally-closed type, and has an MO
The charge / discharge control element 30 for controlling the charge / discharge of the SFET is configured. The control MOSFET 6 has its gate connected to the source via the control resistor 7 and to the cathode of the photodiode array 2, and its source connected to the cathode of the photodiode array 2 via the control resistor 7. , And the drain is connected to the gate of the output MOSFET 3.

Next, the single crystal region 5a of the overcurrent detecting resistor 5
The thickness of the photodiode 2 in the photodiode array 2
FIG. 3 (a) shows a procedure for forming a thinner than the single crystal region 2b of FIG.
This will be described based on (i). First, as shown in FIG. 1A, a silicon oxide layer 41 and a silicon nitride layer 42 are formed on the surface of an N ^- silicon single crystal wafer 40. Next,
As shown in (b), the silicon nitride layer 42 is etched. Subsequently, as shown in FIG.
Is etched.

Next, the substrate shown in FIG. 2C is anisotropically etched as shown in FIG. 2D, and the silicon oxide layer 41 is etched as shown in FIG. Then, by continuing the anisotropic etching, the silicon single crystal region 43 is etched, as shown in FIG.
Subsequently, by etching the silicon nitride layer 42 and the silicon oxide layer 41, a single crystal wafer having a step in a flat portion is formed as shown in FIG.

Next, an N-type impurity is donated and diffused from the surface of the wafer (N ⁺ layer 45), and as shown in FIG.
By forming an insulating layer 46 on the front surface and depositing a support layer 47, and then polishing until a groove for separation is exposed from the back surface side, as shown in FIG. Dielectric separation substrate 50 having single crystal regions 48 and 49
Is formed, and the thickness of the single crystal region 5a of the overcurrent detection resistor 5 is formed smaller than that of the single crystal region 2b of the photodiode array 2.

Next, the operation will be described. Light-emitting diode 1
Emits an optical signal according to the input signal, the photodiode array 2 receives the optical signal of the light emitting diode 1 and generates a photovoltaic voltage. With this photovoltaic power, the output MO
Charge is charged between the gate and source of SFET3, and current flows between the drain and source of control MOSFET6. When a current flows through the control resistor 7 in this manner, a potential difference is generated between both ends of the control resistor 7, and the potential difference cuts off the drain and source of the control MOSFET 6, and the gate and source of the output MOSFET 3 In between the charge will be charged efficiently,
The state between the drain and the source of the output MOSFET 3 shifts from the high impedance state to the low impedance state. That is, the drain current of the output MOSFET 3 flows.

When an input signal is not input to the light emitting diode 1 and light emission stops, the photodiode array 2 stops generating photovoltaic power. Then, the potential difference does not occur at both ends of the control resistor 7, the state between the drain and the source of the control MOSFET 6 changes to a conductive state, and the charge charged between the gate and the source of the output MOSFET 3 is discharged. , Is quickly discharged through the drain and source of the control MOSFET 6, and the output M
The state between the drain and the source of OSFET3 shifts to a high impedance state. That is, the output MOSFET 3
No drain current flows.

When the drain current of the output MOSFET 3 exceeds a predetermined current, the output MOSFET 3
NPN bipolar transistor whose base and emitter are connected to both ends of the overcurrent detection resistor 5 connected to the source of the overcurrent detection resistor 5
4 flows, and the collector current of the NPN bipolar transistor 4 flows. Thus, N
When the collector current of the PN bipolar transistor 4 flows, the charge charged between the gate and the source of the output MOSFET 3 is discharged, and the drain current of the output MOSFET 3 is suppressed to a predetermined current.

In such a semiconductor relay, the single-crystal region 5a of the overcurrent detection resistor 5 provided thinner than the photodiode array 2 having a standard thickness of the single-crystal region provided on the silicon substrate 10 is Since the heat generated by energization becomes difficult to radiate, the resistance value gradually increases with the temperature gradually increasing by energization, and the output MOSFET
Since the drain current of 3 decreases, the output MOSF
An output MO for obtaining a potential difference between the base and the emitter of the NPN bipolar transistor 4 sufficient to discharge the electric charge between the gate and the source of ET3.
The drain current of SFET3 gradually decreases. Therefore,
When the drain current of the output MOSFET 3 exceeds the predetermined current and is suppressed to the predetermined current later, the drain current becomes further smaller than the predetermined current, and the output MOSFET 3
FET3 will not be damaged.

Further, since the insulating film 5b, which is made of an oxide film and has a higher thermal conductivity than single crystal silicon, has a thickness of 2.0 μm, which is larger than the normally designed thickness of 1.0 μm, heat is radiated. Overcurrent detection resistor 5
Becomes larger, and the drain current of the output MOSFET 3 decreases.
3 has been damaged. Also, the insulating film 5b
When the thickness is increased, the time required for forming the insulating film becomes longer,
1. The thickness of the insulating film 5b is 1.1 μm to 3.0 μm.
Since the thickness is 0 μm, even if the actual formation of the insulating film is pyrogenic oxidation at 1100 ° C., the time for forming the insulating film is about 9 hours and 40 minutes, and the time for forming the insulating film does not take too long. .

Also, when an overvoltage is applied to the output MOSFET 3, the amount of heat generated by the overcurrent detection resistor 5 increases with the voltage applied to the output MOSFET 3, so that the heat flows through the overcurrent detection resistor 5. The current becomes smaller,
The output MOSFET 3 is not damaged.

In this embodiment, the overcurrent detecting resistor is used.
The thickness of the insulating film 5b provided on the boundary surface of FIG.
However, for example, when the amount of heat radiation from the overcurrent detecting resistor 5 is extremely small, the thickness may be 1.0 μm, which is a normally designed thickness.

In this embodiment, the thickness of the insulating film 5b is 2.0 μm. However, even if the thickness of the insulating film 5b is 3.0 μm, even if the actual insulating film is formed by pyrogenic oxidation at 1100 ° C. The time for forming the insulating film is about 11 hours, so that the time for forming the insulating film does not take too long.

In this embodiment, the overcurrent detecting resistor is used.
The insulating film 5b provided on the boundary surface of No. 5 is made of silicon oxide, but may be made of silicon nitride having a thermal conductivity of about 25 W / m · K.

In this embodiment, the bipolar transistor is the NPN bipolar transistor 4,
The circuit may be appropriately changed to a PNP bipolar transistor.

In this embodiment, an output MOSFET is used.
3, an NPN bipolar transistor 4 and an overcurrent detection resistor 5 are two AC semiconductor relays each provided with two output MOSFETs 3, one NPN bipolar transistor 4 and one overcurrent detection resistor 5. The same effect can be achieved with the provided DC semiconductor relay.

[0031]

According to the first aspect of the present invention, the single crystal region of the overcurrent detecting resistor provided thinner than the light receiving element which is generally provided with a standard single crystal region thickness on the silicon substrate is provided with an electric current. Since the heat generated by the current becomes difficult to dissipate, the resistance value gradually increases with the temperature rise due to energization, and the drain current of the MOSFET decreases, so that the drain current of the MOSFET flows beyond a predetermined current. Later, when the current is suppressed to the predetermined current, the drain current becomes smaller than the predetermined current and the MOSFET
Will not be damaged.

According to the invention of claim 2, in addition to the effect of the invention of claim 1, in addition to the fact that an insulating film having a thermal conductivity larger than that of single-crystal silicon is generally formed of an oxide film or a nitride film, Since the thickness is 1.1 μm to 3.0 μm, which is thicker than the designed thickness of 1.0 μm, it becomes more difficult to dissipate heat than the invention according to claim 1, so that the resistance value is larger than the invention according to claim 1. As a result, the drain current of the MOSFET decreases, so that the effect of the invention described in claim 1 can be further exhibited. When the thickness of the insulating film is increased, the time required for forming the insulating film is increased. However, since the thickness of the insulating film is 1.1 μm to 3.0 μm, it does not take too much time to actually form the insulating film.

[Brief description of the drawings]

FIG. 1 is a sectional view of a dielectric isolation substrate showing one embodiment of the present invention.

FIG. 2 is a circuit diagram of the same.

FIG. 3 is a cross-sectional view illustrating a method of forming a thin silicon single crystal region.

FIG. 4 is a circuit diagram showing a conventional example.

FIG. 5 is a sectional view of the dielectric isolation substrate of the above.

[Explanation of symbols]

 1 light emitting diode (light emitting element) 2 photodiode array (light receiving element) 2b single crystal region 3 output MOSFET 4 NPN bipolar transistor 5 overcurrent detection resistor 5a single crystal region 5b insulating film 10 silicon substrate 30 charge / discharge control element

[Procedure amendment]

[Submission date] June 26, 1998

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction contents]

The light emitting diode (light emitting element) 1 emits an optical signal according to an input signal inputted between the input terminals 20a and 20b. The photodiode array (light receiving element) 2
Be those provided in the silicon substrate 10, a plurality of photodiodes 2a is being series connected, by receiving the optical signal from the light emitting diode 1 to generate the photovoltaic.

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0024

[Correction method] Change

[Correction contents]

Further, since the insulating film 5b, which is made of an oxide film and has a higher thermal conductivity than single crystal silicon, has a thickness of 2.0 μm, which is larger than the normally designed thickness of 1.0 μm, heat is radiated. Overcurrent detection resistor 5
Becomes larger, and the drain current of the output MOSFET 3 decreases.
3 has become a pile correct damage. When the thickness of the insulating film 5b is increased, the time required for forming the insulating film is increased. However, the thickness of the insulating film 5b is 1.1 μm to 3.0 μm.
μm, even if the actual formation of the insulating film is pyrogenic oxidation at 1100 ° C., the time for forming the insulating film is about 9 hours and 40 minutes, and the time for forming the insulating film does not take too long. .

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0026

[Correction method] Change

[Correction contents]

In this embodiment, the overcurrent detecting resistor is used.
The thickness of the insulating film 5b provided on the boundary surface of FIG.
Although, for example, the amount of heat released from the overcurrent detection resistor 5 is very large Itoki is may be a 1.0μm and a thickness which is usually designed.

[Procedure amendment 3]

[Document name to be amended] Drawing

[Correction target item name] Fig. 5

[Correction method] Change

[Correction contents]

FIG. 5

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H03K 17/78

Claims (2)

[Claims] A light emitting element that emits light in response to an input signal;
A light-receiving element that receives light from the light-emitting element to generate photovoltaic power;
T, a charge / discharge control element for controlling charge / discharge of the MOSFET, an overcurrent detection resistor connected to the source of the MOSFET, a base and an emitter connected to both ends of the overcurrent detection resistor, and a gate of the MOSFET. A bipolar transistor having a collector connected to the semiconductor relay, wherein each of the light receiving element and the overcurrent detection resistor is provided on the silicon substrate as a single crystal region, wherein the single crystal region of the overcurrent detection resistor is A semiconductor relay provided thinner than a single crystal region of the light receiving element. 2. The single crystal region of the overcurrent detection resistor has an insulating film provided on a boundary surface, and the insulating film has a thickness of 1.1 μm to 3.0 μm. The semiconductor relay according to claim 1.