JPH10256520A - Amplification type solid state image sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To largely shorten manufacturing steps by simultaneously forming a plurality of types of MOS transistors having different thresholds. SOLUTION: The amplification type solid state image sensor comprises an amplifying transistor, a reset transistor, a selector transistor and a transfer transistor of four types. The four types of the transistors are controlled at gate sizes with first polysilicon wirings 13a to 13e while impurity concentrations of regions of gates 19, 18, 20, 14a, 14b of the respective transistors to obtain different thresholds.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device having an amplifying function inside a pixel, that is, a so-called amplification type solid-state image pickup device. It is an object of the present invention to provide an amplification type solid-state imaging device having a MOS transistor structure, whereby the manufacturing process can be significantly reduced.

[0002]

2. Description of the Related Art In recent years, the potential of a signal charge accumulating section has been modulated with signal charges generated by photoelectric conversion, and a change in the potential has modulated an amplifying transistor inside a unit pixel, thereby providing a signal amplification function inside the pixel. Solid state imaging devices have been developed. This solid-state imaging device is called an amplification type solid-state imaging device, and is expected as a solid-state imaging device suitable for increasing the number of pixels, reducing the image size, and reducing power consumption.

The basic configuration of a unit pixel in an amplification type solid-state imaging device includes, for example, a photodiode for photoelectric conversion, a charge storage unit for temporarily storing signal charges generated by the photodiode, and A transfer gate for transferring signal charges from the diode to the charge storage unit;
A reset gate and a reset drain for initializing the potentials of the photodiode and the charge storage unit, an amplification transistor whose gate is connected to the charge storage unit for modulation by a change in potential of the charge storage unit, and a pixel are selected. Consists of a selection gate and Therefore, in the above example, which can be said to be the standard configuration of the current amplification type solid-state imaging device, it is necessary to form as many as four MOS transistors, ie, a transfer gate, a reset gate, an amplification transistor gate, and a selection gate inside a unit pixel. is there.

As a pixel selection method instead of the selection gate, a method using capacitive coupling or a method of addressing with a reset drain potential via a reset gate can be considered. However, also in this case, it is necessary to form three transistors inside the unit pixel.

[0005]

As described above, it is necessary for an amplification type solid-state imaging device to form a plurality of transistors inside a unit pixel. However, the threshold values of a plurality of types of transistors in a unit pixel need to be controlled to different values because of the different functions of the transistors and the limitation of the drive power supply voltage.

On the other hand, the above-described transistor is generally formed of the same layer of gate material, and therefore has a gate oxide film of equal thickness. for that reason,
Controlling the threshold value of these transistors required changing the impurity concentration in the gate region of each transistor.

Therefore, in the manufacturing process of the solid-state imaging device,
A photolithography process and an impurity control process, for example, an ion implantation process, which are almost as many as the types of transistors having different threshold values, have been required.

Taking the above-described unit pixel configuration as an example. In order to independently control the threshold values of the four types of transistors, three photolithography steps and three ion implantation steps in addition to a normal MOS transistor formation step Steps and steps accompanying these steps are required.

FIG. 3 is a plan view showing an example of the structure of a conventional amplification type solid-state imaging device. In FIG. 3, this amplification type solid-state imaging device has four types of transistors, namely, an amplification transistor, a reset transistor, a selection transistor, and a mixing (transfer) transistor. And 4b represent the gates of the respective transistors. In the figures, 5a, 5b and 5c are photodiodes, 6 is a first aluminum wiring as a lower wiring, 7 is a second aluminum wiring as an upper wiring, 8 is a first polysilicon gate of a first layer, Reference numeral 9 denotes a second polysilicon gate of the second layer.

The first aluminum wiring forms a drain line, and the second aluminum wiring forms a signal line.
In addition, the first and second aluminum wirings 6 and 7,
A contact hole 10 is provided at a connection portion with the polysilicon gate 8. These contact holes are divided into a drain line contact portion 10a and a signal line contact portion 10b by a connection portion.

Here, the four types of transistors, namely, the amplifying transistor, the reset transistor, the selection transistor, and the transfer transistor have different functions, and therefore it is desirable to independently control the thresholds as described above.

In particular, in the case of the solid-state imaging device having the structure shown in FIG. 3, since the mixing (transfer) transistor has a common wiring with the selection transistor, its threshold value needs to be controlled to be high. Even if there is no sharing of wiring having a structure as shown in FIG. 3, control of the threshold value is important.

Further, the gate of the reset transistor needs to be surely closed at the low level, and the threshold value needs to be controlled to a certain high level. The transfer transistor is
In order to separate the photodiodes 5a, 5b, 5c from the detection nodes (storage diodes), it is necessary to increase the threshold value, and it is desirable to have a threshold value higher than that of the reset transistor 2.

Further, it is desirable to control the amplifying transistor low so as to have a sufficient width for the amplifying function.
On the other hand, the selection gate (the gate of the selection transistor 3) desirably has a somewhat lower threshold value for the same reason as the amplification transistor.

Therefore, in the above-described conventional structure, at least three photolithography steps and three impurity diffusion (or ion implantation) steps are performed as steps for controlling the threshold values of the four types of transistors to different values. However, the accompanying steps are required, which has been a major obstacle in reducing the number of manufacturing steps.

The present invention has been made in consideration of the above-mentioned circumstances, and an object of the present invention is to simultaneously provide a plurality of types of MOS transistors having different threshold values without making the impurity concentration of the gate region of each transistor different. Forming
An object of the present invention is to provide an amplification type solid-state imaging device capable of greatly reducing the number of manufacturing steps.

[0017]

That is, the present invention relates to a semiconductor substrate, photoelectric conversion means formed on the semiconductor substrate, and accumulation of signal charges generated on the semiconductor substrate and generated by the photoelectric conversion means. Storage means, amplifying transistor formed on the semiconductor substrate and amplifying signal charges stored in the storage means, and resetting resetting signal charges formed on the semiconductor substrate and stored in the storage means Wherein the amplifying transistor and the reset transistor have gate regions having the same impurity concentration and different threshold values.

According to the present invention, a plurality of types of MOS transistors having different threshold values in the amplification type solid-state imaging device are
By controlling the gate size of each transistor in a state where the impurity concentration of the gate region of each transistor is equal, by actively using the decrease in the threshold value by the so-called short channel effect and the increase in the threshold value by the so-called narrow channel effect. Form. Therefore, a process for independently controlling the impurity concentration of the gate region of each transistor is not required, and the manufacturing process of the amplification type solid-state imaging device can be significantly reduced.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram showing a planar structure of a unit pixel of an amplification type solid-state imaging device according to an embodiment of the present invention, and has a structure in which one cell is composed of two adjacent pixels arranged in a vertical direction. This is an example of a pixel having a size of 0.6 μm.

In FIG. 1, photodiodes 11a and 11b for performing photoelectric conversion are replaced with the photodiodes 11a and 11b.
The storage diode 12 that stores the signal charges photoelectrically converted by 11b is disposed therebetween. Then, in the left-right direction in FIG.
13d and 13e are arranged. A transfer transistor for transferring signal charges stored in the storage diode 12 is provided at a portion where the first polysilicon wirings 13b and 13c intersect between the photodiodes 11a and 11b and the storage diode 12. Gate 14
a and 14b are configured.

In the direction orthogonal to the first polysilicon wirings 13 to 13e, a second polysilicon wiring 15 and diffusion layers 16a and 16b for drain lines are provided. The second polysilicon wiring 15 and the diffusion layer 16 of the drain line
a, storage diode 12, first polysilicon wiring 13e
Are provided with first, second, and third contact portions 17a, 17b, and 17c, respectively.

Further, the gate 18 of the reset transistor is formed at the intersection of the drain line diffusion layer 16a and the first polysilicon wiring 13a. Similarly, the gate 19 of the amplification transistor is provided at the intersection of the drain line diffusion layer 16b and the first polysilicon wiring 13e, and the selection transistor is provided at the intersection of the drain line diffusion layer 16b and the first polysilicon wiring 13d. Gate 20 is formed.

Incidentally, 21a and 21b are drain line contact portions, and 22 is a signal line contact portion. in this way,
This amplification type solid-state imaging device is a so-called four-transistor type pixel which is configured by four types of transistors, that is, a transfer transistor, an amplification transistor, a selection transistor, and a reset transistor.

The feature of the amplification type solid-state imaging device shown in FIG. 1 is that the threshold values of a plurality of types of transistors constituting a unit pixel are modulated by the gate size.
That is, as described above, it is desirable that the threshold values of the four types of transistors, ie, the transfer transistor, the amplification transistor, the selection transistor, and the reset transistor, are independently controlled. As shown in FIG. 1, modulation by gate dimensions has been used to achieve the desired threshold.

[0025]

[Table 1]

Table 1 is a list of gate dimensions and threshold values of a plurality of types of MOS transistors constituting a unit pixel of the amplification type solid-state imaging device according to the embodiment. According to this,
The gate width of each transistor is set to 0.9 μm.
μm, 0.4 μm for the select transistor, 0.5 μm for the reset transistor, and 0.8 for the transfer transistor.
It is set to μm. As described above, by changing the gate length of each transistor, the respective thresholds can be controlled to different values.

In the above-described conventional structure, the impurity concentration in the gate region of each transistor is changed in order to control the threshold values of the four types of transistors to different values. At this time, the gate dimensions of each transistor were set to values as shown in Table 2 below.

[0028]

[Table 2] Table 2 is a list of gate dimensions of a plurality of types of MOS transistors constituting a unit pixel of the conventional amplification type solid-state imaging device.

In this embodiment, the transistor threshold value is controlled by an independent impurity concentration control step only for the amplifying transistor. However, if the gate processing accuracy can be improved, the amplifying transistor is also used. It is possible to obtain a desired threshold by threshold modulation based on the gate size.

In the above-described embodiment, a semiconductor substrate having a boron concentration of 1 × 10 ¹⁷ (cm ⁻² ) is used.
The MOS transistor has a gate oxide film thickness of 140 angstroms and a specific resistance of 1.6 (m) as a gate material.
Ω · cm) phosphorus-doped polysilicon is used,
The SiN side wall for an LDD (Lightly Doped Drain) structure is formed at 1500 Å, and an nMOS transistor is formed.

FIG. 2 shows how the threshold value of the MOS transistor is modulated by the gate length under this condition, that is, a characteristic diagram of the short channel effect. Referring to the characteristic diagram of FIG. 2 and Table 1 described above, four types of transistors constituting the pixel of the amplification type solid-state imaging device include:
It can be seen that each is controlled to a desired threshold.

On the other hand, as described above, in the conventional example shown in FIG. 3, a plurality of types of transistors in the unit pixel have their gate dimensions (gate width) as shown in Table 1 above.
Are different from each other, but each is designed in a range where the short channel effect or the narrow channel effect does not appear. Needless to say, this is completely different from the gate size design in the present invention.

Therefore, as compared with the structure of the conventional amplifying type solid-state imaging device shown in FIG. 3, the manufacturing process does not require a process for controlling the threshold value of the transistor inside the pixel.

Specifically, as shown in FIG. 1 and Table 1, in this embodiment, three types of transistors (selection transistor, transfer transistor, and reset transistor) except for the amplification transistor can be formed simultaneously.
Accordingly, two photolithography steps and ion implantation steps, and steps accompanying these steps, such as a resist stripping step, are not required, and the manufacturing steps can be greatly reduced.

By the way, in the active use of the short channel effect and the narrow channel effect described above, it is pointed out that there is a possibility that processing variations directly cause these effects and threshold variations occur. However, according to an experiment conducted by the present applicant, for example, in the case of shortening the gate length, it is confirmed that the increase in the variation in threshold value is within a sufficiently allowable range up to about 0.41 μm.

In the above-described embodiment, the threshold value of the transistor inside the pixel is modulated only by the short channel effect. However, the present invention is not limited to this, and the threshold value is increased by shortening the gate width. It goes without saying that the same effect can be obtained even if the user actively uses.

In the above embodiment, n
Although the structure using the MOS transistor has been described, the pMO
Similar effects can be obtained by using an S transistor. still,
The present invention is not limited to the above-described embodiments, and can be variously modified and implemented without departing from the gist thereof.

[0038]

As described above, according to the present invention, a plurality of types of MOS transistors having different threshold values are simultaneously formed without changing the impurity concentration of the gate region of each transistor, thereby greatly reducing the number of manufacturing steps. Becomes possible.

[Brief description of the drawings]

FIG. 1 is a schematic diagram for explaining a planar structure of a unit pixel of an amplification type solid-state imaging device according to an embodiment of the present invention.

FIG. 2 is a characteristic diagram illustrating a change in a threshold value of a MOS transistor depending on a gate length in a short channel effect of the amplification type solid-state imaging device having the configuration of FIG. 1;

FIG. 3 is a schematic diagram for explaining a planar structure of a unit pixel of a conventional amplification type solid-state imaging device.

[Explanation of symbols]

1, 19 Gate of amplifying transistor, 2, 18 Gate of reset transistor, 3, 20 Gate of selection transistor, 4a, 4b, 14a, 14b Gate of mixed (transfer) transistor, 5a, 5b, 5c, 11a, 11b Photodiode 6 1st aluminum wiring, 7 2nd aluminum wiring, 8, 13a, 13b, 13c, 13d, 13e 1st polysilicon wiring, 9, 15 2nd polysilicon wiring, 12 storage diode, 16a, 16b Diffusion of drain line Layers, 17a first contact portion, 17b second contact portion, 17c third contact portion, 21a, 21b drain line contact portion, 22 signal line contact portion.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Ryohei Miyagawa 1st Toshiba R & D Center, Komukai-shi, Kawasaki-shi, Kanagawa Prefecture (72) Inventor Keiji Mabuchi Toshiba Komukai, Yuki-ku, Kawasaki-shi, Kanagawa No. 1 in the Toshiba R & D Center, Inc. (72) Inventor Hiroshi Yamashita 1 in Komukai Toshiba, Koyuki-ku, Kawasaki-shi, Kanagawa Prefecture In-Toshiba R & D Center Inc. (72) Inventor Eiji Oba, Kawasaki-shi, Kanagawa No. 1, Komukai Toshiba-cho, Ward, Tokyo Toshiba R & D Center (72) Inventor Nagataka Nagataka 1, Kosuka Toshiba-cho, Kawasaki-shi, Kanagawa, Japan Toshiba R & D Center (72) Inventor, Hisanori Ihara 1 Toshiba R & D Center, Komukai Toshiba-cho, Kawasaki-shi, Kanagawa

Claims (5)

[Claims] A semiconductor substrate; a photoelectric conversion unit formed on the semiconductor substrate; a storage unit formed on the semiconductor substrate and storing signal charges generated by the photoelectric conversion unit; And a reset transistor formed on the semiconductor substrate and resetting the signal charges stored in the storage means, the amplification transistor being configured to amplify the signal charges stored in the storage means. And an amplifying solid-state imaging device, wherein the reset transistor and the reset transistor have gate regions having the same impurity concentration and different threshold values. 2. The semiconductor device according to claim 1, further comprising a transfer transistor formed on said semiconductor substrate and connecting said photoelectric conversion means and said storage means, wherein said amplification transistor, reset transistor and transfer transistor have gate regions having the same impurity concentration. ,
The amplification type solid-state imaging device according to claim 1, wherein the amplification type solid-state imaging device has different threshold values. 3. The semiconductor device according to claim 1, further comprising a selection transistor formed on the semiconductor substrate and selectively outputting an amplified output of the amplification transistor, wherein the amplification transistor, the reset transistor, and the selection transistor have gate regions having the same impurity concentration. And
The amplification type solid-state imaging device according to claim 1, wherein the amplification type solid-state imaging device has different threshold values. 4. The amplification type solid-state imaging device according to claim 1, wherein each of the transistors has a different gate width. 5. The amplification type solid-state imaging device according to claim 1, wherein each of the transistors has a different gate length.