JPH05206438A - Solid state image sensor - Google Patents

Abstract

PURPOSE:To provide a solid state image sensor in which an oxide having stabilized VTH can be obtained for a transistor at the output part while a uniform oxide can be obtained at a transfer part by taking advantages of both MOS structure and MONOS structure. CONSTITUTION:As the gate oxide structure for a CCD image sensor, MONOS structure is employed for a horizontal CCD 5 whereas MOS structure is employed for an output transistor 10. Consequently, oxide is formed uniformly under each gate at a transfer part because of the MONOS structure whereas VTH Shift is suppressed in the transistor at the output part because of the MOS structure.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device, and more particularly to a structure of a transfer unit and an output unit in a CCD solid-state image pickup device using a MIS (Metal-Insulator-Semiconductor) structure.

[0002]

2. Description of the Related Art FIG. 9 shows an example of the structure of an interline transfer type CCD solid-state image pickup device. In the figure, incident light is converted into signal charges in pixel units and accumulated.
A plurality of photosensors (light receiving parts) 1 arranged in a dimension,
An image pickup area is formed by a vertical CCD (vertical transfer unit) 3 which is arranged for each vertical column of these photosensors 1 and vertically scans by vertically transferring the signal charges read through the read gate (ROG) 2. 4 are configured.

The signal charge read out to the vertical CCD 3 is
Each scanning line is sequentially transferred to the horizontal CCD (horizontal transfer unit) 5. The horizontal CCD 5 is the one transferred from the vertical CCD 3.
Horizontal scanning is performed by transferring the signal charges of the scanning lines in the horizontal direction. The signal charges transferred by the horizontal CCD 5 are accumulated in the floating diffusion 7 via the horizontal output gate (HOG) 6. The signal charge accumulated in the floating diffusion 7 is reset by the reset transistor 8. The signal voltage-converted by the floating diffusion 7 is impedance-converted and output by the output unit 9 including a source follower.

In this type of CCD solid-state image pickup device, a MIS structure in which an oxide film is sandwiched between a gate electrode and a semiconductor substrate is used everywhere. For example, vertical CCD3
The MIS structure is used for the transfer register of the horizontal CCD 5 and the MOS transistor of the source follower of the output unit 9. In the conventional CCD solid-state imaging device, a single type of oxide film is used for the gate oxide film of the MIS structure of each part. Currently, the mainstream of this single type of oxide film is a MOS structure and MONOS (Metal-SiO ₂ -Si).
₃ N ₄ —SiO ₂ —Si) structure. Each of these structures will be described below.

First, an example of a manufacturing process of a transfer register having a MOS structure is shown in FIGS. Process (a)
Is a step of depositing the first-layer polysilicon 13 on the SiO ₂ oxide film 12 of the silicon substrate 11. In the step (b), the resist 1 is used for forming the electrode of the resistor.
The polysilicon 13 of the first layer is etched by using 4 as a mask. At this time, the SiO ₂ oxide film 12 is also etched at the same time by the over-etching for completely etching the polysilicon 13.

In the step (c), in order to insulate between the first and second layer polysilicon gates, the first layer polysilicon 1 is formed.
3 is a step of oxidizing 3. When the first-layer polysilicon 13 is oxidized by this thermal oxidation, the portion not covered with the polysilicon 13 is also oxidized at the same time. In the step (d), polysilicon 15 is used as an electrode material for the second layer resist.
To deposit. In the step (e), the resist 16 is used as a mask to form the second electrode of the resistor.
The polysilicon 15 of the layer is etched. Process (f)
Then, polysilicon oxidation is performed to complete the CCD register structure.

MOS manufactured by the above process
In the case of a transfer register having a structure, in order to separately form the first-layer gate oxide film (SiO ₂ oxide film) and the second-layer gate oxide film, the first-layer polysilicon 13 is oxidized in step (c). At this time, if an attempt is made to secure the film thickness of the second-layer gate oxide film, the film thickness of the first-layer gate oxide film becomes large, and the film thicknesses t ₁ and t _{2 of the} respective oxide films are different. There is a drawback that the channel potential changes.

On the other hand, in FIGS. 11A to 11F, the MONO
An example of a gate manufacturing process of a transfer register having an S structure will be described. In the step (a), ONO (SiO ₂ -Si
_This is a step of depositing the first-layer polysilicon 13 on the ₃ N ₄ —SiO ₂ ) oxide film 17. In the step (b), the first layer polysilicon 13 is etched using the resist 14 as a mask. At this time, because of over-etching, O
Although the thin SiO ₂ layer (having a thickness of, for example, about 10 nm) 18 above the NO oxide film 17 is etched, a high RIE (Reactive-Ion-Etching) selection ratio between polysilicon and Si ₃ N ₄ is required. As a result, Si ₃ N ₄ (having a thickness of, for example, about 50 nm) in the intermediate layer is only slightly etched, and the etching amount is, for example, about 1 nm, which is a sufficiently negligible amount in view of the total oxide film thickness. Is.

In step (c), the first layer of polysilicon 13 is used.
Is a step of oxidizing. Polysilicon 1 by thermal oxidation
When 3 is oxidized, the portion not covered with the polysilicon 13 is also oxidized, but in reality, the oxidation rates of polysilicon and Si ₃ N ₄ are significantly different, so Si ₃ N ₄
The surface of is slightly oxidized, and the increase / decrease in the film thickness due to the oxidation can be sufficiently ignored from the viewpoint of the total oxide film thickness. In step (d), polysilicon 15 is deposited as an electrode material for the second layer resistor. In step (e), the second layer polysilicon 15 is etched using the resist 16 as a mask for forming the second layer resistor electrode. In the final step (f), polysilicon oxidation is applied to the CCD
Complete the register structure.

In this process, although the first and second gate oxide films are separately formed, the feature that the etching amount and the oxidizing amount of Si ₃ N ₄ can be made sufficiently small is utilized, and the thickness of each oxide film is Can be made substantially constant, so that there is an advantage that the potential difference between the channel portion under the first-layer polysilicon and the second-layer polysilicon gate can be made smaller than in the MOS structure process. Therefore, in the manufacturing process of the transfer register, the ONO film 17 having a high RIE selection ratio with the gate electrode material (polysilicon).
The MONOS structure using is advantageous.

[0011]

By the way, in recent years, CC
The D solid-state imaging device tends to have a higher number of pixels. In order to cope with this increase in the number of pixels, the frequency characteristic of the source follower stage of the output unit 9 must be improved. In order to improve the frequency characteristics of the source follower stage, it is necessary to increase the mutual conductance g _m of the output transistor. Therefore, the MOS structure in which the thickness of the gate oxide film can be made smaller is MONOS.
Advantages over structure.

As shown in the equivalent circuit of FIG. 12, the output part of the horizontal CCD 5 has a pn junction floating diffusion 7 for converting the signal charge from the horizontal CCD 5 into a voltage, and a voltage change of the floating diffusion 7. It comprises a source follower output transistor 10 for impedance conversion and outputting as a signal, and a reset transistor 8 for resetting the charges of the floating diffusion 7.

In this output circuit, it is necessary to suppress the parasitic capacitances of the floating diffusion 7, the input gate of the output transistor 10 and the reset transistor 8 to be small in order to perform high charge-voltage conversion. That is, it is necessary to make the input gate of the first stage of the source follower in a small area. However, in the case of the MONOS structure, such a small area gate has the same structure as the memory,
As shown in FIG. 13, Si ₃ N ₄ -S of MONOS structure
There is a drawback that charges are easily trapped at the interface of iO ₂ and the threshold level V _TH is easily changed.

On the other hand, in the case of the MOS structure, Si ₃ N ₄
Since the -SiO ₂ interface itself does not exist, the threshold level V _TH is unlikely to change. Therefore, although the MOS structure is more advantageous in this portion, as described above,
Since the channel potential changes due to the difference in film thickness of the first and second gate oxide films, there is a problem in the CCD register section.

Therefore, the present invention uses a MOS structure and a MONO.
An object of the present invention is to provide a solid-state imaging device that makes it possible to obtain an oxide film having a stable V _{TH in} a transistor in an output portion and an oxide film having a uniform thickness in a transfer portion, by making use of the advantages of both S structures. And

[0016]

A solid-state image pickup device according to the present invention comprises a plurality of two-dimensionally arrayed light receiving portions for photoelectrically converting incident light in pixel units and accumulating, and signals read from these light receiving portions. A transfer register for transferring charges and an output transistor for detecting the signal charges transferred by the transfer register to derive an output signal are provided, and the gate insulating film of the transfer register includes a nitride film. The gate insulating film of the output transistor is made of an insulating film having a multi-layered structure and has no charge trap inside.

[0017]

As a gate oxide film structure of a solid-state image pickup device, a MONOS structure is used in the transfer part and a MOS structure is used in the output part, so that the film thickness of the oxide film under each gate layer is made uniform in the transfer part due to the characteristics of the MONOS structure. And the output transistor is V
_TH shift can be suppressed. Further, since the gate oxide film of the output transistor is formed thin by the MOS structure, the mutual conductance g _m of the output transistor can be increased, so that the frequency characteristic of the source follower stage can be improved.

[0018]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a sectional structural view showing an embodiment of the present invention, showing only a horizontal transfer portion and an output portion of a CCD solid-state image pickup device. In the figure, the horizontal CCD 5 and the horizontal output gate 6, which are transfer registers, have a MONOS structure in which the gate insulating film is a multilayer insulating film including a nitride film, that is, an ONO oxide film 17, and the output transistor 10 is used. Has a MOS structure in which the gate insulating film is an insulating film having no charge trap inside, that is, a SiO ₂ oxide film 12.

Next, the manufacturing process of the above structure will be described with reference to the process diagrams (No. 1 and No. 2) of FIGS. In the step (a), the ONO oxide film 17 is formed on the silicon substrate 11 which is doped with a predetermined impurity by an ion implanter or the like, and the
This is a step of depositing the polysilicon (1Poly) 13 of the layer. In step (b), the first layer of polysilicon 13 is etched using the resist 14 as a mask for forming the electrodes of the horizontal CCD 5. At this time, the upper thin SiO ₂ layer for the over-etching is etched by taking high RIE selectivity of polysilicon and Si ₃ N _4, only Si ₃ N ₄ of the intermediate layer is slightly etched Therefore, this etching amount can be sufficiently ignored in view of the total oxide film thickness.

In step (c), Si _{3 in the} MOS formation portion is
In order to remove the N ₄ —SiO ₂ film, etching is performed using the resist 19 as a mask. The step (d) is a step of oxidizing the polysilicon 13 of the first layer in order to insulate between the polysilicon gates of the first layer and the second layer. When oxidizing the polysilicon 13 by thermal oxidation, the polysilicon 13
Although the portion not covered by the oxide is also oxidized, the Si ₃ N ₄ —SiO ₂ film remains in the register forming portion, so in reality Si ₃ N ₄ is only slightly oxidized. The amount of increase / decrease of the film thickness is sufficiently negligible in view of the oxide film thickness under the first layer polysilicon 13. On the other hand, M
Since the oxide film is removed in advance from the OS formation portion, it is sufficiently oxidized to have a shape as shown in the figure, and a SiO ₂ oxide film for a MOS structure can be formed.

In step (e), polysilicon (2Poly) 15 is deposited as an electrode material for the second layer. In the step (f), the resist 16 is used as a mask to form a second layer electrode and a MOS gate electrode.
The polysilicon 15 of the layer is etched. Then, in the final step, as shown in FIG. 1, polysilicon oxidation is performed and ion implantation for source / drain is performed by self-alignment to form a MOS transistor structure.

By the above manufacturing process, the MONO is transferred to the transfer portion (CCD register) in the same CCD solid-state image pickup device.
A CCD solid-state imaging device having an S structure and a MOS structure at the output portion can be realized. As a result, in the CCD register part, the film thickness of the oxide film under each gate layer can be made uniform by using the MONOS structure, and the transistor in the output part has a MOS
The structure could be used to suppress V _TH shifts. Further, since the gate oxide film of the output transistor can be formed thin by the MOS structure, the mutual conductance g _m of the output transistor 10 can be increased, and as a result, the frequency characteristic of the source follower stage can be improved. Therefore, it is possible to deal with higher pixel counts.

FIG. 4 is a sectional structural view showing another embodiment of the present invention. In this embodiment, as the gate oxide film structure of the CCD solid-state image pickup device, a MONOS structure is used for the read gate 2, the vertical CCD 3, the horizontal CCD 5, and the horizontal output gate (HOG) 6 in FIG. The output section 9 has a MOS structure, and the boundary between the ONO oxide film 17 and the SiO ₂ oxide film 12 is provided in the floating diffusion 7.

Next, the manufacturing process of this structure will be described with reference to FIG.
6 and the process diagram (part 1 and part 2) of FIG. The basic manufacturing process is the same as that of the previous embodiment, and for simplification of description, only different parts will be described. In step (c), Si ₃ N ₄ —SiO
₂ Etching will be done to remove the film,
The boundary to be etched at this time is set in the floating diffusion (FD) forming portion (see FIG. 4). Further, in the step (f), the second layer polysilicon 15 is etched using the resist 16 as a mask in order to form the electrode of the second layer register and the MOS gate electrode of the reset transistor 8.

In step (g), the second layer of polysilicon 1 is used.
5 is oxidized to form Si having a thickness of, for example, about 60 nm.
An O ₂ oxide film can be obtained. In step (h), the resist 20 is used as a mask in order to form the high-concentration region of the floating diffusion 7 and the drain (RD) portion of the reset transistor 8, and part of the impurities is ion-implanted by self-alignment. .. Then, in the final step, as shown in FIG. 4, the contact hole 21 is formed in the drain (RD) portion of the floating diffusion 7 and the reset transistor 8.
By forming a and 21b and patterning the Al electrodes 22a and 22b, the present structure is formed.

By adopting the above structure, since the gate structure of the reset transistor 8 is a MOS structure, the threshold level V _TH of the reset transistor 8 is MO.
It is more stable than the one with NOS structure. Therefore, the reset pulse amplitude can be small, and the power consumption can be reduced. This will be described with reference to FIG.

In FIG. 7, (A) shows the reset amplitude required for the MONOS structure, and (B) shows the reset amplitude required for the MOS structure. In FIG. 7A, the reset amplitude 1 is not only the minimum amplitude 2 that is originally required for resetting, but also a margin 3 for absorbing variations in the impurity dose amount and variations in the power supply of the reset pulse driver, and V.
_{It consists of} a margin 4 to absorb variations in _TH shift.

For example, (reset pulse amplitude 1) = 9V
Of these, if (margin 4 for absorbing variations in V _TH shift) = 2V, MO that is less likely to cause V _TH shift
In the case of the S structure, as shown in FIG. 7B, the margin 4 for absorbing the variation in V _TH shift is not required,
(Reset pulse amplitude 1) = 7V is sufficient. Since power consumption is proportional to the square of the pulse amplitude, MONOS
The power consumption of the MOS structure is (7 ×
7/9/9) = 0.6, that is, 60% will suffice.

At this time, the SiO ₂ oxide film 12 is turned on.
Since the boundary of the O oxide film 17 is within the floating diffusion 7, no problem due to the difference in film quality occurs. When provided in the horizontal output gate (HOG) 6 and the reset transistor 8 other than the floating diffusion 7, for example, the SiO ₂ oxide film 12 and O
Even if the electrical thickness of the NO oxide film 17 is the same, electrons are easily trapped at the boundary of the ONO oxide film 17 as shown in FIG. Will be hindered.

[0030]

As described above, according to the present invention,
As a gate oxide film structure of a solid-state image pickup device, M
Since the ONOS structure is configured to use the MOS structure in the output portion, the thickness of the oxide film under each gate layer can be made uniform due to the characteristics of the MONOS structure in the transfer portion, and the transistor in the output portion has the MOS structure. Due to its characteristics, V _TH shift can be suppressed.

Further, since the gate oxide film of the output transistor is formed thin by the MOS structure, the transconductance g _m of the output transistor can be increased, so that the frequency characteristic of the source follower stage can be improved. Therefore, it is possible to cope with the increase in the number of pixels of the solid-state imaging device.

Furthermore, since the gate structure of the reset transistor is also the MOS structure, the V _TH of the reset transistor is more stable than that of the MONOS structure, so that the reset pulse amplitude can be small and the power consumption can be reduced. It is possible to obtain the effect of reducing the amount.

[Brief description of drawings]

FIG. 1 is a sectional structural view showing an embodiment of the present invention.

FIG. 2 is a process drawing (1) showing the manufacturing process of the embodiment of the present invention.

FIG. 3 is a process diagram (2) showing the manufacturing process of the embodiment of the present invention.

FIG. 4 is a sectional structural view showing another embodiment of the present invention.

FIG. 5 is a process drawing (1) showing a manufacturing process of another embodiment of the present invention.

FIG. 6 is a process drawing (2) showing the manufacturing process of another embodiment of the present invention.

FIG. 7 is a diagram showing a relationship between reset pulse amplitudes.

FIG. 8 is a channel potential diagram of a horizontal output gate (HOG) portion.

FIG. 9 is a configuration diagram showing an example of an interline transfer type CCD solid-state imaging device.

FIG. 10 is a process chart showing an example of a manufacturing process of a MOS structure.

FIG. 11 is a process chart showing an example of a manufacturing process of the MONOS structure.

FIG. 12 is an equivalent circuit diagram of an output unit.

FIG. 13 is a diagram showing charge trapping in a MONOS structure.

[Explanation of symbols]

1 Photosensor 3 Vertical CCD 5 Horizontal CCD 7 Floating Diffusion 8 Reset Transistor 10 Output Transistor 11 Silicon Substrate 12 SiO ₂ Oxide Film 17 ONO Oxide Film

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Hideo Kobe Kobe 7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Hideji Abe 6-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Michio Negishi 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Michio Yamagishi 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation

Claims (4)

[Claims] 1. A plurality of light receiving sections arranged in a two-dimensional array for photoelectrically converting incident light in pixel units and accumulating, a transfer register for transferring a signal charge read from the light receiving section, and the transfer section. An output transistor for deriving an output signal by detecting a signal charge transferred by a register, wherein the gate insulating film of the transfer register is composed of a first insulating film having a multilayer structure including a nitride film, A solid-state imaging device, wherein the gate insulating film of the output transistor is formed of a second insulating film having no charge trap inside. 2. The first insulating film has a multi-layer structure in which an oxide film, a nitride film and an oxide film are laminated in this order, and the second insulating film is an oxide film. 1. The solid-state imaging device according to 1. 3. A reset transistor for resetting a signal charge accumulated in an impurity diffusion layer formed at an output portion of the transfer register, wherein a gate insulating film of the reset transistor is the first transistor.
3. The solid-state imaging device according to claim 1, comprising the insulating film of. 4. The solid-state imaging device according to claim 3, wherein a boundary between the first insulating film and the second insulating film is in the impurity diffusion layer.