JPH10256362A - Semiconductor substrate, and manufacture of semiconductor substrate and thin film semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an optimum-strength structure according to the use and mode by forming a single crystal semiconductor layer and porous layer on a semiconductor substrate through a hollow layer having dispersed columnar pieces. SOLUTION: A multi-step anodic forming is applied to a single crystal Si semiconductor substrate 11 to form a porous layer 12 composed of a low- porosity porous surface layer 12S and higher medium-porosity layer 12M than the layer 12S on the substrate surface and heat-treated to make smooth the surface of the layer 12S and form a hollow layer 13 at the interface of the porous layer and substrate 11, extending along the layer 12 with a single crystal semiconductor layer 14 formed on the hollow layer 13, which has a plurality of dispersed and planted, hence the hollow layer 13 cracks for holding the separability.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor substrate and a method for manufacturing a semiconductor substrate and a thin film semiconductor.

[0002]

2. Description of the Related Art When a semiconductor device such as a semiconductor device such as a transistor, a light emitting device, or a solar cell, or a semiconductor device such as a semiconductor integrated circuit in which a plurality of semiconductor devices are formed on a common substrate is used, For example, a flexible configuration or a so-called SOI (S
For example, in the case of a semiconductor on insulator (insulator) configuration, a thin film semiconductor is manufactured.

[0003]

SUMMARY OF THE INVENTION The applicant of the present invention, for example, in Japanese Patent Application No. 9-53354, firstly formed a porous layer having a separation layer on the surface of a semiconductor substrate by anodization. Then, a method of obtaining a thin film semiconductor using a semiconductor film by separating a semiconductor film on a separation layer of a porous layer was performed. According to this method, it is possible to easily obtain, for example, a single crystal thin film semiconductor that is sufficiently thin as required.

The present invention relates to a semiconductor substrate suitable for, for example, obtaining such a thin film semiconductor or the like, a semiconductor substrate capable of obtaining the semiconductor substrate and the thin film semiconductor more reliably, and a semiconductor substrate. An object of the present invention is to provide a method for manufacturing a substrate and a thin film semiconductor.

[0005]

According to the present invention, a single-crystal semiconductor layer is formed on a semiconductor substrate via a cavity layer in which a plurality of columnar bodies are dispersed, and a porous layer is formed on the single-crystal semiconductor layer. A layer is formed, and a semiconductor substrate in which a material film is formed on the porous layer is formed.

A method of manufacturing a semiconductor substrate according to the present invention is directed to a method of manufacturing a semiconductor substrate, comprising the steps of: providing a plurality of columnar bodies dispersedly present on a surface of a semiconductor substrate by multi-step anodization and annealing; And a step of forming a porous layer on the single crystal semiconductor layer to obtain a semiconductor substrate.

Further, according to the method of manufacturing a thin film semiconductor according to the present invention, a cavity layer in which a plurality of columnar bodies are dispersed and present on a surface of a semiconductor substrate by multi-step anodization and annealing, and a single crystal on the cavity layer Forming a semiconductor layer and a porous layer on the single crystal semiconductor layer, forming a semiconductor film on the porous layer, and then separating the semiconductor film from the semiconductor substrate in the cavity layer And a separation step of performing the above.

Further, according to the method of manufacturing a thin film semiconductor according to the present invention, there is provided a cavity layer in which a plurality of columnar bodies are dispersed on a surface of a semiconductor substrate by multi-step anodization and annealing, and a single crystal on the cavity layer. Forming a semiconductor layer and a porous layer on the single crystal semiconductor layer, removing the porous layer, and forming a semiconductor film on the single crystal semiconductor layer exposed by removing the porous layer. And a step of separating the single crystal semiconductor layer on which the semiconductor film is formed from the semiconductor substrate by separation in the cavity layer to obtain a thin film semiconductor.

As described above, the semiconductor substrate according to the present invention has a structure in which a single crystal semiconductor layer is formed on a semiconductor substrate via a cavity layer, or a structure in which a porous layer is formed on this single crystal semiconductor layer. The cavity layer is
Since a plurality of pillars are present in a dispersed state and the single crystal semiconductor layer can be appropriately connected to the semiconductor substrate by the pillars present in the cavity layer, the single crystal semiconductor For a layer or a porous layer, in various processes such as film formation, these can be integrated with the semiconductor substrate without separation,
Moreover, in the separation from the semiconductor substrate, the separation (peeling) can be reliably performed by a required external force.

The formation of the cavity layer in the semiconductor substrate is easy because the surface of the semiconductor substrate can be simply formed by multi-stage anodization and heat treatment, that is, annealing.

[0011]

Embodiments of the present invention will be described.
In the present invention, a single-crystal semiconductor layer is formed on a semiconductor substrate surface through a multi-stage anodization and annealing, that is, a heat treatment, through a cavity layer in which a plurality of columnar bodies are dispersedly present. Thus, a semiconductor substrate having a porous layer formed on the single crystal semiconductor layer is formed. In one embodiment, the semiconductor substrate is used to form various kinds of material films, for example, a metal film, a dielectric film, or a semiconductor film, for example, a single crystal film formed by epitaxial growth, or a polycrystal film on the porous layer. For example, a semiconductor film of a film or an amorphous film is formed.

In the semiconductor substrate having the semiconductor substrate, the material film, for example, the semiconductor film is separated (peeled) from the semiconductor substrate in the cavity layer, that is, the semiconductor substrate is broken by the columnar body in the cavity layer. By separating, a thin film semiconductor can be formed.

In another embodiment, the porous layer is removed from the above-described semiconductor substrate, and a semiconductor film is formed on the remaining single crystal semiconductor layer, for example, by epitaxial growth. The film is formed, and then the semiconductor film is separated (separated) from the semiconductor substrate together with the single crystal semiconductor layer in the cavity layer in the same manner as described above to form a thin film semiconductor.

Anodization can be performed by a known method, for example, the surface technology Vol. 46, no. 5, pp. 8 to 1
3, 1995 [Anodic formation of porous Si]. That is, for example, it can be performed by a double cell method whose schematic configuration diagram is shown in FIG. In this method, an electrolytic solution tank 1 having a two-tank structure having first and second tanks 1A and 1B is used. Then, a semiconductor substrate 11 on which a porous layer is to be formed is disposed between the two tanks 1A and 1B, and one of the pair of platinum electrodes 3A and 3B to which the DC power supply 2 is connected is disposed in both the tanks 1A and 1B. Is done. In the first and second tanks 1A and 1B of the electrolytic solution tank 1, for example, hydrogen fluoride HF and ethanol C ₂ H are respectively provided.
Electrolyte solution 4 containing ₅ OH or hydrogen fluoride H
An electrolytic solution 4 containing F and methanol CH ₃ OH is accommodated, arranged in the first and second tanks 1A and 1B so that both surfaces of the semiconductor substrate 11 are in contact with the electrolytic solution 4, and both electrodes 3A and 3B is immersed in the electrolytic solution 4. The DC power supply 2 is connected between the electrodes 3A and 3B with the electrode 3A side immersed in the electrolytic solution 4 in the tank 1A on the surface side of the semiconductor substrate 11 on which the porous layer is to be formed as the negative electrode side. Energization is performed. In this way, power is supplied with the semiconductor substrate 11 side being the anode side and the electrode 3A being the cathode side.
The surface facing the A side is eroded and becomes porous.

According to the two-tank cell method, it is not necessary to form an ohmic electrode on the semiconductor substrate, and the introduction of impurities from the ohmic electrode into the semiconductor substrate is avoided.

However, the anodization is not limited to the above-described two-tank cell method.
The single tank cell method shown in FIG. In this example, a single electrolytic solution tank 1 is provided, and a semiconductor substrate 11 to be anodized is arranged in a liquid-tight manner via an O-ring 5 so as to face, for example, an opening 1H provided on the bottom surface. Is done. The electrolytic solution 4 is accommodated in the electrolytic solution tank 1 so that the electrolytic solution 4 comes into contact with the surface of the semiconductor substrate 11 disposed at the bottom, on which the anode is formed. One electrode 3A made of, for example, a Pt electrode plate is immersed in the electrolytic solution 4 in the tank 1. On the back surface of the semiconductor substrate 11, the other electrode 3B made of, for example, a carbon electrode is placed in surface contact so as to face as much as possible over the entire surface on which anodization is performed. Then, the DC power supply 2 is inserted between the electrodes 3A and 3B with the electrode 3A immersed in the electrolytic solution 4 serving as the negative electrode side, and electricity is supplied. Also in this case, the surface of the semiconductor substrate 11 on the side facing the electrode 3A is anodized.

The selection of the conditions for the anodization changes the structure, thickness and the like of the formed porous layer and cavity single crystal semiconductor layer, and changes the separation (peeling) property, that is, the separation (peeling) strength. .

The anodization of the semiconductor substrate is performed in at least two steps with different current densities. That is, at least a step of anodizing the surface of the semiconductor substrate with a low current density and a step of subsequently anodizing with a higher current density are employed. This anodization can take, for example, an anodization step at a low current density, an anodization step at a higher current density than the low current density, and an anodization step at a higher current density. . In the anodization, the anodization at a high current density can be performed intermittently. Further, in the anodization at an intermediate high current density in the anodization for forming the porous layer, the current density can be increased gradually or stepwise.

In the anodization step, when the current density is changed, the composition of the electrolytic solution can also be changed.

The semiconductor substrate may be a single crystal substrate of silicon Si, a polycrystalline substrate of Si in some cases, or GaAs, G
Although it can be constituted by various semiconductor substrates such as a compound semiconductor substrate such as aP, GaN, and SiGe single crystal,
From the lattice matching, for example, a Si single crystal thin film semiconductor, S
It is preferable to use a Si single crystal substrate for manufacturing a solar cell or the like using the i single crystal thin film.

In the case of forming a thin film semiconductor using a compound semiconductor, a compound semiconductor substrate can be used as a semiconductor substrate. In this case, too, if anodization is performed on the semiconductor substrate, a semiconductor substrate having a porous layer on the surface is similarly formed. Can be configured.

Further, the semiconductor substrate can be constituted by a semiconductor substrate doped with n-type or p-type impurities or a semiconductor substrate containing no impurities. However, in the case of performing anodization, it is desirable to use a so-called p ⁺ Si substrate, which is a low-resistivity semiconductor substrate doped with p-type impurities at a high concentration. When ap ⁺ -type Si substrate is used as the semiconductor substrate, a p-type impurity such as boron B
However, it is desirable to use a Si substrate doped with about 10 ¹⁹ atoms / cm ³ and having a resistance of about 0.01 to 0.02 Ωcm. Then, when the p ⁺ -type Si substrate is anodized, fine pores elongated in a direction substantially perpendicular to the surface of the substrate are formed, and the p ⁺ -type Si substrate becomes porous while maintaining the crystallinity. Thus, a desirable porous layer is formed. Therefore, the epitaxial growth of the semiconductor film can be performed on this porous layer.

The shape of the semiconductor substrate can take various configurations. For example, it can be formed into various shapes such as a wafer shape such as a disk shape, or a cylindrical ingot obtained by pulling a single crystal, and a peripheral surface thereof serving as a substrate surface.

After the porous layer is formed on the surface of the semiconductor substrate, it may be heated in a hydrogen gas atmosphere at normal pressure or reduced pressure or in a vacuum, or may be made of Group 8 of the periodic table such as He, Ne, Ar, and Kr. In a rare gas element atmosphere, for example, at 700 ° C. to 1200 ° C. Thus, as described above, the above-described cavity layer is formed on the surface of the semiconductor substrate, the single-crystal semiconductor layer is formed via the cavity layer, and the porous layer is formed thereon.

Film formation on the porous layer or on the single crystal semiconductor layer from which the porous layer has been removed is performed by MOCVD (metal organic chemical vapor deposition) or CVD (chemical vapor deposition).
Method, MBE (molecular beam epitaxy) method, sputtering, etc., and can be formed as a single crystal, polycrystalline, or amorphous film. By annealing, polycrystal or single crystal can be obtained.

The cavity layer and the single-crystal semiconductor layer are formed by annealing after the above-described anodization, and the epitaxial growth of the semiconductor film or the like on the surface of the porous layer or the single-crystal semiconductor layer after the formation is performed, for example, by a CVD method at 700 ° C. to 1200 ° C.
C. In this case, by forming the film at a temperature lower than the annealing temperature, the thickness of the hollow layer and the single crystal semiconductor layer selected by selecting the annealing conditions, the columnar shape in the hollow layer The porosity, such as the thickness and density of the body, can be prevented from fluctuating due to the formation of the semiconductor film or the like.

The film may be formed of the same material as the semiconductor substrate or a different material. For example, single crystal Si
Using a semiconductor substrate, the porous layer formed on the surface of the
Various epitaxial growths can be performed, such as epitaxial growth of i or a compound semiconductor such as GaAs, or a Si compound, for example, Si _1-y Ge _y , or an appropriate combination of these.

For example, when a solar cell is constructed, the semiconductor films may be, for example, a p-type high impurity concentration p ⁺ semiconductor layer and a p-type low impurity concentration p
^- it can be a semiconductor layer, and in the order of n ⁺ semiconductor layer of n-type high impurity concentration is epitaxially grown multi-layer semiconductor film. Although the impurity concentration and the film thickness of these layers are not particularly limited, for example, the p ⁺ type semiconductor layer has a film thickness of 0 to 1 μm.
m, typically about 0.5 μm, and the concentration of boron B is in the range of 10 ¹⁸ to 10 ²⁰ atoms / cm ³ , typically about 10 μm.
^{About 19} atoms / cm ³ , the p-type semiconductor layer has a thickness of 1 to 30 μm.
m, typically about 5 μm, and a boron concentration of 10 ¹⁴
-10 ¹⁷ atoms / cm ³ , typically about 10 ¹⁶ atoms / cm ³
cm ³ , the thickness of the n ⁺ type semiconductor layer is in the range of 0.1 to 1 μm, typically about 0.5 μm, and phosphorus P or arsenic A
The concentration of s is preferably in the range of 10 ¹⁸ to 10 ²⁰ atoms / cm ³ , typically about 10 ¹⁹ atoms / cm ³ .

Further, a semiconductor film, p ⁺ -type Si layer from the porous layer side, p-type Si _1-x Ge _x graded layers, Si _1-y Ge _y layer of undoped, n-type Si _1-x Ge _x A semiconductor film is formed by epitaxially growing a graded layer and an n ⁺ -type silicon layer in this order, whereby a double heterostructure solar cell can be manufactured. A typical example of each layer constituting the double hetero structure is p ⁺
The type Si layer, about impurity concentration 10 ¹⁹ atoms / cm ^3, thickness of 0.5μm or so, as the p-type Si _1-x Ge _x graded layers, the impurity concentration is 10 ¹⁶ atoms / cm ³ or so, The thickness of the undoped Si _1-y Ge _y layer is about 0.7 μm, the thickness is about 1 μm, and the thickness of the n-type Si
_1-x Ge as the _x graded layer, an impurity concentration of 1
0 ¹⁶ atoms / cm ³ or so, the thickness is 1μm or so, as the and n ⁺ -type Si layer, an impurity concentration of ¹⁰ 10 cm ^-3 or so, it is preferable that the film thickness is set to about 0.5 [mu] m. In addition, p-type,
The composition ratio x of Ge in the n-type Si _1-x Ge _x graded layer may be gradually increased from x = 0 of each of the layers present on both sides to _{y of} undoped Si _1-y Ge _y. preferable. Thereby, since lattice constants are matched at each interface, good crystallinity can be obtained.
Incidentally, in such a double heterostructure solar cell,
Since carriers and light can be effectively confined in the central undoped Si _1-y Ge _y layer, high conversion efficiency can be obtained.

The n-type or p-type impurities can be introduced into the semiconductor film at the time of film formation, for example, at the time of epitaxial growth. Alternatively, after the semiconductor film is formed, the introduction of impurities can be performed entirely or selectively by ion implantation, diffusion, or the like. In this case, the conductivity type, impurity concentration, and type are selected according to the purpose of use.

When the semiconductor layer is formed on the single crystal semiconductor layer by removing the porous layer, the removal of the porous layer is performed as follows.
When the semiconductor substrate is Si, the gas is removed by etching by flowing a small amount of a gas having a function of etching the porous layer formed by the high-temperature annealing described above, for example, a liquefied hydrogen chloride (chemical formula: HCl) gas. As described above, when etching the porous layer that has been subjected to the high-temperature annealing with the HCl gas, the surface of the single crystal semiconductor layer exposed by removing the porous layer by this etching becomes extremely clean. When the single crystal semiconductor layer thus cleaned is subjected to, for example, Si film formation, for example, epitaxial growth, the above-described high-temperature annealing and H
Since the etching with Cl gas and the epitaxial growth can be performed continuously in the same epitaxial growth furnace, it is possible to avoid the disadvantage that the epitaxial growth surface of the single crystal semiconductor layer is oxidized or foreign substances are interposed. Excellent film formation, for example, an epitaxially grown film having good characteristics can be formed. And the work process is also simplified.

However, the porous layer is removed from the furnace after the above-described annealing and removed, for example, by RIE (reactive ion etching), chemical wet etching, mechanical chemical etching, so-called CMP (Chemical Mecha).
nical polishing) or the like.

In the case of epitaxially growing Si in forming a semiconductor film, this semiconductor film is formed as a semiconductor film having a smooth surface as in the case of forming a thin film semiconductor such as a semiconductor integrated circuit. If it is desired that the epitaxial growth of Si be performed using a chlorine gas-based source gas such as Si ₂ H ₂ C
It is desirable to use l ₂ , SiHCl ₃ , SiCl ₄ or the like. Then, when it is desired to form fine irregularities on the surface so as to enhance the light receiving efficiency, for example, in a solar cell, the epitaxial growth surface is etched with hydrochloric acid to form fine irregularities on the surface, and thereafter, , Silane-based source gas such as SiH ₄ , Si ₂ H ₆ , S
By performing epitaxial growth using i ₃ H ₈ or the like, fine irregularities can be formed.

When separating the above-described single-layer or multiple-layer film from the semiconductor substrate, a flexible substrate such as a polymer sheet or a rigid glass substrate, a resin substrate or A flexible substrate or the like on which required printed wiring has been formed can be joined to separate the semiconductor substrate from the semiconductor substrate in the cavity layer together with the substrate. In this case, the film is a semiconductor film, the carrier substrate is an insulating substrate, or a semiconductor substrate having an insulating layer formed on its bonding surface,
Alternatively, when it is configured by a conductive substrate or the like, the SOI
A thin film semiconductor having the above structure can be manufactured.

The separation in the cavity layer can be performed, for example, by applying ultrasonic waves or by vacuum suction.

On the other hand, the remaining semiconductor substrate may be used again in the above-mentioned thin film semiconductor manufacturing process, may be used as the above-mentioned SOI carrier substrate, or the semiconductor substrate thinned by the above-mentioned repeated use may be It can itself be used as a thin film semiconductor.

In any of the above-described annealing and the formation of the semiconductor film, the semiconductor substrate may be heated to a predetermined substrate temperature by a so-called susceptor heating method, or by applying a current directly to the semiconductor substrate itself. An electric heating method of flowing and heating can be employed.

Next, an embodiment of the present invention will be described.
However, the invention is not limited to this embodiment. First, embodiments of a semiconductor substrate and a method of manufacturing the same according to the present invention will be described.

[Embodiment 1] FIG. 3 shows a manufacturing process diagram of the embodiment 1. First, a semiconductor substrate, for example, doped with boron B at a high concentration, has a specific resistance of, for example, 0.01 to 0.02.
A wafer-like semiconductor substrate 11 made of single-crystal Si having an Ωcm was prepared (FIG. 3A).

Then, the semiconductor substrate 11 was subjected to multi-stage anodization to form a porous layer on the surface of the semiconductor substrate 11. In this embodiment, the anodization was performed in a dark place using the anodizing apparatus having the one-tank structure described with reference to FIG.
In this case, the electrolytic solution used was HF: C ₂ H ₅ OH = 1: 1. Then, a direct current was applied between the electrodes 3A and 3B.

First, the current density was changed from 0 mA / cm ² to 1
The current was gradually increased to mA / cm ² over about 1 minute, and a low current was applied at a low current of 1 mA / cm ² for 8 minutes. As a result, a porous surface layer 12S having a low porosity was formed (FIG. 3B).

Next, the current density was changed from 1 mA / cm ² to 7
The current was gradually increased to mA / cm ² for about 30 seconds, and the medium current was applied for 8 minutes at the medium current of 7 mA / cm ² . Thereby, the porous layer 1 on which the intermediate porosity layer 12M having a higher porosity than the surface layer 12S is formed.
2 was formed (FIG. 3C).

Next, the current density was increased to 80 mA / cm ^{2, which} was higher than the above-mentioned two current supply densities, and the current was supplied for 0.3 seconds.
After increasing the current to 0.3 cm ² for 0.3 seconds, and then stopping the current supply for 1 minute, an intermittent high-current application was performed to increase the current to 80 mA / cm ² for 0.3 seconds. Thereafter, the semiconductor substrate was heat-treated, that is, annealed in a H ₂ atmosphere by a normal pressure Si epitaxial growth apparatus. In this annealing, the temperature was raised from room temperature to 1120 ° C. over about 20 minutes and held at this temperature for about 50 minutes. By doing so, the surface of the surface layer 12S of the porous layer 12 becomes flat and smooth, and the interface between the porous layer and the semiconductor substrate 11 in the porous layer 12 (this interface is defined as the anode of the semiconductor substrate 11). This refers to the surface of the semiconductor substrate 11 where the porous layer 12 at a required depth from the initial surface before chemical formation is left without being generated. The same applies to the following.) A cavity layer 13 extending along the surface of the porous layer 12 was generated, and a single crystal semiconductor layer 14 was formed on the cavity layer 13 (FIG. 3D). This hollow layer 13 includes a plurality of columnar bodies 1.
5 function as connecting columns for connecting the single-crystal semiconductor layer 14 to the semiconductor substrate 11 at the interface of the semiconductor substrate 11 so as to be dispersed and planted. Form cracks that maintain separation.

In this manner, the single-crystal semiconductor layer 14 is formed under the porous layer 12, and a crack is generated between the single-crystal semiconductor layer 14 and the semiconductor substrate 11 by the cavity layer 13 and the semiconductor substrate is mechanically weakened. In this example, a semiconductor substrate 16 is configured.

[Embodiment 2] In this embodiment, a semiconductor substrate 16 was manufactured by the same steps as in Embodiment 1 described with reference to FIG. 3, except that the annealing conditions were different from those in Embodiment 1. That is, in Example 2, the semiconductor substrate on which the porous layer 12 was formed by the steps described with reference to FIGS. 3A to 3C was heated from room temperature to 1120 ° C. for about 20 minutes in a H ₂ atmosphere by a normal pressure Si epitaxial growth apparatus. In this Example 2, annealing was performed at this temperature for about 8 hours, which was longer than in Example 1. Also in this case, the surface of the surface layer 12S of the porous layer 12 becomes flat and smooth, and as shown in FIG. 3D, a hollow layer is formed below the porous layer 12, ie, at the interface between the porous layer and the semiconductor substrate 11. 13 and the single crystal semiconductor layer 14 was formed on the cavity layer 13. Then, a plurality of columnar bodies 15 are dispersedly generated in the hollow layer 13. In this columnar body, the annealing time was made longer than that in Example 1. In the case of Example 2, the width, that is, the thickness was large, and the thickness of the single crystal semiconductor layer 14 was increased.

[Embodiment 3] In this embodiment, a semiconductor film is formed on the semiconductor substrate 16 obtained in the embodiment 1. That is, also in the third embodiment, the semiconductor substrate 16 was configured by performing the same steps as those in the first embodiment shown in FIGS. 3A to 3D. Then, a material film 17 was formed on the porous layer 12 of the semiconductor substrate 16 as shown in a schematic sectional view of FIG. In this example, the Si semiconductor film 17 was epitaxially grown. This epitaxial growth
After the above-described annealing at 1120 ° C. for 50 minutes, 106
The temperature was lowered to 0 ° C., and a high-concentration boron-doped CVD (chemical vapor deposition) using SiH ₄ and B ₂ H ₆ gas was performed for 10 minutes, and then a lower-concentration boron-doped C
VD was performed for 40 minutes to epitaxially grow a p-type Si semiconductor film 17 having a thickness of about 10 μm. 4, parts corresponding to those in FIG. 3D are denoted by the same reference numerals, and redundant description is omitted.

[Embodiment 4] In this embodiment, a semiconductor film is formed on the semiconductor substrate 16 obtained in Embodiment 2. That is, in the fourth embodiment, the annealing time in manufacturing the semiconductor substrate 16 is about 8 hours, which is different from that in the third embodiment, compared with the annealing time of 50 minutes in manufacturing the semiconductor substrate 16 in the third embodiment. The same steps as in Example 3 were performed except that the time was extended. That is, in Embodiment 4, Embodiment 2
As shown in FIG. 4, as shown in FIG.
After annealing the semiconductor film 17 at 1120 ° C. as described above, 1
The temperature was lowered to 060 ° C., and high-concentration boron-doped CVD (chemical vapor deposition) using SiH ₄ and B ₂ H ₆ gases was performed for 1 hour.
0 minutes, and then a lower concentration of boron-doped CVD is performed for 40 minutes to form a p-type Si about 10 μm thick.
The semiconductor film 17 was epitaxially grown.

A cross-sectional image of each of the semiconductor substrates 16 having the Si semiconductor films 17 manufactured by the above-described Embodiments 3 and 4 is obtained by a high-resolution SEM (Secondary Electron Microsc
opy). The cross-sectional images of the sample A according to the third embodiment and the sample B according to the fourth embodiment by SEM are shown in FIG.
And FIG. These samples A and B have a (110) cross section and a <001> orientation in the upper direction.

Comparing Sample A and Sample B, the hole shape of each of the porous layers formed by the low-current application and the medium-current application in the above-described anodizing treatment is as follows.
As shown in FIG. 7 and FIG. 8, the cross-sectional enlarged SEM images of Samples A and B, the cross-sections are square, pentagonal, and hexagonal, respectively. The vertex was found to be slightly rounded. When the details were examined, basically, as shown in FIG. 9, all the holes were octahedrons having six vertices each having a plane orientation of <111>. It was found that some of them were filled with Si atoms so as to have a plane with the plane orientation <001> as shown in FIG.

On the other hand, the thickness of the single crystal semiconductor layer 14 is H ₂
Sample A with an annealing time of 50 minutes had a thickness of about 2 μm, and Sample B with an H ₂ annealing time of about 8 hours had a thickness of about 3.5 to 4 μm. That is, the longer the annealing time, the larger the thickness of the single crystal semiconductor layer 14. Therefore, it is considered that the porous Si layer was grown by solid phase epitaxial growth.

In the hollow layer 13, the thickness of the columnar body 15 connecting the semiconductor substrate 11 and the single-crystal Si semiconductor layer 14 is about 6 μm or less in the sample A in which the H ₂ annealing time is 50 minutes. In the sample B in which the H ₂ annealing time was prolonged, that is, about 8 hours, columnar bodies having a thickness of about 15 μm or less were generated in a mixed manner. That is, the longer the annealing time is, the thicker the columnar body 15 in the cavity layer 13 is.

From these facts, in order to increase the thickness of the single crystal semiconductor layer 14, the annealing time may be increased, but at this time, since the columnar body 15 in the cavity layer 13 becomes thicker, the separation strength is increased. Is large, that is, it is difficult to separate, so that the annealing time is selected in consideration of these balances.

Then, using the semiconductor substrate according to the third and fourth embodiments, the semiconductor film 17 is replaced with the cavity layer 13.
In this case, the columnar body 15 can be separated from the semiconductor substrate 11 by destruction, and a thin film semiconductor using the semiconductor film 17 can be obtained. Prior to separation of the semiconductor film 17 from the semiconductor substrate 11, a carrier substrate having an insulating layer or an insulating carrier substrate is bonded to the semiconductor film 17, and the semiconductor film 17 together with the carrier substrate is separated from the semiconductor substrate 17. By separating from the SOI substrate 11, an SOI substrate can also be obtained. An embodiment in this case will be described as a fifth embodiment with reference to FIG.

Embodiment 5 In this embodiment, an insulating layer 18 made of, for example, SiO ₂ is formed on the Si epitaxial semiconductor film 17 of the material film 17 shown in FIG. 4 in the embodiment 3 or 4. The carrier substrate 19 formed by the Si substrate is bonded (FIG. 11A). This bonding can be performed by a method of bonding by bonding with an adhesive or making the surface hydrophilic, a method of bonding the substrates together, and then performing thermal annealing (a so-called wafer bonding method), or the like. After that, the semiconductor film 17 is separated from the semiconductor substrate 11 together with the carrier substrate 19 by breaking in the cavity layer 13. At this time, since the porous layer 12 remains in the semiconductor film 17 separated from the semiconductor substrate 11, that is, separated from the semiconductor substrate 11, the porous layer 12 is removed by etching as necessary. Thus, an SOI substrate 20 in which the thin film semiconductor 27 of the semiconductor film 17 is formed on the carrier substrate 19 with the insulating layer 18 interposed therebetween (FIG. 11B).

In the third to fifth embodiments, the material film 17 is formed on the porous layer 12, and in the above embodiment, the Si semiconductor film is epitaxially grown. After performing, the cavity layer 1 by annealing
3 and the single crystal semiconductor layer 14 are formed, and thereafter,
The porous layer 12 is removed by etching to form the single crystal semiconductor layer 14.
Is exposed to the outside, and the semiconductor film 17 can be formed on the exposed single crystal semiconductor layer 14. An embodiment in this case will be described as a sixth embodiment with reference to FIG.

[Embodiment 6] In this embodiment, the porous layer 12 is formed on the surface of the semiconductor substrate 11 by performing multi-stage anodization by the method described in Embodiment 2, In a Si epitaxial growth apparatus, the temperature is increased from room temperature to 1120 ° C. in an H ₂ atmosphere in about 20 minutes, and annealing is performed at 1120 ° C. for about 8 hours to form a cavity layer 13 in the porous layer 12 and to form a Next, a process of generating a single crystal semiconductor layer 14 is performed (FIG. 12A).

Subsequently, an HCl gas of liquefied hydrogen chloride (chemical formula: HCl) is introduced into the epitaxial growth apparatus at a temperature substantially equal to the annealing temperature, that is, 1120 ° C. By doing so, the porous layer 12, that is, the porous S
The i layer is removed by etching, and the single crystal semiconductor layer 14 under the i layer is exposed to the outside (FIG. 12B). Then then 1
The semiconductor film 17 was formed by lowering the temperature to 060 ° C. and performing high concentration boron-doped Si epitaxial growth using SiH ₄ gas for 30 minutes (FIG. 12C). The thickness of the semiconductor film 17 formed by this film formation was 8 μm.

A carrier substrate 19 made of, for example, a flexible resin substrate is bonded to the semiconductor film 17 via an adhesive 21 (FIG. 12D). The semiconductor film 17 bonded to the carrier substrate 19 is separated from the semiconductor substrate 11 together with the carrier substrate 19 by a break in the cavity layer 13, and an SOI having a thin film semiconductor 27 of the semiconductor film 17 held by the carrier substrate 19 is provided. The substrate 20 is obtained (FIG. 12E). At this time, since the surface of the semiconductor film 17 separated from the semiconductor substrate 11, that is, peeled, is made uneven by the destruction of the cavity layer 13, if the surface needs to be smoothed, Etching process for smoothing is performed.

The SOI substrate 20 formed according to the sixth embodiment can be configured as a flexible SOI substrate 20 when the carrier substrate 19 has flexibility. However, as the carrier substrate 19,
For example, a rigid SOI can be formed by using a rigid insulating substrate or a semiconductor substrate having an insulating layer as in Embodiment 5.

According to the present invention, a semiconductor integrated circuit device can be formed by forming various semiconductor elements on the thin film semiconductor. An example in this case will be described as Example 7 and will be described with reference to FIG.

[Embodiment 7] In this embodiment, Embodiment 6
12C, a semiconductor substrate having an epitaxially grown semiconductor film 17 formed on a single crystal semiconductor layer 14 formed via a cavity layer 13 on a semiconductor substrate 11 as shown in FIG. 12C is prepared. (FIG. 13A).

Semiconductor film 17 epitaxially grown
Then, a circuit element is formed by a normal semiconductor manufacturing process. In this embodiment, a CMOS (Complement) using a MOS-FET (insulated gate field effect transistor) is used.
In this case, an integrated circuit having an ary MOS (ary MOS) is formed. In this case, local oxidation, so-called LOCOS (Local Oxidation of Silico)
The isolation insulating layer 51 was formed by n). And MO
A gate insulating film 52 is formed in the formation portion of the S-FET by, for example, surface thermal oxidation of the semiconductor film 17, and a gate electrode 53 is formed thereon. The formation of this gate electrode 53
For example, polycrystalline Si is formed by a CVD (chemical vapor deposition) method.
Is formed over the entire surface, and the gate electrode 53 is formed by using this as a required pattern by pattern etching by photolithography. Next, p-type or n-type impurities are ion-implanted at a relatively low concentration on both sides of the semiconductor film 17 below the gate electrode 53 using the gate electrode 53 as a mask to form low-concentration source and drain regions. Thereafter, a sidewall 54 of, for example, SiO ₂ is formed on the side surface of the gate electrode 53 by a known method. Then, the same p-type or n-type impurities are ion-implanted into both sides of the gate electrode 53 at a high concentration using the gate electrode 53 as a mask, including the sidewalls 54. The semiconductor regions 55 to be source and drain regions are formed by the low-concentration source and drain regions formed in step (a). Thus, L
A DD (Lightly Doped Drain) MOS-FET is formed.

After that, a first interlayer insulating layer 56 made of, for example, SiO ₂ is deposited on the entire surface, flattened, and a first wiring layer 57 is formed thereon. This first wiring layer 57
Electrically contacts a predetermined semiconductor region 55 of the circuit element through a contact hole formed in the first interlayer insulating layer 56. Further, a second interlayer insulating layer 58 of, for example, SiO ₂ is formed on the entire surface, and a second wiring layer 59 is formed thereon. The second wiring layer 59 has a
Electrically contact, for example, a predetermined portion of the lower first wiring layer through a contact hole formed in the interlayer insulating layer 58 (FIG. 13B).

As described above, the integrated circuit formed on the semiconductor film 17 is separated from the semiconductor substrate 11. First, adhesive 2
1, a bonding substrate 19 made of, for example, a flexible resin substrate is bonded or adhered on the semiconductor film 17 on which the integrated circuit is formed, and thus on the second interlayer insulating layer 58 on which the second wiring layer 59 is formed. (FIG. 13C). At this time, the bonding strength of the carrier substrate 19 is set to a strength higher than the separation strength of the porous layer 12 from the semiconductor substrate 11, that is, an adhesion strength at which the carrier substrate 19 does not peel off during separation.

Next, an external force is applied between the semiconductor substrate 11 and the carrier substrate 19 in a direction to separate them. As a result, the columnar body 15 is broken in the weakened cavity layer 13 as described above, and the semiconductor film 17 is separated from the semiconductor substrate 11 together with the single crystal semiconductor layer 14. The semiconductor film 1 thus separated to form an integrated circuit
For example, a resin film is applied to the surface of the single crystal semiconductor layer 14 on which the semiconductor substrate 7 is formed, that is, a separation surface from the semiconductor substrate 11,
A protective film 62 for protecting this surface is formed.
D).

In this way, an integrated circuit device in which a thin film semiconductor is formed on the carrier substrate 19 by the semiconductor film 17 on which circuit elements are formed. This integrated circuit device can be configured as a flexible integrated circuit device when the carrier substrate 19 is a flexible substrate. However, when the supporting substrate 19 has rigidity, that is, is a rigid substrate, a rigid integrated circuit device can be configured.

In the above-described integrated circuit device, the case where the circuit element is a CMOS has been exemplified. Needless to say, the circuit element is not limited to the CMOS, but can be various circuit elements. Can be applied to

Further, the present invention can be applied to a case where a solar cell is obtained. An example of this case is described in Example 8
14 and FIG.

[Embodiment 8] In this embodiment, the terminals can be easily derived from the light-receiving surface side electrode, that is, the conductive wires can be easily derived. Also in this embodiment, a Si single crystal semiconductor substrate 11 is prepared, and its surface is anodized in the same manner as described in Embodiment 1 to form a surface layer 12S and an intermediate porous material having a high porosity. The porous layer 12 on which the rate layer 12M is formed is formed. Then, the semiconductor substrate 11 was heat-treated, that is, annealed in a H ₂ atmosphere by a normal-pressure Si epitaxial growth apparatus. This annealing is carried out from room temperature to 1120.
The temperature was raised to ° C. over about 20 minutes and maintained at this temperature for about 30 minutes. By doing so, the surface layer 12 of the porous layer 12
The surface of S becomes flat and smooth, and a single crystal semiconductor layer 14 is generated on the interface side between the porous layer and the semiconductor substrate 11 in the porous layer 12, and a plurality of columnar bodies 15 are dispersed. A cavity layer 13 to be planted is generated (FIG. 14A). afterwards,
The porous layer 12 is etched with HCl to expose the single-crystal semiconductor layer 14 to the outside, and an epitaxial growth using an SiH ₄ gas and a B ₂ H ₆ gas is performed thereon by using a normal pressure Si epitaxial growth apparatus. For 1 minute to form a first semiconductor layer 171 of p ⁺ Si doped with boron B at 10 ¹⁹ atoms / cm ³ , and then changing the flow rate of B ₂ H ₆ gas to perform Si epitaxial growth for 20 minutes. For 2 minutes to form a second semiconductor layer 172 of low concentration p ^- Si doped with boron B at 10 ¹⁶ atoms / cm ³ , and further supplying PH ₃ gas instead of B ₂ H ₆ gas. The epitaxial growth is performed for 4 minutes to form a third semiconductor layer 173 of n ⁺ Si doped with phosphorus P at a high concentration of 10 ¹⁹ atoms / cm ³ on the second semiconductor film 132,
~ P ⁺ -p ^-- composed of third semiconductor layers 171 to 173
A semiconductor film 17 having an n ⁺ structure was formed (FIG. 14B).

Next, in this embodiment, an SiO ₂ film, that is, a transparent insulating film 26 is formed on the epitaxial semiconductor film 13 by surface thermal oxidation, and pattern etching is performed by photolithography to make contact with an electrode or a wiring. An opening 26W is formed. This opening 1
The 6Ws can be formed in parallel with each other in a stripe shape extending in a direction perpendicular to the plane of the drawing while maintaining a required interval. With the SiO ₂ film formed in this way, it is possible to minimize carrier generation and recombination at the interface. Then, a metal film is vapor-deposited on the entire surface, and pattern etching is performed by photolithography to form a desired pattern, in this example, a striped electrode or wiring 37 along the striped opening 16W (FIG. 14B). . The metal film for forming the electrode or the wiring 37 is, for example, a 30 nm-thick Ti film, a 50 nm-thick Pd, and a 100 nm-thick Ag, which are sequentially deposited, and further subjected to Ag plating to form a multilayer structure. It can be constituted by a membrane. Thereafter, annealing was performed at 400 ° C. for 20 to 30 minutes.

Next, in this embodiment, a conductive wire 41, in this embodiment, a metal wire is bonded on the striped electrodes or wirings 37 along these, respectively, and a transparent adhesive 21 is placed thereon. Thus, the transparent substrate 42 is joined (FIG. 14C). The connection of the conductive line 41 to the electrode or the wiring 37 can be performed by soldering. And
These conductive wires 41 have one end or both ends longer than the electrode or the wiring 37 and are led out.

Thereafter, an external force for separating the semiconductor substrate 11 and the transparent substrate 42 from each other is applied. This way,
In the fragile cavity layer 13, the semiconductor film 17 and the single crystal semiconductor layer 14 are separated (separated) from the semiconductor substrate 11, and the thin film semiconductor 23 with the semiconductor film 17 bonded to the transparent substrate 42 is obtained (FIG. 15D). ).

In this case, the porous layer 12 remains on the back surface of the thin-film semiconductor 23, and a silver paste is applied on the porous layer 12, and a metal plate is further joined to form the other back electrode 24. In this manner, the printed circuit board 20 p ⁺ -p ^{- -}
A solar cell on which the thin film semiconductor 23 having the n ⁺ structure is formed (FIG. 15E). This metal electrode 24 also functions as a protective film on the back surface of the solar cell.

In the solar cell thus formed, since the light-receiving-side electrode or the wiring 37 is covered by the transparent substrate 42, the electrical external lead out therefrom is made by the conductive wire 41. The electrical connection with the outside is easily made. Further, for example, as in the above-described embodiment,
That is, since the conductive line 41 is led out from each of the plurality of electrodes or wirings 37 that are in contact with the active portion of the solar cell, the series resistance of the solar cell can be sufficiently reduced.

In addition, since the conductive wire 41 is led out to the outside, when a plurality of solar cells are connected to each other,
This connection can be easily made.

In each of Embodiments 3 to 8 described above, the cavity layer 1
The semiconductor substrate 11 left after the separation in Step 3 can be repeatedly used as the semiconductor substrate 11 for anodizing which constitutes each thin film semiconductor, semiconductor integrated circuit device, solar cell and the like. Further, the semiconductor substrate 11 whose thickness is reduced by the repeated use can constitute a thin film semiconductor or a semiconductor integrated circuit device which itself forms a circuit element or an integrated circuit.

Alternatively, the semiconductor substrate 11 left by the separation as described above can be used as, for example, a thin film semiconductor supporting substrate 19. An embodiment in this case will be described as a ninth embodiment with reference to FIG.

[Embodiment 9] In this embodiment, the same Si single crystal semiconductor substrate 11 as used in Embodiment 1 was prepared (FIG. 16A). The surface of the semiconductor substrate 11 is anodized in the same manner as described in Example 1 to form a surface layer 12S and a porous layer 12 on which an intermediate porosity layer 12M having a higher porosity is formed. (FIG. 1)
6B). Then, the semiconductor substrate 11 was heat-treated, that is, annealed in a H ₂ atmosphere by a normal-pressure Si epitaxial growth apparatus. This anneal is performed from room temperature to 112.
The temperature was raised to 0 ° C. over about 20 minutes and maintained at this temperature for about 30 minutes. By doing so, the single-crystal semiconductor layer 1 is located on the interface side between the porous layer and the semiconductor substrate 11 in the porous layer 12.
4 and the cavity layer 13 in which the plurality of columnar bodies 15 are dispersed and planted occurs (FIG. 16C). On the surface of the initial semiconductor substrate 11 in this manner, the cavity layer 13, the single-crystal semiconductor layer 14, formation of the porous layer 12 is made, in the lower layer than this remains as the semiconductor substrate 11S _1.

Thereafter, the porous layer 12 is etched with HCl to expose the single crystal semiconductor layer 14 to the outside (FIG. 16D). On the single crystal semiconductor layer 14 exposed to the outside as described above, a semiconductor film 17 of, for example, Si is epitaxially grown. Then, an insulating layer 18 is formed on the surface of the Si semiconductor film 17 by, for example, thermal oxidation of the surface of the Si semiconductor film 17. (FIG. 16E). Then, bonding of the Si supporting substrate 19 is performed on the insulating layer 18 (FIG. 16).
F). This bonding is performed, for example, by preliminarily washing the Si-carrying substrate 19 with an alkali to make the surface hydrophilic.
8 is matched over the semiconductor film 17 formed, in this state, for example, in the diffusion furnace, in an H ₂ atmosphere 1000
Bonding can be performed by annealing at 30 ° C. for 30 minutes.

Thereafter, the semiconductor film 17 bonded to the carrier substrate 19 is removed together with the single crystal semiconductor layer 14 together with the fragile cavity layer 13.
Is separated from the semiconductor substrate 11 by the destruction of the
G). In this manner, the SOI substrate 20 having the thin film semiconductor in which the semiconductor film 17 and the single crystal semiconductor layer 14 are bonded to the carrier substrate 19 via the insulating layer 18 is formed, and the above-described cavity layer described above is described. 13 semiconductor body 11S ₁ of the lower layer is separated from.

In this manner, a plurality of operations in the series of steps described with reference to FIGS.
Alternatively, they are performed in parallel. That is, the first operation by the series of steps described with reference to FIGS.
16A to 16G, and other third operations by the series of steps described in FIGS. 16A to 16G... In this case. The carrier substrate 19 shown in FIG. 16F in the first operation
Is separated from the semiconductor substrate 11s separated by another example of the same operation as described above, which was performed before or partially in parallel with this.
_It is composed of ₀ . FIG. 16 in the second operation.
The semiconductor substrate 11s ₁ separated from the carrier substrate 19 indicated by F in the first operation performed before or in parallel with the semiconductor substrate 11s ₁
It is constituted by.

Thus, for example, in the manufacture of an SOI substrate, the semiconductor substrate 11s (11s
₀ , 11 s ₁ ...) Are used as the carrier substrate 19.

The semiconductor substrate 11s used as the carrier substrate 19 in this case is the same as the one described above with reference to FIGS.
The present invention is not limited to the case where the semiconductor substrate generated by the series of steps described with reference to FIG. 16G is used, and the above-described series of operations is performed a plurality of times using the separated semiconductor substrate 11s as the initial semiconductor substrate 11 again. The semiconductor substrate 11s reduced to a required thickness can be used as the support substrate 19.

The annealing for forming the cavity layer 13 and the single crystal semiconductor layer 14 in the present invention is not limited to annealing in a H ₂ gas atmosphere at normal pressure or reduced pressure, but also in vacuum or He, as described above. , Ne, Ar, K
In the periodic table such as r, annealing can be performed in a Group 8 element gas.

In each of the examples described above, the anodizing apparatus uses the single-tank structure shown in FIG. 2, but the anodizing apparatus having the two-tank structure described in FIG. 1 can be used.

In the above-described anodization, a semiconductor, for example, Si may be separated from the substrate side due to the application of a large current or a long period of time, and this Si scrap may adhere to the electrolytic solution tank. In this case, after the substrate 11 is taken out, unnecessary Si is injected by injecting hydrofluoric nitric acid into the tank instead of the electrolytic solution.
And the like can be removed by etching. In each of the above-described examples, the semiconductor film 17 and the single-crystal semiconductor layer 14 are separated from the semiconductor substrate 11 by applying an external force that separates them from each other. In this case, the semiconductor film 17 and the single-crystal semiconductor layer 14 may be separated by vacuum suction as described above. it can. Also,
Alternatively, they can be separated by breaking the cavity layer by ultrasonic vibration.

The porous layer can be easily formed by performing the anodization in an electrolytic solution containing hydrogen fluoride and ethanol or a mixed solution of hydrogen fluoride and methanol. In this case, when changing the current density of anodization, by changing the composition of this electrolytic solution,
The adjustment range of the porosity is further increased.

Further, when light is irradiated during the anodization, unevenness on the surface of the porous layer is remarkably generated, and the crystallinity of the epitaxial semiconductor film is deteriorated. In a dark place, the unevenness can be reduced or avoided, and an epitaxial semiconductor film having good crystallinity can be formed.

As described above, in the present invention, the single crystal semiconductor layer 14, the single crystal semiconductor layer 14 and the semiconductor film 17 formed thereon, or the semiconductor film formed on the porous layer 12 17, for example, a thin film semiconductor is formed.
In the case where the semiconductor film 17 is formed by epitaxial growth, particularly when the semiconductor film 17 is epitaxially grown on the single crystal semiconductor layer 14, the semiconductor film 17 having excellent crystallinity is formed.
Can be formed. However, the semiconductor film 17
Is not limited to an epitaxially grown film, but may be a polycrystalline layer, an amorphous layer, or a mixture of these, as described above.

The semiconductor film 17 is made of silicon Si
When forming a film, in order to obtain a Si film having excellent surface smoothness, a chlorine-based gas such as SiCl
₄ , SiHCl ₃ , Si ₂ H ₂ Cl ₂ or the like is preferable. For example, in order to generate fine irregularities on the surface in order to increase the light receiving efficiency as in a solar cell, etching with HCl is performed prior to the formation of the semiconductor film. After that, it is preferable to form a film using a silane-based gas such as SiH ₄ or S ₂ H ₆ .

In the semiconductor substrate (semiconductor substrate 16) according to the present invention described above, the semiconductor substrate 11 is
However, it has a structure in which a single-crystal semiconductor layer 14 is formed via a hollow layer 13 existing as a supporting column, so to say, the strength of the hollow layer 13 depends on the thickness of the connecting columnar body 15 and the like. In some cases, the cavity layer 13 or the columnar body 15 itself can be used in various ways, and when the cavity layer 13 is used as a separation separation layer from the single crystal semiconductor layer 14, for example. In addition, for example, in handling, it is possible to effectively avoid inconvenience such that the cavity layer 13 is inadvertently broken, and when separation is required, the separation is reliably performed over the entire area of the cavity layer 13. The strength can be selected so that there is no excess or shortage. Therefore, a semiconductor device such as a thin-film semiconductor and an SOI, a solar cell, an integrated circuit, and the like using the semiconductor substrate 16 can be easily and reliably formed with a high yield.

According to the manufacturing method of the present invention, the cavity layer 13 and the single-crystal semiconductor layer 14 are formed by forming and annealing the porous layer. By selecting the conditions, the strength of the cavity layer 13, that is, the thickness of the columnar body, for example, can be selected. Therefore, the separation strength of the semiconductor substrate 16 can be easily and reliably selected according to the purpose of use.

In the method of the present invention, as described above, the cavity layer and the single crystal semiconductor layer are formed by annealing after the anodization, and the epitaxial growth of the semiconductor film or the like on the surface of the porous layer or the single crystal semiconductor layer afterwards. Can be performed at a temperature of 700 ° C. to 1200 ° C. by, for example, a CVD method. In this case, by forming the film at a temperature lower than the annealing temperature, the cavity layer and the single crystal semiconductor selected by selecting the annealing conditions are formed. The thickness of the layer, the thickness of the columnar body in the cavity layer, porosity such as density,
Fluctuation due to the formation of a semiconductor film or the like can be avoided.

Further, according to the manufacturing method of the present invention, the semiconductor substrate 11 constituting the semiconductor substrate 16 is the single crystal semiconductor layer 14 in the cavity layer 13 and the semiconductor substrate 11 of the semiconductor film 17.
After the separation from the semiconductor substrate 16, the remaining semiconductor substrate may be repeatedly used as the semiconductor substrate 11 for obtaining the semiconductor substrate 16 by polishing the surface again by, for example, electrolytic polishing or the like. The thickness reduced by the above is compensated for by epitaxial growth, etc., so that it can be used many times repeatedly, and as described above, it can be used as the carrier substrate 19, so that it can be manufactured at low cost.

Further, according to the manufacturing method of the present invention, after a substrate such as a printed board is bonded as the carrier substrate 19 on the semiconductor film to integrate the substrate and the semiconductor film, the substrate is separated from the semiconductor substrate 11. The type of the carrier substrate 19 is not limited, and a metal plate,
A thin-film single-crystal semiconductor can be formed on a substrate such as ceramic, glass, resin, or the like, which has never been considered by common sense of conventional semiconductor technology, or a solar cell can be formed.

[0096]

As described above, according to the present invention, it is possible to easily and inexpensively provide a semiconductor substrate having an optimum strength and a structure according to various uses and modes. Therefore,
Industrially important effects that various semiconductor devices can be mass-produced, with high yield, with high yield, and therefore at low cost can be obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an example of an anodizing apparatus for performing a method of the present invention.

FIG. 2 is a configuration diagram of another example of the anodizing apparatus for performing the method of the present invention.

3A to 3D are process diagrams of one manufacturing method for obtaining a semiconductor substrate according to the present invention.

FIG. 4 is a cross-sectional view of an example of a semiconductor substrate according to the present invention.

FIG. 5 is an SEM image of an example of a semiconductor substrate according to the present invention.

FIG. 6 is an SEM image of another example of the semiconductor substrate according to the present invention.

FIG. 7 is a further enlarged SEM image of an example of the semiconductor substrate according to the present invention.

FIG. 8 is a further enlarged SEM image of another example of the semiconductor substrate according to the present invention.

FIG. 9 is a diagram showing a structure of a hole in a cavity layer for explanation of the present invention.

FIG. 10 is a diagram showing a structure of a hole in a cavity layer for explanation of the present invention.

FIGS. 11A and 11B are process diagrams of an example of a method for manufacturing a thin film semiconductor according to the present invention.

12A to 12E are process diagrams of an example of a method for manufacturing an SOI substrate according to the present invention.

13A to 13D are process diagrams of an example of a method for manufacturing an integrated circuit device according to the present invention.

14A to 14C are process diagrams (part 1) of an example of a method for manufacturing a solar cell according to the present invention.

15 and 18 are process diagrams (part 2) of an example of a method for manufacturing a solar cell according to the present invention.

16A to 16G are process diagrams of another example of a method for manufacturing an SOI substrate according to the present invention.

[Explanation of symbols]

1 electrolytic solution tank, 1A first tank, 1B second tank, 1
H opening, 2 DC power supply, 3A, 3B electrode, 11 semiconductor substrate, 12 porous layer, 13 cavity layer, 14 single crystal semiconductor layer, 15 columnar body, 16 semiconductor substrate, 17
Semiconductor film (or material film), 18 insulating layer, 19 carrier substrate, 20 SOI substrate, 21 adhesive, 26 insulating film, 27 thin film semiconductor, 37 electrode or wiring, 41
Conductive wire, 51 isolation insulating layer, 52 gate insulating film, 5
3 gate electrode, 54 sidewall, 55 semiconductor region, 56 first interlayer insulating layer, 57 first wiring layer,
58 second interlayer insulating layer, 59 second wiring layer, first
Semiconductor film, 132 second semiconductor film, 133 third semiconductor film, 171 first semiconductor film, 172 second semiconductor film, 173 third semiconductor film

Claims (15)

[Claims] A single crystal semiconductor layer is formed on a semiconductor substrate via a cavity layer in which a plurality of pillars are dispersed and present,
2. The semiconductor substrate according to claim 1, wherein a porous layer is formed on the single crystal semiconductor layer, and a required material film is formed on the porous layer. 2. A cavity layer in which a plurality of pillars are dispersed on a surface of a semiconductor substrate by multi-step anodization and annealing, a single crystal semiconductor layer on the cavity layer, and a single crystal semiconductor layer on the single crystal semiconductor layer. A method for manufacturing a semiconductor substrate, comprising forming a porous layer of 3. After forming the cavity layer, the single crystal semiconductor layer, and the porous layer by the multi-step anodization and annealing, forming a required material film on the porous layer. 3. The method of manufacturing a semiconductor substrate according to claim 2, wherein: 4. A hollow layer in which a plurality of pillars are dispersed on a surface of a semiconductor substrate by multi-step anodization and annealing, a single crystal semiconductor layer on the hollow layer, and a single crystal semiconductor layer on the single crystal semiconductor layer. Forming a semiconductor layer on the porous layer; andseparating the semiconductor film from the semiconductor substrate in the cavity layer. A method for manufacturing a thin film semiconductor, comprising: 5. A cavity layer in which a plurality of pillars are dispersed on a surface of a semiconductor substrate by multi-step anodization and annealing, a single crystal semiconductor layer on the cavity layer, and a single crystal semiconductor layer on the single crystal semiconductor layer. Forming a porous layer, removing the porous layer, forming a semiconductor film on the single crystal semiconductor layer exposed by removing the porous layer, Separating the single crystal semiconductor layer on which is formed a film from the semiconductor substrate by separation in the cavity layer. 6. The semiconductor substrate according to claim 2, wherein the multi-stage anodization is performed by applying at least one or more kinds of currents having a low current density and then intermittently applying a high current density. Production method. 7. The thin-film semiconductor according to claim 4, wherein the multi-stage anodization is performed by applying at least one or more kinds of low-current-density currents and then intermittently applying a high-current-density current. Production method. 8. The semiconductor substrate according to claim 5, wherein the multi-stage anodization is performed by applying at least one or more kinds of currents having a low current density and then intermittently applying a high current density. Production method. 9. The method according to claim 2, wherein the annealing is performed in a hydrogen atmosphere at normal pressure or reduced pressure, or in a high vacuum. 10. The method according to claim 4, wherein the annealing is performed in a hydrogen atmosphere at normal pressure or reduced pressure or in a high vacuum. 11. The method according to claim 5, wherein the annealing is performed in a hydrogen atmosphere at normal pressure or reduced pressure or in a high vacuum. 12. The method according to claim 2, wherein the annealing is performed in an atmosphere of a Group 8 rare gas element. 13. The method according to claim 4, wherein the annealing is performed in an atmosphere of a Group 8 rare gas element. 14. The method according to claim 5, wherein the annealing is performed in a Group 8 rare gas element atmosphere. 15. The method according to claim 5, wherein the porous layer is removed by a gas having a function of etching.