JP3951340B2 - Semiconductor substrate and method of manufacturing semiconductor substrate and thin film semiconductor - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor substrate and a method for manufacturing a semiconductor substrate and a thin film semiconductor.
[0002]
[Prior art]
When configuring various single semiconductor devices, for example, semiconductor devices such as transistors, light emitting elements, solar cells, etc., or semiconductor devices such as a semiconductor integrated circuit in which a plurality of semiconductor elements are formed on a common substrate, for example, a flexible configuration is used. In the case of a so-called SOI (Semiconductor on Insulator) configuration, a thin film semiconductor is manufactured.
[0003]
[Problems to be solved by the invention]
For example, in Japanese Patent Application No. 9-53354, the present applicant first forms a porous layer having a separation layer on the surface thereof by anodization on a semiconductor substrate, and a semiconductor film is formed thereon. A method for forming a thin film semiconductor by using a semiconductor film by separating the semiconductor film in a porous layer separation layer was proposed.
According to this method, a sufficiently thin film such as a single crystal thin film semiconductor can be easily obtained.
[0004]
The present invention is applicable to, for example, the case of obtaining such a thin film semiconductor, a semiconductor base suitable for obtaining the semiconductor base and the thin film semiconductor, and the semiconductor base and the thin film. A method for manufacturing a semiconductor is provided.
[0005]
[Means for Solving the Problems]
In the present invention, a single crystal semiconductor layer is formed on a semiconductor substrate through a cavity layer in which a plurality of columnar bodies are dispersed, and a porous layer is formed on the single crystal semiconductor layer. A semiconductor substrate having a material film formed thereon is formed.
[0006]
A method of manufacturing a semiconductor substrate according to the present invention includes a cavity layer in which a plurality of columnar bodies are dispersed by multi-step anodization and annealing on a semiconductor substrate surface, a single crystal semiconductor layer on the cavity layer, A semiconductor substrate is obtained by forming a porous layer on the single crystal semiconductor layer.
[0007]
The thin film semiconductor manufacturing method according to the present invention includes a cavity layer in which a plurality of columnar bodies are dispersed by multi-step anodization and annealing on a semiconductor substrate surface, and a single crystal semiconductor layer on the cavity layer. A step of forming a porous layer on the single crystal semiconductor layer, a step of forming a semiconductor film on the porous layer, and a separation for separating the semiconductor film from the semiconductor substrate in the cavity layer A thin film semiconductor is obtained through the steps.
[0008]
The thin film semiconductor manufacturing method according to the present invention includes a cavity layer in which a plurality of columnar bodies are dispersed by multi-step anodization and annealing on a semiconductor substrate surface, and a single crystal semiconductor layer on the cavity layer. Forming a porous layer on the single crystal semiconductor layer; removing the porous layer; forming a semiconductor film on the single crystal semiconductor layer exposed by removing the porous layer; The single crystal semiconductor layer on which the semiconductor film is formed is separated from the semiconductor substrate by separation in the cavity layer to obtain a thin film semiconductor.
[0009]
As described above, the semiconductor substrate according to the present invention has a configuration in which a single crystal semiconductor layer is formed on a semiconductor substrate via a cavity layer, or a configuration in which a porous layer is formed on this single crystal semiconductor layer. The cavity layer has a configuration in which a plurality of columnar bodies are present in a dispersed manner, and the single crystal semiconductor layer is appropriately connected to the semiconductor substrate by the columnar bodies present in the cavity layer. Therefore, the single crystal semiconductor layer or the porous layer can be integrated with the semiconductor substrate without being separated in various processes such as film formation, and the semiconductor. In separation from the substrate, separation (separation) can be ensured by a required external force.
[0010]
The formation of the cavity layer on the semiconductor substrate is easy because the surface of the semiconductor substrate can be formed simply by multi-stage anodization and heat treatment, that is, annealing.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of the present invention will be described.
In the present invention, a single crystal semiconductor layer is formed on the surface of a semiconductor substrate through a multi-stage anodization and annealing, that is, a heat treatment, through a cavity layer in which a plurality of columnar bodies are dispersed on the semiconductor substrate. A semiconductor substrate in which a porous layer is formed on the single crystal semiconductor layer is formed.
As one embodiment, using this semiconductor substrate, various material films such as a metal film, a dielectric film, or a semiconductor film such as a single crystal film by epitaxial growth or a polycrystal are further formed on the porous layer. For example, a semiconductor film made of a film or an amorphous film is formed.
[0012]
In the semiconductor substrate having the semiconductor substrate, the material film, for example, the semiconductor film is separated (separated) from the semiconductor substrate in the cavity layer, that is, to be separated from the semiconductor substrate by crushing the columnar body in the cavity layer. Thus, a thin film semiconductor can be formed.
[0013]
As another embodiment, the porous layer is removed from the semiconductor substrate described above, and a semiconductor film is formed on the remaining single crystal semiconductor layer, for example, a semiconductor film is formed by epitaxial growth. Thereafter, as described above, the semiconductor film can be separated (separated) from the semiconductor substrate together with the single crystal semiconductor layer in the cavity layer to form a thin film semiconductor.
[0014]
Anodization is carried out by a known method such as surface technology Vol. 46, no. 5, pp. 8-13, 1995 [Anodic conversion of porous Si]. That is, for example, it can be performed by the double cell method whose schematic configuration is shown in FIG. In this method, an electrolytic solution tank 1 having a two-tank structure having first and second tanks 1A and 1B is used. Then, a semiconductor substrate 11 on which a porous layer is to be formed is disposed between both tanks 1A and 1B, and each one of a pair of platinum electrodes 3A and 3B connected to a DC power source 2 is disposed in both tanks 1A and 1B. Is done. In the first and second tanks 1A and 1B of the electrolytic solution tank 1, for example, hydrogen fluoride HF and ethanol C are respectively provided. ₂ H _Five Electrolytic solution 4 containing OH, or hydrogen fluoride HF and methanol CH _Three An electrolytic solution 4 containing OH is accommodated, the first and second tanks 1A and 1B are disposed so that both surfaces of the semiconductor substrate 11 are in contact with the electrolytic solution 4, and both electrodes 3A and 3B are disposed in the electrolytic solution 4. Soaked in. Then, the DC power source 2 is connected between the electrodes 3A and 3B with the electrode 3A side immersed in the electrolytic solution 4 in the tank 1A on the surface side where the porous layer of the semiconductor substrate 11 is to be formed as the negative electrode side. Energization is performed. In this way, power is supplied with the semiconductor substrate 11 side as the anode side and the electrode 3A as the cathode side, whereby the surface of the semiconductor substrate 11 facing the electrode 3A side is eroded and becomes porous.
[0015]
When this two-cell method is used, it is not necessary to deposit the ohmic electrode on the semiconductor substrate, and the introduction of impurities from the ohmic electrode into the semiconductor substrate is avoided.
[0016]
However, the anodization is not limited to the case of the above-described two-tank cell method, and for example, the single-tank cell method shown in a schematic configuration diagram in FIG. In this example, a single electrolytic solution tank 1 is provided, and for example, a semiconductor substrate 11 to be anodized is disposed in a liquid-tight manner through an O-ring 5 so as to face an opening 1H provided on the bottom surface. Is done. The electrolytic solution 4 is accommodated in the electrolytic solution tank 1, and the electrolytic solution 4 is brought into contact with the surface of the semiconductor substrate 11 disposed at the bottom for the anode configuration. In the electrolytic solution 4 in the tank 1, for example, one electrode 3A made of a Pt electrode plate is immersed. On the back surface of the semiconductor substrate 11, the other electrode 3B made of, for example, a carbon electrode is disposed in surface contact so as to face the entire surface of the surface to be anodized as much as possible. Then, with the electrode 3A side immersed in the electrolytic solution 4 as the negative electrode side, the DC power source 2 is inserted between the electrodes 3A and 3B, and energization is performed. Even in this case, the surface of the semiconductor substrate 11 facing the electrode 3A is anodized.
[0017]
By selecting the conditions in this anodization, the structure, thickness, and the like of the porous layer and the cavity single crystal semiconductor layer to be formed change, and the separation (peeling) property, that is, the separation (peeling) strength changes.
[0018]
Anodization of the semiconductor substrate is at least two steps with different current densities. That is, at least a step of anodizing the surface of the semiconductor substrate at a low current density and a step of anodizing at a higher current density are adopted thereafter.
This anodization can take, for example, an anodization step at a low current density, an anodization step at a current density higher than the low current density, and an anodization step at a higher current density. .
In anodization, the anodization at the high current density can be conducted intermittently.
Further, in the anodization at an intermediate high current density in the anodization for forming the porous layer, the current density can be increased gradually or stepwise.
[0019]
In the anodizing step, the composition of the electrolytic solution can be changed when changing the current density.
[0020]
The semiconductor substrate can be composed of various semiconductor substrates such as a silicon Si single crystal substrate, in some cases a Si polycrystalline substrate, or a compound semiconductor substrate such as a GaAs, GaP, GaN, or SiGe single crystal. For example, it is preferable to use a Si single crystal substrate for manufacturing, for example, a Si single crystal thin film semiconductor or a solar cell using a Si single crystal thin film.
[0021]
In the case of forming a thin film semiconductor using a compound semiconductor, a compound semiconductor substrate can be used as the semiconductor substrate. Even in this case, a semiconductor substrate having a porous layer on the surface can be formed by anodizing the compound semiconductor substrate. be able to.
[0022]
The semiconductor substrate can be constituted by a semiconductor substrate doped with n-type or p-type impurities or a semiconductor substrate not containing impurities. However, in the case of anodizing, a low resistivity semiconductor substrate so-called p-type doped with a high concentration of p-type impurities. ⁺ It is desirable to use a Si substrate. As this semiconductor substrate, p ⁺ When using a type Si substrate, p-type impurities such as boron B are about 10 ¹⁹ atoms / cm ^Three It is desirable to use a Si substrate that is doped to the extent that the resistance is about 0.01 to 0.02 Ωcm. And this p ⁺ When anodizing a type Si substrate, fine pores that are elongated in a direction substantially perpendicular to the substrate surface are formed, and porous while maintaining crystallinity. Conversion Therefore, a desirable porous layer is formed.
Therefore, the semiconductor film can be epitaxially grown on the porous layer.
[0023]
Various shapes can be adopted as the shape of the semiconductor substrate. For example, a wafer shape such as a disk shape or a cylindrical body ingot formed by pulling a single crystal can be used to form various shapes such as a peripheral surface of the substrate surface.
[0024]
After the porous layer is formed on the surface of the semiconductor substrate, it is heated in a hydrogen gas atmosphere or vacuum at normal pressure or reduced pressure, or a group 8 noble gas in the periodic table of He, Ne, Ar, Kr, etc. High-temperature annealing is performed in an element atmosphere, for example, 700 ° C. to 1200 ° C.
Thus, as described above, the above-described cavity layer is formed on the surface of the semiconductor substrate, and the single crystal semiconductor layer and the porous layer are formed on the single-crystal semiconductor layer via the cavity layer.
[0025]
Film formation on the porous layer or on the single crystal semiconductor layer from which the porous layer has been removed is performed by MOCVD (metal organic chemical vapor deposition), CVD (chemical vapor deposition), MBE (molecular (Line epitaxy) method, sputtering, etc., and can be formed as single crystal, polycrystal, and amorphous films, and further, for example, formed as an amorphous film and then annealed to be polycrystalline. Alternatively, single crystallization can be performed.
[0026]
After the anodization described above, the cavity layer and the single crystal semiconductor layer are formed by annealing, and the subsequent epitaxial growth of the semiconductor film or the like on the surface of the porous layer or the single crystal semiconductor layer is performed at a temperature of 700 ° C. to 1200 ° C., for example, by CVD. In this case, by forming the film at a temperature lower than the annealing temperature, the thickness of the cavity layer and the single crystal semiconductor layer selected by the selection of the annealing conditions, the thickness of the columnar body in the cavity layer, and In addition, the porosity such as density can be prevented from fluctuating due to the formation of a semiconductor film or the like.
[0027]
Further, this film formation may be the same material as the semiconductor substrate or a different material. For example, a single-crystal Si semiconductor substrate is used, and a compound semiconductor such as Si or GaAs or a Si compound such as Si is used for the porous layer formed on the surface thereof. _1-y Ge _y Various epitaxial growths can be performed, for example, by epitaxially growing them, or by appropriately combining and laminating them.
[0028]
For example, in the case of constituting a solar cell, as the semiconductor film, for example, p-type high impurity concentration p in order from the porous layer side, for example. ⁺ Semiconductor layer, p-type low impurity concentration p ^- Semiconductor layer and n-type high impurity concentration n ⁺ It can be set as the multilayer semiconductor film epitaxially grown in order of the semiconductor layer. The impurity concentration and film thickness of these layers are not particularly limited. ⁺ The type semiconductor layer has a thickness in the range of 0 to 1 μm, typically about 0.5 μm, and a boron B concentration of 10 ¹⁸ -10 ²⁰ atoms / cm ^Three Range, typically about 10 ¹⁹ atoms / cm ^Three The p-type semiconductor layer has a thickness in the range of 1 to 30 μm, typically about 5 μm, and a boron concentration of 10 ¹⁴ -10 ¹⁷ atoms / cm ^Three Range, typically about 10 ¹⁶ atoms / cm ^Three Degree, n ⁺ The type semiconductor layer has a thickness in the range of 0.1 to 1 μm, typically about 0.5 μm, and a phosphorus P or arsenic As concentration of 10 ¹⁸ -10 ²⁰ atoms / cm ^Three Range, typically about 10 ¹⁹ atoms / cm ^Three It is preferable to set the degree.
[0029]
In addition, the semiconductor film is p from the porous layer side ⁺ Type Si layer, p type Si _1-x Ge _x Graded layer, undoped Si _1-y Ge _y Layer, n-type Si _1-x Ge _x Graded layer, and n ⁺ The semiconductor film is epitaxially grown in the order of the type silicon layer, whereby a solar cell having a double hetero structure can be manufactured. As a typical example of each layer constituting this double heterostructure, p ⁺ The type Si layer has an impurity concentration of 10 ¹⁹ atoms / cm ^Three About 0.5 μm, p-type Si _1-x Ge _x The graded layer has an impurity concentration of 10 ¹⁶ atoms / cm ^Three About 1 μm thick, undoped Si _1-y Ge _y As the layer, y is 0.7, the film thickness is about 1 μm, and n-type Si. _1-x Ge _x The graded layer has an impurity concentration of 10 ¹⁶ atoms / cm ^Three The film thickness is about 1 μm, and n ⁺ The type Si layer has an impurity concentration of 10 ^Ten cm ^-3 The film thickness is preferably about 0.5 μm. P-type and n-type Si _1-x Ge _x The composition ratio x of Ge in the graded layer is changed from x = 0 of the layers existing on both sides to undoped Si. _1-y Ge _y It is preferable to gradually increase until y. Thereby, since the lattice constants are matched at each interface, good crystallinity can be obtained. Incidentally, in such a solar cell having a double hetero structure, the undoped Si at the center thereof is used. _1-y Ge _y Since the carrier and light can be effectively confined in the layer, high conversion efficiency can be obtained.
[0030]
The introduction of n-type or p-type impurities into the semiconductor film described above can be performed during the film formation, for example, during epitaxial growth. Alternatively, after the semiconductor film is formed, impurities can be introduced over the entire surface or selectively by ion implantation, diffusion, or the like. In this case, the conductivity type, impurity concentration, and type are selected according to the purpose of use.
[0031]
When the semiconductor layer is formed on the single crystal semiconductor layer by removing the porous layer, the porous layer is removed when the semiconductor substrate is made of Si. Etching is performed by flowing a small amount of gas having a function of etching the layer, for example, liquefied hydrogen chloride (chemical formula: HCl) gas.
As described above, when etching with HCl gas is performed on the porous layer that has been annealed at high temperature, the surface of the single crystal semiconductor layer exposed by removing the porous layer by this etching becomes extremely clean.
When, for example, Si film formation, for example, epitaxial growth is performed on the single crystal semiconductor layer thus cleaned, the above-described high temperature annealing, etching with HCl gas, and epitaxial growth are continuously performed in the same epitaxial growth furnace. Therefore, it is possible to form an excellent film, for example, an epitaxial film having good characteristics, because the disadvantage that the epitaxial growth surface of the single crystal semiconductor layer is oxidized or foreign matter intervenes is avoided. it can. And the work process is also simplified.
[0032]
However, the removal of the porous layer is performed by removing the porous layer from the furnace after the annealing described above and removing the porous layer by, for example, RIE (reactive ion etching), chemical wet etching, mechanical chemical etching, so-called CMP (Chemical Mechanical Polishing), or the like. Can also be taken.
[0033]
In addition, when Si is epitaxially grown in the formation of a semiconductor film, it is desirable to form the semiconductor film as a semiconductor film having a smooth surface as in the case of a thin film semiconductor such as a semiconductor integrated circuit. In this case, the epitaxial growth of Si is performed using chlorine gas-based source gas such as Si. ₂ H ₂ Cl ₂ , SiHCl _Three , SiCl _Four Etc. are desirable. Then, for example, in the case of a solar cell, when it is desired to form fine irregularities on the surface so as to increase the light receiving efficiency, etching is performed with hydrochloric acid on the epitaxial growth surface to form fine irregularities on the surface, and then Silane source gas such as SiH _Four , Si ₂ H ₆ , Si _Three H ₈ It is possible to form fine irregularities by performing epitaxial growth using the like.
[0034]
Further, when separating the single-layer or multiple-layer film formation from the semiconductor substrate, a flexible substrate such as a polymer sheet or a rigid glass substrate, a resin substrate or, for example, a required print is formed on the film formation. It is possible to bond a flexible carrier substrate with wiring and to perform separation from the semiconductor substrate together with the carrier substrate in the cavity layer. In this case, when the film is formed of a semiconductor film and the supporting substrate is an insulating substrate, or a semiconductor substrate having an insulating layer formed on its bonding surface, or a conductive substrate, the thin film having an SOI structure is used. A semiconductor can be manufactured.
[0035]
In addition, the separation in the cavity layer can be performed, for example, by applying ultrasonic waves or by vacuum adsorption.
[0036]
On the other hand, the remaining semiconductor substrate is used again in the above-described thin film semiconductor manufacturing, used as the above-mentioned SOI support substrate, or the semiconductor substrate thinned by the above-mentioned repeated use is a thin film itself. It can be used as a semiconductor.
[0037]
In any of the annealing and the semiconductor film formation described above, a method of heating the semiconductor substrate to a predetermined substrate temperature can be a so-called susceptor heating method, or heating by direct current flow to the semiconductor substrate itself. It is possible to adopt an electric heating method or the like.
[0038]
Next, examples of the present invention will be described. However, the present invention is not limited to this embodiment.
First, embodiments of the semiconductor substrate and the method for manufacturing the same according to the present invention will be described.
[0039]
[Example 1]
FIG. 3 is a manufacturing process diagram of the first embodiment.
First, a semiconductor substrate, for example, a wafer-like semiconductor substrate 11 made of single crystal Si doped with boron B at a high concentration and having a specific resistance of 0.01 to 0.02 Ωcm, for example, was prepared (FIG. 3A).
[0040]
Then, a multi-step anodization was performed on the semiconductor substrate 11 to form a porous layer on the surface of the semiconductor substrate 11.
In this example, anodization was performed in the dark using the one-tank structure anodizing apparatus described in FIG. In this case, the electrolytic solution is HF: C ₂ H _Five OH = 1: 1 was used. A direct current was passed between the electrodes 3A and 3B.
[0041]
First, the current density is 0 mA / cm. ² To 1 mA / cm ² It gradually increases to about 1 minute, and this 1 mA / cm ² Low current energization was conducted at a low current of 8 minutes. As a result, a porous surface layer 12S having a low porosity was formed (FIG. 3B).
[0042]
Next, the current density is 1 mA / cm. ² To 7 mA / cm ² It gradually increases over 30 seconds, and this 7 mA / cm ² Medium current energization was conducted at a medium current for 8 minutes. Thereby, the porous layer 12 in which the intermediate porosity layer 12M having a higher porosity than the surface layer 12S was formed (FIG. 3C).
[0043]
Next, the current density is 80 mA / cm, which is higher than the previous current carrying current densities. ² And then energized for 0.3 seconds, after which the energization was stopped for 1 minute, and then again 80 mA / cm. ² And then energized for 0.3 seconds, and then the energization was stopped and after 1 minute had elapsed, an additional 80 mA / cm ² And intermittent high current energization was performed for 0.3 seconds.
Thereafter, this semiconductor substrate is subjected to an atmospheric pressure Si epitaxial growth apparatus with H ₂ Heat treatment or annealing was performed in the atmosphere. In this annealing, the temperature was raised from room temperature to 1120 ° C. over about 20 minutes, and this temperature was maintained for about 50 minutes. By doing so, the surface of the surface layer 12S of the porous layer 12 becomes flat and smooth, and the interface between the porous layer and the semiconductor substrate 11 in the porous layer 12 (this interface is the anode of the semiconductor substrate 11). This refers to the surface of the semiconductor substrate 11 that is left without the porous layer 12 having a required depth position from the initial surface before the formation, and the same applies hereinafter. A cavity layer 13 extending along the surface of the porous layer 12 was generated, and a single crystal semiconductor layer 14 was formed on the cavity layer 13 (FIG. 3D). In this hollow layer 13, a plurality of columnar bodies 15 are generated so as to be dispersed and planted, that is, a connecting column for connecting the single crystal semiconductor layer 14 to the semiconductor substrate 11 with respect to the interface of the semiconductor substrate 11. As well as functioning as a crack, the cavity layer 13 is formed with a crack that maintains the required separability.
[0044]
In this example, the single crystal semiconductor layer 14 is formed under the porous layer 12, and a crack is generated by the cavity layer 13 between the semiconductor substrate 11 and the semiconductor substrate 11. In this example, the semiconductor substrate is weakened. A semiconductor substrate 16 is configured.
[0045]
[Example 2]
In this example, a semiconductor substrate 16 was produced by the same process as that of Example 1 described with reference to FIG. 3 except that the annealing conditions were different from those of Example 1. That is, in Example 2, the semiconductor substrate on which the porous layer 12 was formed by the steps described with reference to FIGS. 3A to 3C was converted into H by an atmospheric pressure Si epitaxial growth apparatus. ₂ In this atmosphere, the temperature was raised from room temperature to 1120 ° C. over about 20 minutes, and at this temperature, annealing was performed for about 8 hours in this Example 2 as compared with Example 1. Also in this case, the surface of the surface layer 12S of the porous layer 12 is flat and smooth, and as shown in FIG. 3D, a hollow layer is formed under the porous layer 12, that is, at the interface between the porous layer and the semiconductor substrate 11. 13 was generated, and a single crystal semiconductor layer 14 was formed on the cavity layer 13. A plurality of columnar bodies 15 are dispersed and generated in the hollow layer 13. In this columnar body, the annealing time was made longer than that in Example 1. In Example 2, the width, that is, the thickness was increased, and the thickness of the single crystal semiconductor layer 14 was increased.
[0046]
Example 3
In this embodiment, a semiconductor film is formed on the semiconductor substrate 16 obtained in the first embodiment. That is, also in this Example 3, the semiconductor substrate 16 was configured by taking the same steps as in Example 1 shown in FIGS. 3A to 3D.
Then, a material film 17 was formed on the porous layer 12 of the semiconductor substrate 16 on the semiconductor substrate 16 as shown in a schematic sectional view in FIG. In this example, the Si semiconductor film 17 was epitaxially grown. This epitaxial growth is performed after the above-described annealing at 1120 ° C. for 50 minutes, and then the temperature is lowered to 1060 ° C. _Four And B ₂ H ₆ High concentration boron-doped CVD (chemical vapor deposition) with gas was performed for 10 minutes, and then boron-doped CVD at a lower concentration was performed for 40 minutes to epitaxially grow a p-type Si semiconductor film 17 having a thickness of about 10 μm. In FIG. 4, parts corresponding to those in FIG.
[0047]
Example 4
In this embodiment, a semiconductor film is formed on the semiconductor substrate 16 obtained in the second embodiment. That is, in the fourth embodiment, the annealing time for manufacturing the semiconductor substrate 16 is about 8 hours compared to the third embodiment, which is compared with the annealing time for manufacturing the semiconductor substrate 16 in the third embodiment of 50 minutes. Then, the same steps as in Example 3 were taken except that the time was long. That is, in Example 4, as shown in FIG. 4, on the semiconductor substrate 16 obtained in Example 2, the Si semiconductor film 17 is formed as the material film 17 on the porous layer 12 as shown in FIG. After the annealing at 1120 ° C. described above, the temperature was lowered to 1060 ° C. _Four And B ₂ H ₆ High concentration boron-doped CVD (chemical vapor deposition) with gas was performed for 10 minutes, and then boron-doped CVD at a lower concentration was performed for 40 minutes to epitaxially grow a p-type Si semiconductor film 17 having a thickness of about 10 μm.
[0048]
Each cross-sectional image of the semiconductor substrate 16 having the Si semiconductor film 17 produced in Example 3 and Example 4 described above was observed with a high-resolution SEM (Secondary Electron Microscopy). Cross-sectional images of the sample A according to Example 3 and the sample B according to Example 4 by SEM are shown in FIGS. 5 and 6. In these samples A and B, the cross section is the (110) plane, and the upper direction is the <001> orientation.
[0049]
When these sample A and sample B are compared, the hole shape of each layer of the porous layer formed by the low-current energization and medium-current energization in the above-described anodizing treatment is determined by recrystallization by the above-described annealing. 7 and 8, respectively, as shown in the enlarged cross-sectional SEM images of Samples A and B, the cross-sections are quadrilateral, pentagonal and hexagonal, and their vertices are slightly rounded. I understood. Then, as a result of examining this detail, basically, as shown in FIG. 9, all the holes are octahedrons having six vertices with the surface orientation <111> as each surface, As shown in FIG. 10, it was found that Si atoms were buried so that some of them were in the plane orientation <001>.
[0050]
On the other hand, the film thickness of the single crystal semiconductor layer 14 is H ₂ In sample A in which the annealing time is 50 minutes, it is about 2 μm, and H ₂ In Sample B in which the annealing time was about 8 hours, it was about 3.5 to 4 μm. That is, the longer the annealing time, the greater the thickness of the single crystal semiconductor layer 14. Therefore, this is considered that the porous Si layer was solid phase epitaxially grown.
[0051]
For the cavity layer 13, the thickness of the columnar body 15 that connects the semiconductor substrate 11 and the single crystal Si semiconductor layer 14 is H ₂ In sample A with an annealing time of 50 minutes, a sample of about 6 μm or less was mixed, and compared with this, H ₂ In Sample B where the annealing time was extended, that is, about 8 hours, columnar bodies having a thickness of about 15 μm or less were mixed. That is, the longer the annealing time, the thicker the columnar body 15 in the cavity layer 13.
[0052]
From these matters, in order to increase the film thickness of the single crystal semiconductor layer 14, the annealing time may be increased. At this time, since the columnar body 15 in the cavity layer 13 becomes thicker, the separation strength is large. That is, since it becomes difficult to separate, the annealing time is selected in consideration of these balances.
[0053]
Then, by using the semiconductor substrate according to Examples 3 and 4 described above, the semiconductor film 17 is separated from the semiconductor substrate 11 by breaking the columnar body 15 in the cavity layer 13 to obtain a thin film semiconductor by the semiconductor film 17. Can do.
Prior to separation of the semiconductor film 17 from the semiconductor substrate 11, a carrier substrate having an insulating layer or an insulating carrier substrate is bonded onto the semiconductor film 17, and the semiconductor film 17 is attached to the semiconductor substrate together with the carrier substrate. The SOI substrate can be obtained by separating from the substrate 11. An example in this case will be described as Example 5 with reference to FIG.
[0054]
Example 5
In this embodiment, on the Si epitaxial semiconductor film 17 of the material film 17 shown in FIG. ₂ A carrier substrate 19 made of an Si substrate on which an insulating layer 18 is deposited is bonded (FIG. 11A). This bonding can be performed by bonding with an adhesive or making the surfaces hydrophilic to bond, a method in which the respective substrates are bonded together, and then thermal annealing (so-called wafer bonding method).
Thereafter, the semiconductor film 17 is separated from the semiconductor substrate 11 together with the supporting substrate 19 by breaking in the cavity layer 13. At this time, since the porous layer 12 remains in the semiconductor film 17 separated from the semiconductor substrate 11, that is, peeled off, it is removed by etching as necessary. In this way, the SOI substrate 20 in which the thin film semiconductor 27 by the semiconductor film 17 is formed on the support substrate 19 through the insulating layer 18 is obtained (FIG. 11B).
[0055]
In Examples 3 to 5, the material film 17 is formed on the porous layer 12, and the Si semiconductor film is epitaxially grown in the above-described examples. However, after the porous layer 12 is formed as described above, Then, the cavity layer 13 and the single crystal semiconductor layer 14 are formed by annealing, and then the porous layer 12 is removed by etching to expose the single crystal semiconductor layer 14 to the outside, and on the exposed single crystal semiconductor layer 14 In addition, the semiconductor film 17 can be formed. An embodiment in this case will be described as a sixth embodiment with reference to FIG.
[0056]
Example 6
In this embodiment, the porous layer 12 is formed by performing multi-stage anodization on the surface of the semiconductor substrate 11 by the method described in the embodiment 2, and thereafter, in the atmospheric pressure Si epitaxial growth apparatus, ₂ The temperature is raised from room temperature to 1120 ° C. in an atmosphere in about 20 minutes, and annealing is performed at 1120 ° C. for about 8 hours to form the cavity layer 13 in the porous layer 12, and the single crystal semiconductor layer 14 is formed thereon. The process to generate is performed (FIG. 12A).
[0057]
Subsequently, HCl gas by liquefied hydrogen chloride (chemical formula: HCl) is introduced into the epitaxial growth apparatus at a temperature similar to the annealing temperature, that is, 1120 ° C. Thus, the porous layer 12, that is, the porous Si layer is removed by etching, and the single crystal semiconductor layer 14 under the porous layer 12 is exposed to the outside (FIG. 12B).
Subsequently, the temperature was lowered to 1060 ° C. and SiH _Four High-concentration boron-doped Si epitaxial growth using gas was performed for 30 minutes to form the semiconductor film 17 (FIG. 12C). The thickness of the semiconductor film 17 formed by this film formation was 8 μm.
[0058]
A carrier substrate 19 made of, for example, a flexible resin substrate is bonded onto the semiconductor film 17 via an adhesive 21 (FIG. 12D).
The semiconductor film 17 bonded to the carrier substrate 19 is separated from the semiconductor substrate 11 together with the carrier substrate 19 by breaking in the cavity layer 13, and the SOI having the thin film semiconductor 27 by the semiconductor film 17 held by the carrier substrate 19. A substrate 20 is obtained (FIG. 12E). At this time, since the surface of the semiconductor film 17 separated from the semiconductor substrate 11, that is, separated from the semiconductor substrate 11 is an uneven surface due to the breakage in the cavity layer 13, when the surface smoothing is required, this separation surface Etching for smoothing is performed.
[0059]
The SOI substrate 20 formed according to the sixth embodiment can be configured as a flexible SOI substrate 20 when the carrier substrate 19 has flexibility. However, a rigid SOI can be formed by using, for example, a rigid insulating substrate or a semiconductor substrate having an insulating layer as in the fifth embodiment as the carrier substrate 19.
[0060]
Further, according to the present invention, a semiconductor integrated circuit device can be configured by forming various semiconductor elements on the thin film semiconductor.
An example in this case is given as Example 7 and will be described with reference to FIG.
[0061]
Example 7
In this example, a semiconductor film 17 epitaxially grown on the single crystal semiconductor layer 14 formed through the cavity layer 13 on the semiconductor substrate 11 as shown in FIG. A formed semiconductor substrate is prepared (FIG. 13A).
[0062]
A circuit element is formed on the epitaxially grown semiconductor film 17 by a normal semiconductor manufacturing process. In this embodiment, an integrated circuit having a CMOS (Complementary MOS) using a MOS-FET (Insulated Gate Field Effect Transistor) is formed. In this case, the portion of the semiconductor film 17 to be subjected to element isolation is locally The isolation insulating layer 51 was formed by oxidation, so-called LOCOS (Local Oxidation of Silicon). Then, a gate insulating film 52 is formed on the MOS-FET forming portion by, for example, surface thermal oxidation of the semiconductor film 17, and a gate electrode 53 is formed thereon. The gate electrode 53 is formed by forming polycrystalline Si over the entire surface by, for example, a CVD (Chemical Vapor Deposition) method, and forming the gate electrode 53 as a required pattern by pattern etching by photolithography. Next, low concentration source and drain regions are formed on both sides of the semiconductor film 17 below the gate electrode 53 by ion implantation of p-type or n-type impurities at a relatively low concentration using the gate electrode 53 as a mask. Thereafter, for example, SiO 2 is formed on the side surface of the gate electrode 53. ₂ The side wall 54 is formed by a known method. Then, using the gate electrode 53 as a mask including the side wall 54, the same p-type or n-type impurity is ion-implanted at a high concentration on both sides thereof, and the high-concentration source and drain regions formed thereby, A semiconductor region 55 serving as a source and drain region is formed by the low concentration source and drain regions formed in (1). In this way, an LDD (Lightly Doped Drain) type MOS-FET is formed.
[0063]
After that, for example, SiO ₂ After the first interlayer insulating layer 56 is deposited and planarized, a first wiring layer 57 is formed thereon. The first wiring layer 57 is in electrical contact with a predetermined semiconductor region 55 of the circuit element through a contact hole formed in the first interlayer insulating layer 56. In addition, for example, SiO ₂ A second interlayer insulating layer 58 is formed, and a second wiring layer 59 is formed thereon. The second wiring layer 59 is in electrical contact with, for example, a predetermined portion of the lower first wiring layer through a contact hole formed in the second interlayer insulating layer 58 (FIG. 13B).
[0064]
Thus, the integrated circuit formed in the semiconductor film 17 is separated from the semiconductor substrate 11. First, the carrier substrate 19 made of, for example, a flexible resin substrate is placed on the semiconductor film 17 on which the integrated circuit is formed via the adhesive 21, and thus on the second interlayer insulating layer 58 on which the second wiring layer 59 is formed. Join or stick (FIG. 13C). The adhesive strength of the carrier substrate 19 at this time is set to a strength stronger than the separation strength from the semiconductor substrate 11 by the porous layer 12, that is, an adhesive strength that does not cause separation of the carrier substrate 19 during separation.
[0065]
Next, an external force is applied between the semiconductor substrate 11 and the carrier substrate 19 in a direction to separate them. As a result, the columnar body 15 is broken in the weakened cavity layer 13 as described above, and the semiconductor film 17 is separated from the semiconductor substrate 11 together with the single crystal semiconductor layer 14.
For example, a resin film is applied to the surface of the single crystal semiconductor layer 14 on which the semiconductor film 17 separated in this way is formed, that is, the separation surface from the semiconductor substrate 11, and the surface is protected. A protective film 62 is formed (FIG. 13D).
[0066]
In this way, an integrated circuit device is formed in which a thin film semiconductor is formed on the carrier substrate 19 by the semiconductor film 17 on which circuit elements are formed. This integrated circuit device can be configured as a flexible integrated circuit device when the carrier substrate 19 is a flexible substrate. However, when the carrier substrate 19 is rigid, that is, a rigid substrate, a rigid integrated circuit device can be configured.
[0067]
In the above-described integrated circuit device, the case where the circuit element is a CMOS has been exemplified, but it goes without saying that the circuit element is not limited to a CMOS, and can be formed by various circuit elements, and can be applied to various integrated circuit devices. be able to.
[0068]
Furthermore, the present invention can be applied when obtaining a solar cell. One embodiment in this case will be described as an eighth embodiment with reference to FIGS. 14 and 15.
[0069]
Example 8
In this embodiment, terminal derivation from the light-receiving surface side electrode, that is, derivation of the conductive wire can be easily performed.
Also in this embodiment, a Si single crystal semiconductor substrate 11 is prepared, and its surface is anodized by the same method as described in Embodiment 1 to form a surface layer 12S and an intermediate porosity having a high porosity. The porous layer 12 in which the rate layer 12M is formed is formed. Then, the semiconductor substrate 11 is converted to H by an atmospheric pressure Si epitaxial growth apparatus. ₂ Heat treatment or annealing was performed in the atmosphere. In this annealing, the temperature was raised from room temperature to 1120 ° C. over about 20 minutes, and this temperature was maintained for about 30 minutes. As a result, the surface of the surface layer 12S of the porous layer 12 becomes flat and smooth, and the single crystal semiconductor layer 14 is generated on the interface side between the porous layer and the semiconductor substrate 11 in the porous layer 12. At the same time, a hollow layer 13 in which a plurality of columnar bodies 15 are dispersed and planted is generated (FIG. 14A).
Thereafter, the porous layer 12 is etched with HCl to expose the single crystal semiconductor layer 14 to the outside. _Four Gas and B ₂ H ₆ Epitaxial growth using gas is performed for 3 minutes, and boron B is 10 ¹⁹ atoms / cm ^Three P doped in ⁺ A first semiconductor layer 171 made of Si is formed, and then B ₂ H ₆ By changing the gas flow rate, Si epitaxial growth is performed for 20 minutes, and boron B is 10 ¹⁶ atoms / cm ^Three P doped at low concentration ^- A second semiconductor layer 172 made of Si is formed, and B ₂ H ₆ PH instead of gas _Three Gas is supplied and epitaxial growth is performed for 4 minutes, so that phosphorus P is 10% on the second semiconductor film 132. ¹⁹ atoms / cm ^Three Highly doped n ⁺ A third semiconductor layer 173 made of Si is formed, and p made of the first to third semiconductor layers 171 to 173 is formed. ⁺ -P ^- -N ⁺ A semiconductor film 17 having a structure was formed (FIG. 14B).
[0070]
Next, in this embodiment, SiO 2 is formed on the epitaxial semiconductor film 13 by surface thermal oxidation. ₂ A film, that is, a transparent insulating film 26 is formed, and pattern etching by photolithography is performed to form an opening 26W that makes contact with an electrode or wiring. This opening 26 W can be formed in a parallel arrangement in stripes extending in a direction orthogonal to the paper surface in the drawing while maintaining a required interval. SiO formed in this way ₂ The film can minimize the generation of carriers and recombination at the interface.
Then, a metal film is deposited on the entire surface, and pattern etching by photolithography is performed to form a required pattern, in this example, a stripe-shaped opening. 26 Striped electrodes or wirings 37 are formed along W (FIG. 14B). The metal film forming this electrode or wiring 37 is, for example, a multilayer structure formed by sequentially depositing a Ti film with a thickness of 30 nm, Pd with a thickness of 50 nm, and Ag with a thickness of 100 nm, and further performing Ag plating thereon. It can be constituted by a membrane. Thereafter, annealing was performed at 400 ° C. for 20 to 30 minutes.
[0071]
Next, in this embodiment, a conductive wire 41, a metal wire in this embodiment is joined to the striped electrodes or wirings 37 along these, respectively, and a transparent adhesive 21 is used on the conductive wire 41. The substrate 42 is bonded (FIG. 14C). Bonding of the conductive wire 41 to the electrode or wiring 37 can be performed by soldering. Then, one end or both ends of these conductive lines 41 are made longer than the electrodes or wirings 37 and led out to the outside.
[0072]
Thereafter, an external force is applied to the semiconductor substrate 11 and the transparent substrate 42 to separate them from each other. Thus, in the fragile cavity layer 13, the semiconductor film 17 and the single crystal semiconductor layer 14 are separated (separated) from the semiconductor substrate 11, and the thin film semiconductor 23 in which the semiconductor film 17 is bonded onto the transparent substrate 42 is formed. Is obtained (FIG. 15D).
[0073]
In this case, although the porous layer 12 remains on the back surface of the thin film semiconductor 23, a silver paste is applied on the porous layer 12, and a metal plate is further bonded to form the other back electrode 24. In this way, the printed circuit board 20 is p. ⁺ -P ^- -N ⁺ A solar cell in which the thin film semiconductor 23 having the structure is formed is formed (FIG. 15E). The metal electrode 24 also functions as a protective film on the back surface of the solar cell.
[0074]
In the solar cell thus formed, the light receiving side electrode or wiring 37 is covered with the transparent substrate 42, but the electrical external derivation from this is performed by the conductive wire 41. Can be easily connected. Further, for example, as in the above-described embodiment, the conductive line 41 is led out from each of the plurality of electrodes or wirings 37 that are in contact with the epitaxial semiconductor film 13, that is, the active part of the solar cell. Thus, the series resistance of the solar cell can be made sufficiently small.
[0075]
Further, since the conductive wire 41 is led out to the outside as described above, when a plurality of solar cells are connected to each other, this connection can be easily performed.
[0076]
In each of the above-described Examples 3 to 8, the semiconductor substrate 11 left after the separation in the cavity layer 13 is repeated as the semiconductor substrate 11 that performs anodization constituting the respective thin film semiconductors, semiconductor integrated circuit devices, solar cells, and the like again. Can be used. In addition, this repetition Return The semiconductor substrate 11 whose thickness is reduced by use can constitute a thin film semiconductor or semiconductor integrated circuit device in which a circuit element or an integrated circuit is formed.
[0077]
Alternatively, the semiconductor substrate 11 left by the separation as described above can be used as, for example, a thin film semiconductor supporting substrate 19. An example in this case will be described as Example 9 with reference to FIG.
[0078]
Example 9
Also in this example, a Si single crystal semiconductor substrate 11 similar to that used in Example 1 was prepared (FIG. 16A).
The surface of the semiconductor substrate 11 is anodized by the same method as described in Example 1 to form the surface layer 12S and the porous layer 12 having the intermediate porosity layer 12M having a higher porosity. Was formed (FIG. 16B). Then, the semiconductor substrate 11 is converted to H by an atmospheric pressure Si epitaxial growth apparatus. ₂ Heat treatment or annealing was performed in the atmosphere. In this annealing, the temperature was raised from room temperature to 1120 ° C. over about 20 minutes, and this temperature was maintained for about 30 minutes. In this way, the single crystal semiconductor layer 14 is generated on the interface side between the porous layer and the semiconductor substrate 11 in the porous layer 12, and the plurality of columnar bodies 15 are dispersed and planted. 13 occurs (FIG. 16C).
In this way, the cavity layer 13, the single crystal semiconductor layer 14, and the porous layer 12 are formed on the surface of the initial semiconductor substrate 11, and in the lower layers, the semiconductor substrate 11S is formed. ₁ Remain as.
[0079]
After that, the porous layer 12 is etched with HCl to expose the single crystal semiconductor layer 14 to the outside (FIG. 16D).
A semiconductor film 17 made of Si, for example, is epitaxially grown on the single crystal semiconductor layer 14 thus exposed to the outside. Then, an insulating layer 18 is formed on the surface of the Si semiconductor film 17 by, for example, surface thermal oxidation of the Si semiconductor film 17. (FIG. 16E).
Then, the Si carrying substrate 19 is bonded onto the insulating layer 18 (FIG. 16F). For this bonding, for example, the Si-supporting substrate 19 is washed beforehand with alkali to make the surface hydrophilic, and this is matched with the semiconductor film 17 on which the insulating layer 18 is formed. ₂ Bonding can be performed by annealing at 1000 ° C. for 30 minutes in an atmosphere.
[0080]
Thereafter, the semiconductor film 17 bonded to the carrier substrate 19 is separated from the semiconductor substrate 11 together with the single crystal semiconductor layer 14 by breaking the fragile cavity layer 13 (FIG. 16G). In this way, an SOI substrate 20 having a thin film semiconductor in which the semiconductor film 17 and the single crystal semiconductor layer 14 are bonded to the carrier substrate 19 via the insulating layer 18 is formed. Separation Semiconductor substrate 11S below the above-described cavity layer 13 ₁ Are separated.
[0081]
In this way, a plurality of operations in the series of steps described with reference to FIGS. 16A to 16G are sequentially performed in series or in parallel. That is, the first operation by the series of steps described in FIGS. 16A to 16G, the other second operation by the series of steps described in FIGS. 16A to 16G, and the same in FIGS. 16A to 16G. In this case, the supporting substrate 19 shown in FIG. 16F in the first operation is performed before or partially in parallel. Same as above Series The semiconductor substrate 11s separated by the operation of ₀ Consists of. And the second work In The supporting substrate 19 shown in FIG. Parallel The semiconductor substrate 11s separated in the first work performed ₁ Consists of.
[0082]
In this way, for example, in the manufacture of the SOI substrate, the semiconductor substrate 11s (11s generated by the separation of the semiconductor substrate 11 left in other operations, that is, the separation is generated. ₀ , 11s ₁ ... Are used as the carrier substrate 19.
[0083]
Note that the semiconductor substrate 11s used as the carrier substrate 19 in this case is not limited to the case where the semiconductor substrate generated by the series of steps described with reference to FIGS. 16A to 16G as described above is used, and is separated. The semiconductor substrate 11s can be used as the carrier substrate 19 with respect to the semiconductor substrate 11s reduced to a required thickness by performing the above-described series of operations a plurality of times using the semiconductor substrate 11s again as the initial semiconductor substrate 11.
[0084]
Note that the annealing for forming the cavity layer 13 and the single crystal semiconductor layer 14 in the present invention is performed under normal pressure or reduced pressure. ₂ In addition to annealing in a gas atmosphere, as described above, annealing can be performed in a group 8 element gas in a vacuum or in a periodic table of He, Ne, Ar, Kr, or the like.
[0085]
In each example described above, the anodizing apparatus is the case where the single tank structure of FIG. 2 is used, but the two tank structure anodizing apparatus described in FIG. 1 can be used.
[0086]
In the above-mentioned anodization, peeling of the semiconductor, for example, Si from the substrate side may occur due to large-current energization, long-time energization, etc., and this Si waste may adhere to the electrolyte bath. In this case, after removing the substrate 11, unnecessary semiconductor waste such as Si can be removed by etching by injecting hydrofluoric acid into the tank instead of the electrolytic solution.
In each of the above examples, the semiconductor film 17 and the single crystal semiconductor layer 14 are separated from the semiconductor substrate 11 by applying an external force that separates them from each other. In this case, the separation can be performed by vacuum adsorption as described above. it can. Alternatively, it can be separated by breaking the cavity layer by ultrasonic vibration.
[0087]
Moreover, a porous layer can be easily formed by performing anodization in the electrolytic solution containing hydrogen fluoride and ethanol, or the liquid mixture of hydrogen fluoride and methanol. In this case, when changing the current density of the anodization, the range of adjusting the porosity is further increased by changing the composition of the electrolytic solution.
[0088]
In addition, when light is irradiated during anodization, unevenness on the surface of the porous layer is remarkably generated, and the crystallinity of the epitaxial semiconductor film is deteriorated. This can reduce or avoid the unevenness, and an epitaxial semiconductor film having good crystallinity can be formed.
[0089]
Further, as described above, in the present invention, the single crystal semiconductor layer 14, the single crystal semiconductor layer 14 and the semiconductor film 17 formed thereon, or the semiconductor film 17 formed on the porous layer 12, For example, a thin film semiconductor is formed, and each semiconductor film 17 is formed by epitaxial growth. In particular, when this semiconductor film 17 is epitaxially grown on the single crystal semiconductor layer 14, a semiconductor having excellent crystallinity. A film 17 can be formed. However, the semiconductor film 17 is not limited to an epitaxially grown film, and can be formed of a polycrystalline layer, an amorphous layer, or a mixture thereof as described above.
[0090]
Further, when a silicon Si film is formed as the semiconductor film 17, in order to obtain a Si film having excellent surface smoothness, a chlorine-based gas SiCl is used as a source gas for supplying Si. _Four , SiHCl _Three , Si ₂ H ₂ Cl ₂ For example, in order to generate fine irregularities on the surface in order to increase the light receiving efficiency as in a solar cell, etching with HCl prior to the formation of the semiconductor film, followed by the silane gas SiH _Four , S ₂ H ₆ It is preferable to perform film formation by, for example.
[0091]
In the semiconductor substrate (semiconductor substrate 16) according to the present invention described above, the semiconductor substrate 11 has a structure in which the columnar body 15 is formed with the single crystal semiconductor layer 14 via the cavity layer 13 that exists as a support column. However, since the strength of the hollow layer 13 can be reliably set by selecting the thickness of the connecting columnar body 15 or the like, in some cases, various usage modes of the hollow layer 13 or the columnar body 15 themselves are possible. Further, even when this cavity layer 13 is used as a separation layer separated from the single crystal semiconductor layer 14, for example, in handling, the inconvenience that the cavity layer 13 is inadvertently broken is effective. In In addition, when separation is required, the strength can be selected so as not to be excessive or deficient so that the separation can be surely performed over the entire area of the cavity layer 13. Therefore, a thin film semiconductor and a semiconductor device such as an SOI, a solar cell, and an integrated circuit using the semiconductor substrate 16 can be easily and reliably configured with a high yield.
[0092]
In addition, according to the manufacturing method of the present invention, the cavity layer 13 and the single crystal semiconductor layer 14 are formed by the formation and annealing of the porous layer. The formation conditions of the porous layer and the selection of the annealing conditions are selected. Thus, the strength of the cavity layer 13, that is, for example, the thickness of the columnar body can be selected, so that the separation strength can be easily and reliably selected according to the purpose of use of the semiconductor substrate 16.
[0093]
In the method of the present invention, as described above, after the anodization, the cavity layer and the single crystal semiconductor layer are formed by annealing, and the subsequent epitaxial growth of the semiconductor film or the like on the surface of the porous layer or the single crystal semiconductor layer is, for example, Since the CVD method can be performed at a temperature of 700 ° C. to 1200 ° C., in this case, the thickness of the cavity layer and the single crystal semiconductor layer selected by selecting the annealing conditions is performed by forming the film at a temperature lower than the annealing temperature. In addition, the porosity such as the thickness and density of the columnar body in the hollow layer can be prevented from fluctuating due to the formation of a semiconductor film or the like.
[0094]
In addition, according to the manufacturing method of the present invention, the semiconductor substrate 11 constituting the semiconductor substrate 16 has the remaining semiconductor substrate after separation of the single crystal semiconductor layer 14 and the semiconductor film 17 from the semiconductor substrate 11 in the cavity layer 13. For example, the surface is again used as a semiconductor substrate 11 for obtaining the semiconductor substrate 16 by polishing the surface thereof by electrolytic polishing or the like, or the thickness reduced by the formation of the semiconductor substrate 16 is compensated by epitaxial growth. Since it can be used repeatedly many times, and as described above, it can be used as the carrier substrate 19, it can be manufactured at low cost.
[0095]
In addition, according to the manufacturing method of the present invention, a substrate such as a printed circuit board is bonded as a supporting substrate 19 on a semiconductor film, and the substrate and the semiconductor film are integrated, and then peeled off from the semiconductor substrate 11. Therefore, the type of the carrier substrate 19 is not limited, and a thin film single crystal is formed on a substrate such as a metal plate, ceramic, glass, resin, etc., which has never been considered by conventional common sense of semiconductor technology. A semiconductor can be formed or a solar cell can be formed.
[0096]
【The invention's effect】
As described above, according to the present invention, it is possible to easily and inexpensively provide a semiconductor substrate having an optimum strength and structure according to various uses and modes.
Therefore, it is possible to produce an industrially important effect that various semiconductor devices can be manufactured in a mass production, with a high yield, with a high yield, and therefore with a low cost.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of an example of an anodizing apparatus for carrying out the method of the present invention.
FIG. 2 is a configuration diagram of another example of an anodizing apparatus for carrying out the method of the present invention.
3A to 3D are process diagrams of one manufacturing method for obtaining a semiconductor substrate according to the present invention.
FIG. 4 is a cross-sectional view of an example of a semiconductor substrate according to the present invention.
FIG. 5 is an SEM image of an example of a semiconductor substrate according to the present invention.
FIG. 6 is an SEM image of another example of a semiconductor substrate according to the present invention.
FIG. 7 is a further enlarged SEM image of an example of a semiconductor substrate according to the present invention.
FIG. 8 is a further enlarged SEM image of another example of a semiconductor substrate according to the present invention.
FIG. 9 is a diagram showing a structure of a hole in a cavity layer for explaining the present invention.
FIG. 10 is a view showing a structure of a hole in a cavity layer for explaining the present invention.
FIGS. 11A and 11B are process diagrams of an example of a method of manufacturing a thin film semiconductor according to the present invention. FIGS.
12A to 12E are process diagrams of an example of a method for manufacturing an SOI substrate according to the present invention.
13A to 13D are process diagrams of an example of a method for manufacturing an integrated circuit device according to the present invention.
14A to 14C are solar cells according to the present invention. Made of It is process drawing (the 1) of an example of a manufacturing method.
FIG. 15 D and E are solar cells according to the invention Made of It is process drawing (the 2) of an example of a manufacturing method.
16A to 16G are process diagrams of another example of a method for manufacturing an SOI substrate according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Electrolytic solution tank, 1A 1st tank, 1B 2nd tank, 1H opening, 2 DC power supply, 3A, 3B electrode, 11 Semiconductor substrate, 12 Porous layer, 13 Cavity layer, 14 Single crystal semiconductor layer, 15 Columnar shape Body, 16 semiconductor substrate, 17 semiconductor film (or material film), 18 insulating layer, 19 carrier substrate, 20 SOI substrate, 21 adhesive, 26 insulating film, 27 thin film semiconductor, 37 electrode or wiring, 41 conductive line, 51 separation Insulating layer, 52 Gate insulating film, 53 Gate electrode, 54 Side wall, 55 Semiconductor region, 56 First interlayer insulating layer, 57 First wiring layer, 58 Second interlayer insulating layer, 59 Second wiring layer, First semiconductor film, 132 Second semiconductor film, 133 Third semiconductor film, 171 First semiconductor film, 172 Second semiconductor film, 173 Third semiconductor film

Claims (1)

On the semiconductor substrate, through a hollow layer in which a plurality of columnar bodies are present dispersed single-crystal semiconductor layer is formed, the porous layer is formed on the single crystal semiconductor layer, the porous layer, A semiconductor substrate characterized in that a required material film is formed.

Images