JPH10242227A - Method and apparatus for automated macro test of wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To automate the visual test of a pattern on a wafer. SOLUTION: The automatic macro tester comprises an image detector 16 having a poor-resolution tester 10, coat/poor-development tester 12 and defect tester 14, and image processor 18. The tester 10 is to detect a poor resolution of a pattern. The tester 12 is to detect a poor coat and poor development of the pattern. The tester 14 is to detect the presence or absence of a defect in the pattern. The images detected by the testers 10, 12, 14 are sent to the processor 18 for processing the images to judge the pattern whether good or not from the processing result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer inspection method and apparatus for inspecting a pattern formed on a wafer after a photolithography step or an etching step in a semiconductor manufacturing process.

[0002]

2. Description of the Related Art In a semiconductor manufacturing process, after a resist pattern is formed in a photolithography process or after a pattern is formed in an etching process, it is necessary to inspect the state of the formed pattern. For example, with respect to the resist pattern, an inspection for a coat failure such as whether or not the resist is uniformly coated is performed. In addition, after the exposure of the pattern, a development state inspection for inspecting whether development has been performed uniformly and an inspection for resolution failure for checking whether exposure of the pattern is performed normally are performed. Further, the formed pattern is inspected for scratches. As for the etching pattern, it is examined whether or not the etching is performed uniformly, or whether or not there is a flaw. Conventionally, there are mainly the following two methods for performing these appearance inspections.

A first method is a method called a micro inspection method in which a part of a pattern is magnified using a metal microscope or the like, and the actual state of pattern formation is visually judged. According to this method, it is possible to observe a part on the wafer and inspect it in detail. However, recently, with pattern miniaturization, it has become difficult to discriminate patterns even when enlarged with a metallographic microscope. In addition, since a place to be enlarged and observed is limited, a defective product detection rate is reduced, and it takes a long time to widen the place to be observed.

The second method is a method of irradiating the entire surface of a wafer with illumination means from various angles to project color unevenness on the wafer. If there is an abnormality in the pattern formed on the wafer, the color unevenness projected on the wafer looks different in color and brightness from the color unevenness due to the normal pattern, so that it is possible to detect the presence of a defective portion. . A method in which the operator visually observes the color unevenness and judges the quality of the pattern is called a macro inspection method. The occurrence of color unevenness is due to irregular reflection caused by a step of about 1 μm to several μm in the pattern on the wafer.

The macro inspection method is a method for observing the entire surface of a wafer, and is therefore an effective method for detecting a defective state which occurs only in a part of the wafer, such as uneven resist or uneven development. As described above, the macro inspection method that observes a relatively large area as a whole can increase the defective product detection rate and shorten the working time, compared to the micro inspection method that performs detailed observation at each point. Can be. Therefore, the importance of the macro inspection method has recently been increasing.

[0006]

However, conventionally,
Since the macro inspection is performed visually, there is a problem that the visually observed color non-uniformity and flaws change depending on the angle of inclination of the wafer with respect to the illumination and the angle viewed by the operator. Therefore, the criteria for determining a defective product are ambiguous.

[0007] Further, since this inspection is always performed every time a pattern is formed, it is necessary to perform a large number of inspections several tens of times before the wafer process is completed for one product. Therefore, the work efficiency has been significantly reduced.

[0008] Further, since the change in the height difference occurring in the defective coat portion and the defective development portion is relatively gentle, it can be reflected as a change in color unevenness. However, when there is a problem in the shape of the pattern as in the case of poor resolution and the change in height difference is rapid and the degree of change is delicate, it is difficult to display color unevenness.

Further, when a surface image of a wafer is detected by a camera, it is necessary to take an image obliquely with respect to the wafer in order to prevent the image of the camera itself reflected on the wafer from being detected. However, if the image is taken obliquely with respect to the wafer in this manner, a focus shift occurs between the near side and the far side with respect to the camera. Then, a perspective difference occurs and the pattern looks distorted. There is no problem if the image always looks distorted, but the degree of distortion easily changes due to disturbance such as slight displacement of the wafer. Therefore, the image of the underlying pattern becomes unstable, and an accurate inspection of the pattern formed on the underlying pattern to be originally inspected cannot be performed.

Further, when the wafer is illuminated obliquely, the amount of illuminated light varies depending on the distance to the illumination. Therefore, since the surface of the wafer is not uniformly irradiated with light, the appearance of color unevenness or the like appears different depending on the position on the wafer. There is no problem if the irradiation is always performed in the same manner, but the irradiation state can easily change due to a positional shift of the wafer or the like. Therefore, the manner in which the underlying pattern is reflected becomes unstable, and an accurate inspection of the pattern formed on the underlying pattern to be originally inspected cannot be performed.

Further, the flaw formed on the pattern is regarded as a line. Even if such a line is detected by an image processing device or the like, it is difficult to recognize the line separately from other patterns due to the small number of pixels. Also, if there is a disturbance element or the like, it is disturbed.

Therefore, there has been a demand for a macro inspection method and a macro inspection apparatus for a wafer, which have a constant pattern of judgment on the quality of a pattern and can perform an inspection efficiently.

[0013]

Therefore, according to the wafer macro inspection method of the present invention, the illumination unit irradiates inspection light toward the wafer, and the detection unit illuminates the surface of the wafer under illumination of the inspection light. Detecting an image, analyzing the surface image detected by the image processing unit, and performing a visual inspection of a pattern formed on the surface of the wafer. In the image analysis, the detecting unit detects the surface image of the reference wafer as a reference image, and stores the reference image in an image memory unit. Detecting, reading the reference image from the image memory unit, comparing the reference image with the image to be inspected, and determining the quality of the wafer to be inspected according to a result of the comparison. Characterized in that it comprises a step.

As described above, the surface image of the wafer is detected by the detection unit, and the detected surface image is analyzed by the image processing unit. Then, by detecting the reference image and the image to be inspected and comparing these images, the pattern formed on the reference wafer serving as the inspection standard is compared with the pattern formed on the wafer to be inspected. be able to. Therefore, it is possible to perform an appearance inspection for a defective resolution of the wafer.
Then, for example, if the detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be performed automatically.

In the macro inspection method for a wafer according to the present invention, preferably, the detection of the reference image is performed by setting a reference area on the reference wafer, and the inspection light is incident on the set reference area. Preferably, the method includes the steps of adjusting the relative position between the reference wafer and the illumination unit so that the angle becomes constant, and detecting the surface image of the reference area as the reference image by the detection unit.

As described above, the surface area on the reference wafer is divided into partial areas called reference areas, and the surface image of each reference area is detected. When detecting the surface image of the reference area,
The inclination of the reference wafer with respect to the illumination is adjusted so that the inspection light is incident on each reference area at a fixed angle. By doing so, the same uniform illumination can be performed on each area on the reference wafer, so that the appearance of the color unevenness becomes constant.

In the wafer macro inspection method according to the present invention, preferably, the detection of the surface image of the inspected wafer is performed by setting an inspected area on the inspected wafer; Adjusting the relative position between the wafer to be inspected and the illumination unit so that the incident angle of the inspection light is constant, and detecting the surface image of the inspection area as the image to be inspected by the detection unit. It is good to do it with steps.

As described above, the surface area on the wafer to be inspected is divided into each partial area called the area to be inspected, and the surface image of each area to be inspected is detected. When detecting the surface image of the inspection area, the inclination of the inspection wafer with respect to the illumination is adjusted so that the inspection light is incident on each inspection area at a fixed angle. In this manner, similar uniform illumination can be performed on each region of the wafer to be inspected, so that the appearance of color unevenness is constant.

In the macro inspection method for a wafer according to the present invention, it is preferable that the comparison is performed by performing an edge enhancement process on the stored reference image, and the edge enhancement process be performed on each pixel constituting the edge enhanced reference area. Counting the number of pixels equal to or less than the first lightness difference and the number of pixels equal to or more than the second lightness difference as a reference value, and recording the reference value in the first memory means; Performing edge enhancement processing on the inspection image; and inspecting the number of pixels equal to or less than the first lightness difference and the number of pixels equal to or greater than the second lightness difference of each of the pixels constituting the inspection image after the edge enhancement processing. Counting the value as a value and recording the value to be inspected in a second memory means; reading the reference value and the value to be inspected from the first and second memory means, respectively; Good done with comparing the test value.

As described above, the reference image and the image to be inspected corresponding to the reference image are subjected to edge enhancement processing, and the number of pixels within a certain brightness difference range is counted. Then, by comparing the number of pixels obtained for each image,
The similarity between these images can be obtained.

According to the macro inspection method for a wafer of the present invention, the illumination unit irradiates the wafer with the inspection light, and the detection unit detects the surface image of the wafer under the illumination of the inspection light. The processing unit analyzes the detected surface image, and performs an appearance inspection of a pattern formed on the surface of the wafer.When inspecting a coating defect and a development defect of the pattern, the analysis of the surface image is performed by: Detecting the surface image of the reference wafer as a reference image by the detection unit, storing the reference image in an image memory unit, and detecting the surface image of the inspection target wafer as the inspection image by the detection unit. Reading the reference image from the image memory unit, comparing the reference image with the image to be inspected, and determining whether the wafer to be inspected is good or bad according to a result of the comparison. Tsu, characterized in that it comprises a flop.

As described above, the surface image of the wafer is detected by the detection unit, and the detected surface image is analyzed by the image processing unit. Then, by detecting the reference image and the image to be inspected and comparing these images, the pattern formed on the reference wafer serving as the inspection standard is compared with the pattern formed on the wafer to be inspected. be able to. Therefore, it is possible to inspect the appearance of the coating failure and the development failure of the wafer. Then, for example, if the detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be performed automatically.

In the macro inspection method for a wafer according to the present invention, preferably, the comparison is performed by setting a reference template in the stored reference image, and the brightness distribution of each pixel constituting the set reference template is determined. Recording in a first memory means as a reference distribution;
Setting a template to be inspected in an area of the detected image to be inspected corresponding to the reference template; and recording the brightness distribution of each pixel constituting the template to be inspected as the distribution to be inspected in the second memory means. And reading the reference distribution and the distribution under inspection from the first and second memory means, respectively, and comparing the reference distribution and the distribution under inspection.

As described above, a template is set for each of the reference image and the corresponding image to be inspected, and the templates are matched. The matching is performed by calculating the brightness distribution of each template based on a conventionally known method. Then, by comparing the brightness distributions obtained for the respective templates to obtain the similarity (correlation rate), the coincidence rate of these templates can be obtained.

In the wafer macro inspection method according to the present invention, preferably, the setting of the reference template or the inspection target template is performed on the entire surface of the detected reference wafer or the detected inspection target wafer. A step of setting a pattern forming area in an image, a step of creating a grid area by dividing the pattern forming area into a grid, and the grid area excluding a non-inspection area is the reference template or the inspection target template. It is good to carry out with the step of doing.

The non-inspection area is an area unrelated to the product, unlike the inspection area in which the chip is formed. Normally, the non-inspection area often contains prints, scratches, and the like. If the non-inspection area is included in the matching target, even if the formed pattern is normal, it is determined that the pattern is different from the reference wafer, and the pattern formed on the wafer is determined to be abnormal. When the template is set as described above, a template from which the non-inspection area on the wafer is excluded can be set.

According to the macro inspection method for a wafer of the present invention, the illumination unit irradiates the inspection light toward the wafer, and the detection unit detects the surface image of the wafer under the illumination of the inspection light. When the processing unit analyzes the detected surface image and performs a visual inspection of the pattern formed on the surface of the wafer, and inspects the pattern for flaws, the analysis of the surface image includes the detection unit. Detecting the surface image of the reference wafer as a reference image and storing the reference image in an image memory unit; detecting the surface image of the wafer to be inspected as the image to be inspected by the detection unit; Reading the reference image from the section, comparing the reference image with the image to be inspected, and determining whether the inspected wafer is good or bad according to a result of the comparison. And butterflies.

As described above, the surface image of the wafer is detected by the detection unit, and the detected surface image is analyzed by the image processing unit. Then, by detecting the reference image and the image to be inspected and comparing these images, the pattern formed on the reference wafer serving as the inspection standard is compared with the pattern formed on the wafer to be inspected. be able to. Therefore, it is possible to inspect the appearance of the scratch on the wafer. Then, for example, if the detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be performed automatically.

In the wafer macro inspection method according to the present invention, preferably, the detection of the reference image and the detection of the image to be inspected are performed in the extending direction of a grid line formed on the reference wafer or the wafer to be inspected. And the direction perpendicular to the inspection light generation surface of the illumination unit, substantially 45
It is good to do it at an angle of °.

Since the flaw is detected as a line, the number of pixels in an area corresponding to the detected flaw becomes very small. Therefore,
When inspecting for flaws, it is necessary to make the dark field as low as possible to reduce the contrast and to make it stand out from other patterns on the underlying pattern. In addition, grid lines formed as boundaries between chips on a wafer can also cause confusion in inspection. In order to detect the reflected light from the grid line as little as possible, it is preferable to irradiate the inspection light at an angle of 45 ° with respect to the extending direction of the grid line.

In the macro inspection method for a wafer according to the present invention, preferably, the comparison is performed by performing an edge enhancement process on the stored reference image; Counting the number of pixels equal to or less than the first brightness difference and the number of pixels equal to or greater than the second brightness difference as reference values, and recording the reference values in a first memory means; Performing an edge enhancement process on the target image, and using the number of pixels equal to or less than the first brightness difference and the number of pixels equal to or greater than the second brightness difference as the inspection value for each of the pixels forming the inspection image after the edge enhancement process. Counting and recording the inspected value in a second memory means; reading the reference value and the inspected value from the first and second memory means, respectively; It is good to do with the step of comparing.

As described above, the reference image and the image to be inspected corresponding to the reference image are subjected to the edge enhancement processing, and the number of pixels within a certain brightness difference range is counted. Then, by comparing the number of pixels obtained for each image,
The similarity between these images can be obtained.

Next, according to the automatic wafer macro inspection apparatus of the present invention, there is provided a wafer inspection apparatus used for inspecting the appearance of a pattern formed on the surface of a wafer, wherein a surface image of a wafer to be inspected and a surface image of a reference wafer. And an image detector for detecting the reference image and the image to be inspected as an image to be inspected and a reference image, respectively, and an image for judging pass / fail of the wafer to be inspected according to a result of the comparison. In an automatic wafer macro inspection device equipped with a processing unit,
The image detection unit includes a resolution failure inspection unit that inspects the pattern for resolution failure.

As described above, there are provided an image detecting section for detecting the surface image of the wafer and an image processing section for analyzing the detected surface image. The image detection unit includes a resolution failure inspection unit that performs a resolution failure inspection, and the image detected by the inspection unit is processed by the above-described image processing unit. Therefore, an appearance inspection for a wafer resolution defect can be performed. Further, for example, if the image detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be automatically performed.

In the automatic wafer macro inspection apparatus according to the present invention, preferably, the resolution defect inspection section includes a diffuse illumination for irradiating the surface of the wafer with diffused light and a second illumination for detecting the surface image of the wafer. Preferably, the apparatus includes a detecting section and a supporting section for supporting the wafer.

Poor resolution of the pattern can be examined by color unevenness projected on the wafer surface. Color unevenness is easier to see when light is irradiated on the wafer as uniformly as possible. When illumination that is not uniformly irradiated with light, such as spot light, is used, uneven illumination occurs because the surface of the wafer is mirror-like. Therefore, it becomes impossible to distinguish between color unevenness and illumination unevenness.

As described above, by irradiating the surface of the wafer with diffused light and detecting the surface image by the first detection unit,
It is possible to inspect a pattern formed on the surface of the wafer for poor resolution. As the first detection unit, for example, an imaging unit using photoelectric conversion may be used.

In the automatic wafer macro inspection apparatus according to the present invention, preferably, the support section has a mechanism for adjusting a relative position of the wafer with respect to the diffuse illumination.

When observing color unevenness by irradiating the wafer with diffuse illumination, the pattern formed differs depending on the type and process of the wafer, and the light reflection state differs. Therefore, it is necessary to change the irradiation angle suitable for the pattern according to the type and the process. In the configuration of the present invention, since the supporting portion has a function of adjusting the attitude of the wafer, it is possible to set an appropriate irradiation angle.

Further, in the automatic wafer macro inspection apparatus of the present invention, preferably, the diffuse illumination has a function of changing an amount of light to be irradiated according to a type of the wafer and a pattern formed on the wafer. Is good.

According to the automatic wafer macro inspection apparatus of the present invention, there is provided a wafer inspection apparatus for use in inspecting the appearance of a pattern formed on a surface of a wafer, wherein a surface image of a wafer to be inspected and a surface image of a reference wafer are obtained. And an image detection unit for detecting the reference image and the image to be inspected as an image to be inspected and a reference image, respectively. In the automatic wafer macro inspection device with
The image detection unit includes a coating / development defect inspection unit that inspects the pattern for coating defects and development defects.

As described above, an image detecting section for detecting the surface image of the wafer and an image processing section for analyzing the detected surface image are provided. The image detection unit includes a coating / development defect inspection unit for inspecting a coating defect and a development defect, and an image detected by the inspection unit is processed by the above-described image processing unit. Therefore, it is possible to inspect the appearance of the coating failure and the development failure of the wafer. Further, for example, if the image detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be automatically performed. Also,
In the automatic wafer macro inspection apparatus of the present invention, preferably, the coating / development defect inspection unit includes a diffuse illumination that irradiates a diffused light to a surface of the wafer, and a second detection unit that detects the surface image of the wafer. And a support for supporting the wafer.

The defective coating and defective development of the pattern can be examined by the color unevenness projected on the wafer surface. Therefore, by irradiating the surface of the wafer with diffused light, the second
By detecting the surface image by the detection unit, it is possible to inspect a coating failure or a development failure of the pattern formed on the surface of the wafer. As the second detection unit, for example, an imaging unit using photoelectric conversion may be used.

In the automatic wafer macro inspection apparatus according to the present invention, preferably, the diffuse illumination has a function of changing an amount of light to be irradiated according to a type of the wafer and a pattern formed on the wafer. Is good.

In the automatic wafer macro inspection apparatus according to the present invention, preferably, the diffused light is reflected toward the surface of the wafer, and the diffused light reflected from the surface of the wafer is reflected by the second detector. It is better to have a half mirror that transmits light to the side.

By using such a half mirror, it is possible to irradiate the wafer with uniform diffused light, and to detect the illumination light reflected on the wafer by the second detector. Further, if this half mirror is provided between the imaging means of the image detection unit and the wafer, it is possible to prevent the image of the imaging means from being detected.

According to the automatic wafer macro inspection apparatus of the present invention, there is provided a wafer inspection apparatus used for inspecting the appearance of a pattern formed on a surface of a wafer, wherein a surface image of a wafer to be inspected and a surface image of a reference wafer are obtained. And an image detection unit for detecting the reference image and the image to be inspected as an image to be inspected and a reference image, respectively. In the automatic wafer macro inspection device with
The image detection unit includes a flaw inspection unit that inspects the pattern for flaws.

As described above, an image detecting unit for detecting the surface image of the wafer and an image processing unit for analyzing the detected surface image are provided. The image detection unit includes a flaw inspection unit that performs flaw inspection, and the image detected by the inspection unit is processed by the above-described image processing unit. Therefore, it is possible to inspect the appearance of a scratch on the wafer. Also, for example,
If the image detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be performed automatically.

In the automatic wafer macro inspection apparatus according to the present invention, preferably, the flaw inspection unit includes a spot illumination for irradiating a spot light on a surface of the wafer, and a third detection for detecting the surface image of the wafer. And a support for supporting the wafer.

Since the flaws formed in the pattern are considered to be extremely thin groove-like foreign substances, the use of spot light having directivity as illumination rather than faint diffused light causes strong irregular reflection at the groove. It is easy to detect. At this time, since the flaw is observed as shining white, the background color is preferably dark.

As described above, by irradiating the spot light on the surface of the wafer and detecting the surface image by the third detection unit, it is possible to inspect whether or not the pattern formed on the surface of the wafer is flawed. . As the third detection unit, for example, an imaging unit using photoelectric conversion may be used.

[0052] In the automatic wafer macro inspection apparatus of the present invention, preferably, the support section has a mechanism for adjusting a relative position of the wafer with respect to the diffused illumination.

As described above, since the support section has the function of adjusting the attitude of the wafer, the irradiation angle can be set to a type and a process.

Further, in the automatic wafer macro inspection apparatus of the present invention, preferably, the spot illumination has a function of changing an amount of light to be irradiated according to a type of the wafer and a pattern formed on the wafer. Is good.

In the automatic wafer macro inspection apparatus according to the present invention, preferably, an extending direction of a grid line formed on the reference wafer or the inspection target wafer is as follows:
It is preferable that the spot illumination is provided such that a direction perpendicular to the inspection light generating surface of the illumination unit is substantially 45 °.

Since the flaw is detected as a line, the number of pixels in an area corresponding to the detected flaw is very small. Therefore,
When inspecting for flaws, it is necessary to make the dark field as low as possible so as to lower the contrast so that the pattern is distinguished from other patterns on the underlying pattern. If illumination strikes a grid line formed as a boundary between chips on a wafer and is strongly reflected, it cannot be distinguished from illumination reflected by flaws, and it is difficult to detect flaws. Therefore, in order to detect the reflected light from the grid line as little as possible, the inspection light is irradiated from an angle of 45 ° with respect to the extending direction of the grid line.

[0057]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. It should be noted that the drawings schematically show the configuration, size, and arrangement relationship to the extent that the present invention can be understood, and the conditions such as numerical values described below are merely examples, and therefore, The present invention is not limited to this embodiment at all.

The automatic wafer macro inspection apparatus is used for inspecting the appearance of a pattern formed on the surface of a wafer. FIG. 1 is a block diagram illustrating a configuration of an automatic wafer macro inspection apparatus according to an embodiment. As shown in FIG. 1, this configuration example includes an image detection unit 16 and an image processing unit 18.
With The image detection unit 16 is a device for detecting a surface image of a wafer to be inspected (a wafer to be inspected) and a surface image of a reference wafer (a wafer serving as an inspection reference) as an image to be inspected and a reference image, respectively. Further, the image processing unit 18 is a device for comparing the detected reference image and the image to be inspected, and for determining the quality of the wafer to be inspected according to the result of the comparison.

The image detecting section 16 shown in FIG. 1 includes a resolution defect inspection section 10, a coating / development defect inspection section 12,
And a flaw inspection unit 14. Resolution failure inspection unit 10
Is an apparatus for inspecting pattern resolution failure. coat·
The development defect inspection unit 12 is a device that inspects a pattern coating defect and a development defect. Then, the flaw inspection unit 14
Is an apparatus for inspecting the pattern for scratches. The images detected by these inspection units 10, 12 and 14 are sent to a common image processing unit 18 and analyzed. Hereinafter, the image detecting unit 16 will be described first, and then the image processing unit 18 will be described.
Will be described.

[Image Detecting Section] The inspection sections 10, 12, and 14 will be sequentially described below.

<Configuration of Resolution Failure Inspection Unit> First, the resolution failure inspection unit 10 will be described. FIG. 2 shows a resolution defect inspection unit 1.
FIG. 2 is a diagram showing a configuration of a reference numeral 0, and is referred to in conjunction with FIG. FIG.
2A shows a front view, and FIG. 2B shows a side view. The defective resolution inspection unit 10 shown in FIG. 1 is a diagram viewed from a position corresponding to FIG.

As described above, the defective resolution inspection section 10 is an apparatus for inspecting a pattern formed on the surface of a wafer for defective resolution. As shown in FIGS. 1 and 2, the defective resolution inspection unit 10 includes a diffuse illumination 20 that irradiates diffuse light to the surface of the wafer, a first detection unit 22 that detects a surface image of the wafer,
And a support portion 24 for supporting the wafer.

A tilt type wafer chuck is used as the support portion 24, and the wafer 26 is attracted to the chuck. The wafer 2 is moved by the tilt type wafer chuck 24.
6 can be tilted in an arbitrary direction, and has a function of rotating around the center of the chuck. As described above, the support unit 24 has a mechanism for adjusting the relative position of the wafer with respect to the diffused illumination 20. Thus, the attitude of the wafer 26 can be set freely. 2 shows a state in which the wafer 26 is inclined to the left side in the figure by a two-dot broken line.

The surface of the wafer 26 supported by the support portion 24 is irradiated with diffused light by the diffused illumination 20 during inspection. As the diffused illumination 20, a halogen light source having a light emitting surface in a line shape (wide shape) is used.
The diffuse illumination 20 is provided at a position obliquely above the wafer 26. Specifically, the diffused illumination 20 moves the wafer 26 in a direction along the optical axis of the first detector 22 of the wafer 26 (dashed line b in FIG. 2) by a distance corresponding to a length substantially equal to the diameter of the wafer 26. 26 are provided at a distance. The diffused illumination 20 is provided at a distance from the center of the wafer 26 in a direction perpendicular to the optical axis b by about 0.8 times the diameter of the wafer 26. The illumination width of the diffused illumination 20 is preferably at least about 1.8 times the diameter of the wafer 26.
The height and depth of the light emitting surface of the diffused illumination 20 may be appropriate.

Then, on the entire light emitting surface of the diffused illumination 20,
A white acrylic plate (a in FIGS. 1 and 2) is provided as a diffusion plate. An acrylic plate having a thickness of about 1 to 2 mm is used. As the diffusion plate, frosted glass may be used instead of the acrylic plate.

In this embodiment, the diffuse illumination 20 is configured so that the illuminance can be finely adjusted by remote control. By using this illuminance adjustment function, it is possible to carry out an inspection with an optimal illuminance suitable for each case, even when patterns formed due to differences in types of wafers, processes, and the like. Also, as described above, the diffuse illumination 20
The relative position between the wafer and the wafer 26 can be adjusted to an optimal position by the support portion 24, so that illumination can always be performed from an optimal direction with an optimal illuminance.

As described above, the surface of the wafer 26
At the time of inspection for resolution failure, diffused light is emitted by the diffused illumination 20. Then, the surface image of the wafer 26 is detected by the first detector 22 under this illumination. This detected surface image is
It is configured to be sent to the image processing unit 18.

As the first detector 22, a camera having a photoelectric conversion function is used. The first detector 22 is provided at a position above the center of the wafer 26. The first detector 22 includes a wafer 26 within a visual field captured by the detector 22.
Are separated from the wafer 26 by a distance that allows the entirety of the wafer 26 to be accommodated. This distance depends on the diameter of the wafer and the focal length of the camera lens, but is approximately 150-250 mm. First
An output terminal of the detection unit 22 is connected to an input terminal of the image processing unit 18.

The resolution defect inspection section 10 described above is provided with the first
Except for the detection unit 22, light other than the diffused illumination 20
6 is covered with an external light shielding box 28 made of black wall material to shield it from above. The external light shielding box 28 has an opening from which the first detector 22 detects the wafer 2.
6 can be observed.

<Principle of Detecting Resolution Failure> The principle of detecting a resolution failure will be described with reference to FIG. The cross section of FIG. 3 shows the wafer 26 and the resist 30 laminated on the surface. On the upper surface of the resist 30, a pattern having an uneven shape is formed as a result of the exposure. In FIG. 3, the normally expected pattern (normal pattern) is I
This is a pattern formed in the resist region (normal pattern portion) on the left side of the drawing from the line. On the other hand, the pattern formed in the resist region (defective pattern portion) on the right side in the figure from the J line is a defective pattern. In the case of the defective pattern in the figure, as shown at point B, the edge is rounded more than usual.

Point A in the figure is a plane area in the normal pattern portion of the resist 30. The light 1 incident on the point A from obliquely above is reflected at the same angle as the incident angle, and becomes the reflected light 2 shown in FIG. As described above, the light reflected on the resist surface in the normal pattern portion is reflected at the same reflection angle as the incident angle. Therefore, the positional relationship between the first detection unit (camera) 22 and the wafer 26 can be adjusted so that the light reflected by the normal pattern portion is not detected by the first detection unit 22.

The point B in the figure is at the surface position of the defective pattern portion of the resist 30. Point B differs from point A in that it is not a plane but a curved surface. Therefore, light 3 incident on point B at the same angle as light 1 is reflected as scattered light 4. A part of the scattered light 4 is also reflected by the camera 22 in the direction of the camera 22 above the wafer, and is detected by the camera 22. Therefore, in the normal pattern part and the defective pattern part,
There is a difference in the detected lightness (at the same time, color unevenness occurs due to the influence of light interference). By recognizing the difference in brightness, it is possible to detect a poor resolution.

The incident light 5 is reflected as scattered light 6 at the edge portion such as the point C in the normal pattern portion. However, since the edge of the point C is not rounded, the area where diffuse reflection occurs is only the narrow area of the point C. On the other hand, point B is a curved surface (actually, it is not a beautiful curved surface, but has many discontinuous portions), and therefore, there are many points that cause irregular reflection. Therefore, the ratio of reflecting the light toward the camera is higher in the defective pattern portion than in the normal pattern portion. That is, the scattered light 4 generated at the point B is more captured by the camera 22 than the scattered light 6 generated at the point C. Therefore, the presence of a bad pattern
It is detected as a difference in brightness.

<Structure of Coat / Development Failure Inspection Unit>
The coating / development failure inspection section 12 will be described. FIG.
FIG. 2 is a diagram illustrating a configuration of a coating / development failure inspection unit, which is also referred to in FIG. FIG. 4A shows a front view, and FIG.
(B) shows a side view. The coating / development defect inspection unit 12 shown in FIG. 1 is a diagram viewed from a position corresponding to FIG.

As described above, the coating / development failure inspection section 12 is an apparatus for inspecting a coating failure of a resist laminated on the surface of a wafer and a development failure of a pattern. As shown in FIGS. 1 and 4, the coat / development defect inspection unit 12 includes a diffuse illumination 32 that irradiates diffuse light to the surface of the wafer, a second detection unit 34 that detects a surface image of the wafer,
And a support portion 36 for supporting the wafer.

A fixed wafer chuck is used as the support portion 36, and the wafer 26 is sucked by the chuck. The surface of the wafer 26 supported by the fixed wafer chuck 36 is irradiated with diffused light by the diffused illumination 32 during inspection. As the diffuse illumination 32, surface illumination using an LED (light emitting diode) light source is used. Or,
As the diffused illumination 32, a cathode ray tube light source may be used.

The diffuse illumination 32 is provided at a position obliquely above the wafer 26. The position at which the diffused illumination 32 is provided is 10 to 50 mm from the wafer 26 in a direction along the optical axis of the second detection unit 34 of the wafer 26 (dashed line b in FIG. 4).
At a distance of Also, diffuse lighting 32
Is provided at a distance from the center of the wafer 26 in a direction perpendicular to the optical axis b by a distance corresponding to a length approximately 0.9 times the diameter of the wafer 26. It is preferable that both the illumination width and the illumination height of the diffuse illumination 32 be approximately 1.8 times or more the diameter of the wafer 26.

Then, a white acrylic plate (FIG. 1 and FIG. 4D) is provided as a diffusion plate on the entire light emitting surface of the diffusion illumination 32. Acrylic plate is 1-2m thick
m is used. As the diffusion plate, frosted glass may be used instead of the acrylic plate.

In this embodiment, the diffused illumination 20
Similarly to the above, the diffuse illumination 32 is configured so that the illuminance can be finely adjusted by remote control. Therefore, even when patterns formed due to differences in types of wafers, processes, and the like are different, inspection can be performed with an optimum illuminance according to each case.

As described above, the diffused light 32 irradiates the surface of the wafer 26 with the diffused light during the inspection. Then, under this illumination, the surface image of the wafer 26 is detected by the second detection unit 34. As the second detection unit 34, a camera having a photoelectric conversion function is used. Second detector 3
4 is provided at a position above the center of the wafer 26. Further, the second detection unit 34 is provided apart from the wafer 26 by a distance such that the whole of the wafer 26 is within the field of view captured by the detection unit 34. This distance varies depending on the diameter of the wafer and the focal length of the camera lens, but is approximately 500-600 mm.

Further, a half mirror 38 is provided between the wafer 26 and the second detector 34. The half mirror 38 reflects the diffused light emitted from the diffused illumination 32 toward the surface of the wafer 26, and transmits the diffused light reflected from the surface of the wafer toward the second detector 34. It is. The half mirror 38 is mounted on the wafer 26
Is set in a state where its mirror surface is inclined at an angle of 45 ° with respect to the surface of.

The diffuse light emitted from the diffuse illumination 32 is reflected toward the surface of the wafer 26 on the lower surface of the half mirror 38 (the surface e in FIG. 4B). As a result, the surface of the entire region of the wafer 26 is irradiated with the diffused light. The diffused light applied to the surface of the wafer 26 is reflected upward from the wafer 26. The reflected light passes through the half mirror 38 and is received by a second detection unit (camera) 34 provided above the wafer 26. Therefore, the wafer 26
Is detected.

Light emitted from the camera 34 toward the wafer 26 is transmitted to the upper surface of the half mirror 38 (f in FIG. 4B).
Since the light is reflected on the surface 26, it cannot reach the surface of the wafer 26. Therefore, the image of the camera 34 itself is not detected by the camera 34. Therefore, the image of the pattern on the wafer 26 is not obstructed by the image of the camera 34 itself.

The dimension of the half mirror 38 is such that the length in the lateral direction (the length in the direction perpendicular to the optical axis b in the plane of FIG. 4A) is at least 1.8 times the diameter of the wafer 26. And the length in the vertical direction (the length along the e-plane or the f-plane in FIG. 4B) is at least 2.5 times the diameter of the wafer 26.

The coating / development defect inspection section 12 described above
Is covered with an external light shielding box 28 made of black wall material in order to shield light other than the diffused illumination 32 from above the wafer 26 except for the second detection unit 34. In addition, outside light shielding box 2
8 has an opening from which the second detector 34
The wafer 26 can be observed.

<Principle of Detecting Coat Failure and Development Failure>
The principle of detecting a coating defect and a development defect will be described with reference to FIG. The cross section in FIG. 5 shows the wafer 26, a resist 40 laminated on the surface thereof and having a pattern already formed (hereinafter, a base pattern 40), and a resist 42 coated on the base pattern 40. .
Note that the resist 42 is not shown with hatching. Further, a pattern is actually formed on the resist 42 by exposure and development, but is not shown in FIG.

Coat defects and development defects are mainly caused by
Occurs due to gentle irregularities on the upper surface of the resist film. The light reflected on the upper surface of the base pattern 40 (secondary reflected light) and the light reflected on the upper surface of the resist 42 (primary reflected light) interfere with each other to generate color unevenness. If there are irregularities,
Since the optical path length difference of these lights changes, the color and pattern change depending on each location, and are detected as color unevenness. Then, a coating defect or a development defect is detected by detecting a difference in color unevenness between the reference wafer and the inspection target wafer.

As described above, the defect pattern is detected by utilizing the fact that the optical path length of the secondary reflected light is different depending on the film thickness, and as a result, the interference with the primary reflected light is different.
As shown in FIG. 5, the light 1 incident on the point A is separated into the primary reflected light 3 and the light 2 transmitted through the resist 42. The light 2 is reflected on the upper surface of the base pattern 40 and exits from the resist 42 to become the secondary reflected light 4. The secondary reflected light 4 propagates outside the resist 42 in a state parallel to the primary reflected light 3. At this time, since interference occurs between both lights,
The amplitude of the reflected light of light 1 changes. This change in amplitude is affected by a change in the phase of the secondary reflected light 4 caused by the optical path length C1 (a distance corresponding to half the distance that the light 2 propagates through the resist 42).

On the other hand, the light 5 incident on the point B is separated into the primary reflected light 7 and the light 6 propagating in the resist 42, like the light 1. Then, the light 6 is reflected outward from the resist 42 as the secondary reflected light 8 and interferes with the primary reflected light 7. Since the optical path length C2 (the distance corresponding to half the distance that the light 6 propagates through the resist 42) is different from the optical path length C1, the change in the phase of the secondary reflected light 8 is different from that of the secondary reflected light 4 described above. Are different. Therefore, the amplitude of the reflected light of the light 5 incident on the point B is different from the amplitude of the reflected light of the light 1 incident on the point A. Therefore, a difference in brightness occurs (the degree of interference varies depending on the wavelength, so that a difference in color occurs, to be precise). By detecting this difference in brightness,
Coat failure and development failure can be detected.

It is preferable that the diffused illumination 32 be capable of performing as uniform a diffused illumination as possible. Resolution failure inspection unit 1
0 is provided so as to irradiate the diffused light from obliquely above the wafer surface to generate diffused light having a certain directionality. The diffused illumination 32 of the defect inspection unit 12 is provided so that the diffused light is irradiated as uniformly as possible over the entire surface of the wafer. By irradiating the diffused light in this way, the difference in brightness (difference in color) due to interference is further amplified, and detection is facilitated.

<Structure of Flaw Inspection Unit> Next, the flaw inspection unit 1
4 will be described. FIG. 6 is a diagram illustrating the configuration of the flaw inspection unit 14, which is referred to in conjunction with FIG. FIG. 6A shows a front view, and FIG. 6B shows a left side view. The scratch inspection unit 14 shown in FIG. 1 is a diagram viewed from a position corresponding to FIG.

As described above, the flaw inspection unit 14 is an apparatus for inspecting the presence or absence of flaws in the resist laminated on the surface of the wafer. As shown in FIGS. 1 and 6, the flaw inspection unit 14 includes a spot illumination 44 that irradiates a spot light on the surface of the wafer, a third detection unit 46 that detects a surface image of the wafer, and a support that supports the wafer. Part 48.

As the supporting portion 48, an up / down type wafer chuck is used, and the wafer 26 is attracted to the chuck. The vertical wafer chuck 48 is capable of moving the wafer 26 in the vertical direction in the drawing, and has a function of rotating the chuck 26 around the center of the chuck. in this way,
The support section 48 has a mechanism for adjusting the relative position of the wafer with respect to the spot illumination 44. Thus, the installation height and rotation angle of the wafer 26 can be set freely. FIG.
The state in which the wafer 26 has been moved upward in the figure is indicated by the two-dot broken line.

At the time of inspection, the surface of the wafer 26 supported by the support portion 48 is irradiated with spot light by the spot illumination 44. As the spot illumination 44, line illumination using a halogen light source is used. In this embodiment, two spot lights 44a are used as the spot lights 44.
And 44b, which are provided on both sides of the wafer 26 so as to face each other. Therefore,
The surface of the wafer 26 is irradiated with spot light by two spot illuminations 44a and 44b.

The reason why the illumination is provided on both sides of the wafer is that if only one side of the illumination is used, the light hits the wafer non-uniformly, and the contrast of the pattern portion usually differs (this difference is small). This is because only the scratches cannot be brightly raised.

The spot illuminations 44a and 44b are provided obliquely above the wafer 26. The position where the spot illuminations 44a and 44b are provided
In the direction along the optical axis (dashed line b in FIG. 6) of the third detection unit 46, the position is separated from the wafer 26 by a distance of 0 to 30 mm. In addition, the spot illumination 44
From the center of the wafer 26 in a direction perpendicular to the optical axis b by a distance corresponding to a length of about 0.8 times the diameter of the wafer 26. Each of the spot lights 44a and 44b preferably has a light emitting surface sized to illuminate the entire surface of the wafer 26. The illumination width of the spot illumination 44 is preferably about 1.6 times or more the diameter of the wafer 26. The size and depth of the spot lighting 44 may be appropriate.

Further, in this embodiment, the spot illumination 44 is configured so that the illuminance can be finely adjusted by remote control. By using this illumination together with the above-mentioned upper and lower wafer chuck, inspection can be performed with the optimal illuminance suitable for each case even when patterns formed due to differences in wafer types and processes are different. Can be. That is, by setting the illumination angle (wafer height) and the illuminance suitable for the type (type / process) of the pattern, it is possible to always keep the image of the normal pattern portion with a small difference in brightness (semi-dark field). Yes, only scratches appear bright.

As described above, at the time of inspection, the surface of the wafer 26 is irradiated with spot light by the spot illumination 44. Then, under this illumination, the surface image of the wafer 26 is detected by the third detection unit 46. As the third detection unit 46, a camera having a photoelectric conversion function is used. Third
The detection unit 46 is provided at a position above the center of the wafer 26. In addition, the third detection unit 46 includes the detection unit 46
Are separated from the wafer 26 by a distance such that the entirety of the wafer 26 can be accommodated in the field of view captured by the camera. This distance depends on the diameter of the wafer and the focal length of the camera lens, but is approximately 150-250 mm.

The above-described flaw inspection unit 14 is, except for the third detection unit 46, for shielding the light other than the spot illumination 44 from above the wafer 26 from the outside light shielding box 28 made of black wall material. Covered with. The external light shielding box 28 has an opening, from which the third detecting unit 46 detects the wafer 2.
6 can be observed.

<Principle of Defect Detection> The principle of defect detection will be described with reference to FIG. The cross section of FIG.
6 and a resist 42 laminated on the surface thereof and having a pattern already formed.

In FIG. 7, the flaw h is represented as unevenness formed on the resist. Then, light is reflected by the slope part g of the resist 42 forming the unevenness,
Detects the presence or absence of scratches. Therefore, the detection of a flaw is basically the same as the detection of a poor resolution. However, the roundness of the edge of the defective pattern having a poor resolution is extremely small, less than 1 micron, and the number per unit area is large, for example, several thousand pieces are arranged in several millimeters square. In most cases, large irregularities ranging from one micron to several hundred microns exist as only one line. When detecting only one line as a defect, erroneous recognition may occur at the time of image processing unless other disturbance elements (such as a pattern image) are eliminated as much as possible. Because it is extremely small.) Therefore, when detecting a flaw, it is necessary to irradiate the wafer surface with intense light from a horizontal direction as much as possible, and capture the reflected light of only the flaw with a camera.

In FIG. 7, light 1 is incident on the surface of the resist 42 on which no flaw is formed. Light 1
Are reflected at the same angle as the incident angle. The light 2 is light that is incident on the inclined surface g of the flaw. The light 2 is reflected by the slope g and becomes scattered light 3. In the configuration example shown in FIG. 6, since the spot light is applied to the surface of the wafer 26 from a substantially horizontal direction, the camera 46 provided above the wafer 26 detects the light reflected other than the scratches. do not do. Therefore, the presence or absence of a flaw is detected.

The spot direction is set such that the direction in which the grid line formed on the reference wafer or the wafer to be inspected extends and the direction perpendicular to the inspection light generating surface of the illumination unit is substantially 45 °. Lighting 44 is provided. FIG.
FIG. 3 is a diagram showing a state where a wafer 26 and a spot illumination 44 are viewed from a viewpoint of a camera 46. On the wafer 26, boundary lines for separating chips (this is called a grid line) are provided in a grid pattern. Then, the extending direction of this grid line (x direction and y direction in FIG. 8),
Each light emitting surface of the spot lights 44a and 44b (s in FIG. 8)
The plane and the direction perpendicular to the t-plane) are inclined by 45 °. By arranging the wafer and the illumination in this manner, it is possible to prevent the illumination from hitting the grid line and being strongly reflected, and it is impossible to distinguish the illumination from the illumination reflected by the scratch.

[Image Processing Unit] Next, the image processing unit 18 will be described. The image processing unit 18 includes the inspection unit 10 described above,
Different processing is applied to each of the images detected in 12 and 14. Therefore, the image processing unit 18 is a device having a separate function for each of the inspection units 10, 12, and 14. In this embodiment, the function of the image processing unit 18 will be described for each inspection unit. Note that the image processing unit 18 may have a device configuration separated for each of these functions.

As shown in FIG. 1, the image processing unit 18
Denotes an image processing device 50, a monitor 52, and a personal computer for device control (hereinafter abbreviated as a personal computer).
54 and a control monitor 56 are provided as main components. As described above, the image processing device 50 performs different processing on the image detected by each inspection unit to perform analysis. The input ports of the image processing device 50 are connected to the cameras 22, 34 and 46 of the inspection units 10, 12 and 14, respectively.
Output terminals are coupled. The monitor 52 is used to display an image detected by each inspection unit and to display a processing result of the image processing device 50. The device control personal computer 54 is connected to the image processing device 50 by a communication cable 80, and can exchange data with the image processing device 50. In addition, the device control personal computer 54 is provided with a camera position, a wafer position, or
The illuminance of the illumination and the like are controlled based on the data obtained by the image processing device 50. If a control program is set in the personal computer 54, the macro inspection of the wafer is automatically performed. The control monitor 56 is a display device for displaying control contents and the like. Note that the image processing device 50 and the device control personal computer 54 may be configured as the same so-called computer device.

The automatic wafer macro inspection apparatus described in this embodiment is an apparatus that mainly executes the following four steps. That is, 1) a step of detecting a reference image, 2) a step of detecting an image to be inspected, 3) a step of comparing the reference image and the image to be inspected, and 4) a step of making a determination.

Inspection of the above-described defective resolution, defective coat, defective development, and flaws starts with detection of a reference wafer surface image (reference image). Then, this reference image is stored in the image memory unit. The pattern formed on the reference wafer (reference wafer) must be good. Only the determination of the quality of the pattern is performed by, for example, displaying the surface image on the monitor 52 and visually checking the operator.

Subsequently, the surface image of the inspection target wafer (inspection wafer) is detected as the inspection image. Then, the reference image stored in the image memory unit is called and compared with the detected image to be inspected. The comparison is performed by template matching, counting the number of pixels, or the like. According to the result of the comparison, the quality of the pattern formed on the wafer to be inspected is determined.

Incidentally, the above steps 2) and 3) may be repeatedly performed (for example, at the time of inspection for a defective resolution). Hereinafter, the image processing unit 18 will be sequentially described for each of the inspection units 10, 12, and 14.

<Image Processing for Insufficient Resolution Inspection> FIG. 9 is a block diagram showing the configuration of an image processing unit 18 that processes an image detected by the insufficiency in resolution inspection unit 10. As shown in FIG. 9, the image processing unit 18 includes an inspection area setting unit 58, a chuck control unit 60, an image memory unit 62, a comparison unit 64
And a determination unit 66.

The inspection area setting section 58 sets an inspection area in the surface area of the wafer to be inspected. In the inspection for the resolution failure, instead of detecting the surface image of the entire surface of the wafer at one time and comparing it with the reference image, the region on the wafer is divided into a plurality of regions, and each divided region is compared with the reference image. Make a comparison. That is, the camera 22 of the resolution defect inspection unit 10
Sequentially detects these divided areas as inspection areas. In this configuration example, the optical axis of the camera 22 is fixed.
The area on the wafer that is captured by is changed.

For this reason, the inspection area setting section 58 is input from outside with information such as how many areas to divide the area on the wafer to be inspected. In addition, not only the number of divided areas but also the non-inspection area on the wafer are input. These pieces of information are input by the operator through the personal computer 54 using input means such as a keyboard. On the basis of this information, the inspection area setting unit 58 controls other means.

The inspection area set on the reference wafer is called a reference area, and the inspection area set on the wafer to be inspected is called an area to be inspected to distinguish them. In this resolution defect inspection, a reference area detected in advance,
Compare with the inspection area corresponding to the reference area,
Judge the quality of the pattern formed in the inspection area,
Inspection is performed sequentially for each area.

The chuck control unit 60 controls the wafer chuck 24 based on a control signal sent from the inspection area setting unit 58 and a signal sent from another device constituting the image processing unit 18. Here, the chuck 24 changes the angle of the wafer 26 with respect to the optical axis of the camera 22 because the area on the wafer to which the diffused light is irradiated is desired to be changed.
In addition, the chuck 24 rotates the wafer 26 every 180 ° about an axis perpendicular to the wafer surface at the center of the wafer.

FIG. 10 is a diagram showing two kinds of positional relationships between the wafer 26 and the diffused illumination 20. In FIG. FIG. 10A is a side view of FIG. 10B viewed from the left side in the figure. FIG. 10C is a side view of FIG. 10D as viewed from the left side in the figure. The wafer 26 shown in FIG. 10B is inclined by an angle θ1 from the horizontal direction.
The incident angle of the irradiated light is different between the region Z farther from the illumination 20 and the region Z. That is, the irradiation angle a to the wafer 26 when detecting the surface image of the region X, and the irradiation angle b to the wafer 26 when detecting the surface image of the region Z.
And is different. As described above, if the irradiation angles are different, the appearance of the pattern will be different, and accurate pattern inspection cannot be performed.

Therefore, as shown in FIG. 10D, when detecting the surface image of the region Z, the inclination angle θ of the wafer 26 is determined.
2 should be smaller than the angle θ1. Then, the incident angle c of the light applied to the region Z is equal to the above-described angle a.
What is necessary is just to make it the same as. By changing the tilt angle of the wafer in this manner, each surface image is always detected in the same irradiation state.

When performing an inspection on the orientation flat (OF in the figure) side, the wafer 26 may be rotated by 180 ° about an axis perpendicular to the center thereof.

Here, a method of detecting an image at the time of a resolution failure inspection (a method of creating an inspection area) will be described with reference to FIGS. 11, 12 and 13. FIG. Since the reference image and the image to be inspected are detected by the same method, the image to be inspected will be described as an example.

First, an image of the entire surface of the wafer 26 is detected and projected on the monitor 52. FIG. 11A shows the state of the wafer 26.
Orientation flat (O.O. in FIG. 11A).
The state of the surface image of the wafer when the direction orthogonal to F) is inclined by 30 ° from the horizontal direction is shown (that is, θ1 = 30 °). The wafer 26 is viewed from the camera 22 side. As shown in FIG.
An I pattern is formed. Hereinafter, the illustration is omitted with the LSI pattern omitted.

Then, an elliptical area is set on the wafer to set an inspection area (FIG. 11B). The setting of the area of the inspection ellipse D1 is based on the lateral diameter M of the inspection ellipse D1.
1 and the vertical diameter L1. These numerical values are input to the inspection area setting unit 58 described above.
Areas on the wafer other than the inspection area set in this way are not set as inspection areas.

Next, an upper non-detection area and a lower non-detection area are determined (FIG. 11C). For this, the inspection ellipse D
An upper boundary line j1 is set at a position separated from the center S of 1 by an upper vertical length N1 to the upper side in the figure. In addition, the inspection ellipse D
A lower boundary line k1 is set at a position spaced apart from the center S of 1 by a lower vertical length O1 toward the lower side in the figure. Thereby, the surface area of the wafer 26 closer to the illumination than the upper boundary line j1 becomes the upper non-inspection area. The surface area of the wafer 26 farther from the illumination than the lower boundary line k1 is a lower non-inspection area. As shown in FIG.
1 are set as non-inspection areas, and the other surface area on the wafer 26 (the hatched area i1 in FIG. 11D) is the inspection area (inspection area). Area 1).

Next, from the state shown in FIG. 11D, the wafer 26 is rotated by 180 ° about an axis perpendicular to the center S of the inspection ellipse D1 (FIG. 12A). Then, the above-described inspection area i1 is set as the inspection area 2 this time.

Next, from the state of FIG.
The original state (FIG. 11D) is returned by rotating the wafer 26 by 180 °. Then, the inclination angle of the wafer 26 is increased (the state becomes θ1 = 45 °). In this state, the setting of the inspection ellipse D2 is performed by changing the horizontal diameter M2 and the vertical diameter L2.
(FIG. 12B).

Subsequently, the upper non-inspection area and the lower non-inspection area are set by setting the upper vertical length N2 and the lower vertical length O2, that is, by setting the upper boundary j2 and the lower boundary k2 (FIG. 12C). ). In this way, the area on the wafer excluding the non-inspection area (the shaded area i2 in FIG. 12D) is set as the inspection area 3 (FIG. 12D). Further, from this state, the area i2 is rotated by 180 ° about an axis perpendicular to the center S, and the area i2 is set as the inspection area 4 (FIG. 13A).

Further, the inclination angle of the wafer 26 is increased (θ1 = 60 °), and similarly, the inspection area 5 (FIG. 13)
(B) region i3) and inspection area 6 (FIG. 13C)
Area i3) is set.

As described above, the inspection area is set closer to the illumination as the inclination angle of the wafer is larger. Then, comparison and determination are performed for each inspection area setting, and the quality of the pattern is determined for each inspection area. That is, the inspection procedure proceeds with setting of the tilt angle of the wafer, setting of the inspection area, detection of the image to be inspected, comparison between the reference image and the image to be inspected, and determination of the quality of the pattern of the image to be inspected. By repeating this procedure a plurality of times while changing the inspection area, the quality of the pattern is determined over the entire surface of the wafer to be inspected.

In performing the above-described procedure, the surface image detected for each inspection area is stored in the image memory unit 62, and the comparison and the determination are performed over the entire area of the wafer surface. You may do it later.

Next, a detailed configuration of the comparing section 64 will be described. In FIG. 9, the comparison unit 64 of this configuration example includes an edge processing unit 68, a pixel counting unit 70, and a pixel number comparison unit 72.
It has.

The edge processing section 68 is an apparatus for performing edge enhancement processing on the detected surface image of the wafer. This processing unit 6
8, edge enhancement processing is performed on both the reference image and the image to be inspected. The edge enhancement process (differential filter) is a process usually used in image processing, and is also called a differentiation process. As a result of the edge enhancement processing, a boundary line in the reference image or the image to be inspected is enhanced. In this way, a portion of the image where the change in brightness is large is extracted. Since the poor resolution portion is brighter than the other portions, the boundary is detected as a change point. In order to detect the defective resolution portion, a threshold value of the density difference is set for each area.

The pixel counting section 70 calculates the first value of each pixel constituting the reference area or the inspection area after the edge enhancement processing.
This device counts the number of pixels equal to or smaller than the brightness difference and the number of pixels equal to or larger than the second brightness difference as a reference value or a test value, and records the reference value or the test value in a memory unit. Here, it is assumed that this memory means is provided in the pixel counting unit 70. The reference value, once counted,
Thereafter, the reference value may be stored in the memory means, and the reference value may be input to the pixel number comparing section 72 at the timing when the inspected value is input to the pixel number comparing section 72.

The pixel number comparing section 72 is a device for reading a reference value and a test value from the memory means, respectively, and comparing the reference value and the test value. In this way,
The comparison unit 64 outputs the result of the comparison between the reference value and the value to be inspected. Here, the result of this comparison is output as the coincidence rate between the reference value and the inspection value. The matching rate is sent to the determining unit 66, and the determining unit 66 determines the quality of the pattern formed on the wafer to be inspected according to the matching rate. This determination result is sent to the device control personal computer 54 and visually recognized on the control monitor 56 and the like. Then, the device control personal computer 54 instructs the inspection area setting unit 58 to set the next area together with the input of the determination result.

Here, the brightness difference distribution and the coincidence rate will be described. The distribution of the number of pixels for each brightness difference detected by the comparing unit 64 is called a brightness difference distribution. The brightness difference distribution is obtained for the reference image and the inspection image, respectively, and is referred to as a reference brightness difference distribution and an inspection brightness difference distribution, respectively. For example, FIG. 14 shows an example of the brightness difference distribution, with the brightness difference taken along the horizontal axis and the number of pixels taken along the vertical axis.

The first graph in FIG. 14 shows the reference lightness difference distribution obtained for the reference image.
The graph at the bottom is the lightness difference distribution to be inspected obtained for the image to be inspected. In the example of FIG. 14, the reference brightness difference distribution at the first stage has a substantially target mountain shape. On the other hand, the brightness difference distribution to be inspected in the second stage has a shape in which the maximum point is shifted to the right side (high brightness difference side) in the figure as compared with the reference brightness difference distribution. In addition, the brightness difference distribution to be inspected in the third stage is
The maximum point has a shape shifted to the left side (low lightness difference side) in the figure as compared with the reference lightness difference distribution. Thus, FIG.
2 shows two types of lightness difference distributions to be inspected having different shapes from the reference lightness difference distribution.

First, the number of pixels (the hatched area m1 in FIG. 14) below the first brightness difference on the low brightness difference side in the first-stage graph is counted, and a first reference value is obtained. In addition, the number of pixels (the hatched area n1 in FIG. 14) that is equal to or greater than the second brightness difference on the high brightness difference side in the first-stage graph is counted, and a second reference value is obtained. Then, the number of pixels (shaded area m2) equal to or smaller than the first brightness difference in the second graph is counted as the first inspection value, and the number of pixels equal to or larger than the second brightness difference (shaded area n2) is counted. 2 Inspection value. Further, the number of pixels (shaded area m3) equal to or smaller than the first brightness difference in the third graph is counted and used as the first inspection value, and the number of pixels equal to or larger than the second brightness difference (shaded area n) is calculated.
3) is counted and set as a second inspection value. Pixel number comparison unit 72
In the above, the coincidence rate between the first inspected value and the first reference value and the coincidence rate between the second inspected value and the second reference value are obtained.

Here, the coincidence rate is a value indicating how much the two quantities coincide. A reference (threshold) is set for the coincidence rate. For example, when the coincidence rate of each pixel number is 60% or more when the coincidence rate is set to 60%, it is determined that these pixel numbers are the same. It has become so.

The coincidence rate between the first inspected value and the first reference value is sent to the judging section 66, where it is compared with a threshold value. It is determined that the number of pixels is the same for the first graph and the second graph in FIG. On the other hand, when the number of pixels (the hatched areas m1 and m3) equal to or smaller than the first brightness difference is compared between the first-stage graph and the third-stage graph, it is determined that they are not the same.

Further, when the numbers of pixels (hatched areas n1 and n2) having the second brightness difference or more are compared between the first stage and the second stage, it is determined that they are not the same. On the other hand, when the number of pixels (the shaded areas n1 and n3) having the second brightness difference or more is compared between the first stage and the third stage, they are determined to be the same.

As a result, in the example described with reference to FIG. 14, it is determined that the brightness difference distributions to be inspected in the second and third stages are different from the reference brightness difference distribution. In the example above,
If only the first brightness difference is set, it is determined that the first-stage graph and the second-stage graph match. By setting the second brightness difference, the difference between these graphs is recognized. As described above, two boundary lines (upper limit value and lower limit value of the count number) that determine the area for counting the number of pixels, such as the first and second brightness differences, are set. In this case, an accurate determination can be made. Note that two or more boundary lines may be set.

As described above, the image processing is performed by setting the threshold value of the density difference, the upper limit value and the lower limit value of the count number for each area. Then, the quality of the pattern is determined for each area. In this embodiment,
If even one area is determined to be no,
The wafer is determined to be defective.

<Image Processing for Coat Defect Inspection and Development Defect Inspection> The configuration of the image processing unit 18 that processes the image detected by the coat / development defect inspection unit 12 is the same as that of the image processing unit described with reference to FIG. The configuration is the same as that of No. The only difference is the configuration of the comparison unit 64, and therefore, this point will be described.

FIG. 15 is a block diagram showing a configuration of the comparing section 64 used for a coating / development defect inspection. The comparing section 64 of this configuration example includes a template setting section 74, a brightness distribution reading section 76, and a brightness distribution comparing section 78.

In the detection of a defective resolution or the detection of a flaw, a dark image (semi-dark visual field) in which the pattern portion normally has as little change as possible.
In this method, only the defective portion is brightly raised to recognize the difference. On the other hand, in order to detect a coating defect and a development defect, a method is used in which all portions on a wafer are irradiated with uniform light to recognize the visible portion as it is. The recognition method (image processing method) in such a case uses template matching. That is, first, a non-defective sample (surface image of the reference wafer)
Is divided into each template, and each pattern shape is stored in the apparatus. Then, at the time of inspection, the templates at the same location are compared with each other, and their respective correlation values (match rates) are calculated. If any one of the correlation values falls below the previously registered correlation value, the wafer is determined to be defective.

The creation of a template is performed by a special method. The pattern on the wafer is mainly a repetition of the same pattern (chip), but the arrangement state varies depending on the type. Depending on the product type, different chips (chips for measuring and manufacturing transistors called “tegu”) may be mixed in several places. In addition, some chips around the wafer are missing (see FIG. 16A). For these reasons, the entire wafer cannot be accurately inspected by storing the chips as one template and arranging them repeatedly. Therefore, a special template creation method dedicated to the wafer is required. Hereinafter, the procedure will be described with reference to FIGS. 16 and 17.

Referring to FIG. 16A, an LSI pattern is formed on the wafer 26 as a set of chips.
It can be seen that the chips formed on the portion in contact with the outer periphery of the wafer are missing. The chip thus missing does not become a product, and therefore does not need to be inspected. Therefore, an area excluding these chips is created as a template.

First, an inspection circle E is set on the wafer surface (FIG. 16B). The setting of the inspection circle E is performed by designating the diameter A of the inspection circle.

Next, an outer frame T of the template is set (FIG. 16C). The horizontal dimension is equal to the diameter A of the inspection circle, and the vertical dimension is the remaining dimension B obtained by removing the orientation flat side from the diameter A of the inspection circle by an arbitrary length.

The template surrounded by the outer frame T is divided into an arbitrary number of rectangular areas (FIG. 17A). By designating the number of divisions C, C × C rectangular areas having the same area are created as templates. In FIG. 17A, the outer frame T is divided into 4 × 4, and 16 templates a, b, c, d, e, f, g, h, i, j, k,
l, m, n, o and p have been created.

Next, a non-detection area (a hatched area in FIG. 17B) is designated. In the previously created template, portions outside the inspection circle are excluded from the inspection target. FIG. 17 (B)
As shown in, templates a, b, c, d, e, h,
i, l, m, n, o, and p have their non-detection regions, and the shape of these templates is no longer rectangular.

Finally, a search area (search area) of the template is designated (FIG. 17C). The search area is an area provided so that a target template can be found even when the inspection object is displaced. That is, if the displacement is within the range of the search area, the inspection can be performed. Value D of how much larger than the length of one side of the template
, The size and position of the search area are determined simultaneously. In FIG. 17C, only the search area of the template a (the u area in FIG. 17C) is displayed, but the search areas are similarly set for the templates b to p.

According to the template created in this way, only a desired area can be set as a target area for template matching. In addition, a template can be created according to the shape and size of the wafer.

The creation of the template described above is performed by the template setting section 74 described above. In the template setting section 74, the inspection circle diameter A, the number of divisions C and the like are input in advance. The image memory 62 stores a reference image and an image to be inspected detected by the camera 34. The reference image and the image to be inspected are surface images over the entire area of the wafer surface, unlike at the time of the defective resolution inspection. Therefore, it is not detected for each area. Then, the template setting unit 74 reads the reference image or the image to be inspected from the image memory unit 62, and sets a template for this image by the above-described method.

The template matching is a method of comparing a plurality of images for each template. And
This comparison is a comparison of the brightness distribution state of each pixel constituting the template. The brightness distribution reading unit 76 calls the template created by the template setting unit 74 and reads the brightness distribution of pixels in the template. The brightness distribution reading unit 78 reads the brightness distribution of the pixels in the reference image and the brightness distribution of the pixels in the inspection image for each template, and outputs the read result to the brightness distribution comparing unit 78. The brightness distribution comparison unit 78 compares the brightness distribution of the pixels in the reference image with the brightness distribution of the pixels in the image to be inspected, and calculates a correlation value (matching rate). This correlation value is output to the determination unit 66 as a comparison result.

Here, as a method of comparing the brightness distribution of the pixels of the reference image and the image to be inspected, for example, a method called gray scale pattern matching, mathematically speaking,
This is performed by a method using a normalized two-dimensional correlation coefficient.

The brightness distribution described above does not mean a distribution indicating the relationship between brightness and the number of pixels, but a brightness distribution for each position on the template.

The determination section 66 operates in the same manner as described in the resolution failure inspection. If at least one template is determined to be defective, the image to be inspected, that is, the pattern formed on the inspected wafer is determined to be defective.

<Image Processing for Flaw Inspection> The configuration of the image processing section 18 for processing the image detected by the flaw inspection section 14 is as follows.
The configuration is the same as the configuration of the image processing unit 18 described with reference to FIG. The difference is that only one inspection area is set. That is, in the defect inspection, a region obtained by removing the non-detection area from the surface image over the entire region of the wafer surface is set as the inspection area. Since the wafer is not tilted at the time of the defect inspection, only one inspection area is required.

FIG. 18 is a diagram for explaining an area creating method at the time of a flaw inspection. FIG. 18A shows a state where the wafer is viewed from the viewpoint of the camera 46. FIG.
In (B), first, an inspection circle Q is set. The inspection circle Q is set by designating the diameter A. In this way, the non-detection area on the outer circumference of the inspection circle is set. In addition, the remaining dimension B is set by removing the orientation flat side from the inspection circle diameter A by an arbitrary length (FIG. 1).
8 (C)). In this way, the non-detection area on the orientation flat side is set. The area on the wafer excluding these non-detection areas is set as the inspection area (the hatched area in FIG. 18D).

After that, the reference image and the image to be inspected are
What is necessary is just to compare the inspection areas set respectively. This comparison is performed by the pixel number counting method for each inspection area described in the resolution failure inspection. That is, the number of pixels equal to or smaller than the first brightness difference and the number of pixels equal to or larger than the second brightness difference are calculated by:
In this method, the reference image and the inspection image are counted as a reference value and an inspection value, respectively. Then, the comparison unit 64 calculates the coincidence rate between the reference value and the inspected value, and the determination unit 66 determines whether the pattern is good or bad.

[0159]

According to the wafer macro inspection method of the present invention, the surface image of the wafer is detected by the detection unit, and the detected surface image is analyzed by the image processing unit. Then, by detecting the reference image and the image to be inspected and comparing these images, the pattern formed on the reference wafer serving as the inspection standard is compared with the pattern formed on the wafer to be inspected. be able to. Therefore, it is possible to perform an appearance inspection for a defective resolution of the wafer. Then, for example, if the detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be performed automatically. Therefore, the number of working steps can be significantly reduced. In addition, a reliable inspection can be performed without depending on the skill of the operator.

According to the wafer macro inspection method of the present invention, the surface area on the reference wafer is divided into partial areas called reference areas, and the surface image of each reference area is detected. When detecting the surface image of the reference area, the inclination of the reference wafer with respect to the illumination is adjusted so that the inspection light is incident on each reference area at a fixed angle. By doing so, the same uniform illumination can be performed on each area on the reference wafer, so that the appearance of the color unevenness becomes constant. Therefore, inspection can be performed in consideration of the detection error.

According to the macro inspection method for a wafer of the present invention, the surface area on the inspection target wafer is divided into partial areas called the inspection areas, and the surface image of each inspection area is detected. When detecting the surface image of the inspection area, the inclination of the inspection wafer with respect to the illumination is adjusted so that the inspection light is incident on each inspection area at a fixed angle. In this manner, similar uniform illumination can be performed on each region of the wafer to be inspected, so that the appearance of color unevenness is constant. Therefore, inspection can be performed in consideration of the detection error.

According to the wafer macro inspection method of the present invention, the reference image and the corresponding image to be inspected are subjected to edge enhancement processing, and the number of pixels within a certain brightness difference range is counted. I do. Then, by comparing the numbers of pixels obtained for each image, the similarity between these images can be obtained.

Further, according to the wafer macro inspection method of the present invention, the surface image of the wafer is detected by the detecting section, and the detected surface image is analyzed by the image processing section. Then, by detecting the reference image and the image to be inspected and comparing these images, the pattern formed on the reference wafer serving as the inspection standard is compared with the pattern formed on the wafer to be inspected. be able to. Therefore, it is possible to inspect the appearance of the coating failure and the development failure of the wafer.
Then, for example, if the detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be performed automatically. Therefore, the number of working steps can be significantly reduced. In addition, a reliable inspection can be performed without depending on the skill of the operator.

According to the wafer macro inspection method of the present invention, a template is set for each of the reference image and the corresponding image to be inspected, and matching of these templates is performed. The matching is performed by calculating the brightness distribution of each template based on a conventionally known method. Then, by comparing the brightness distributions obtained for the respective templates to obtain the similarity (correlation rate), the coincidence rate of these templates can be obtained.

According to the wafer macro inspection method of the present invention, the non-inspection area on the wafer is eliminated by setting the pattern formation area, dividing the pattern formation area, and setting the non-inspection area. Template can be set. Therefore, an area unrelated to the product on the wafer can be excluded as a non-inspection area, so that accurate inspection can be performed.

Further, according to the wafer macro inspection method of the present invention, the surface image of the wafer is detected by the detection unit, and the detected surface image is analyzed by the image processing unit. Then, by detecting the reference image and the image to be inspected and comparing these images, the pattern formed on the reference wafer serving as the inspection standard is compared with the pattern formed on the wafer to be inspected. be able to. Therefore, it is possible to inspect the appearance of the scratch on the wafer. Then, for example, if the detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be performed automatically. Therefore, the number of working steps can be significantly reduced. In addition, a reliable inspection can be performed without depending on the skill of the operator.

Further, according to the wafer macro inspection method of the present invention, the inspection light is irradiated from an angle of 45 ° with respect to the extending direction of the grid line. It can be detected as little as possible. Therefore, the flaw is easily detected.

According to the wafer macro inspection method of the present invention, the reference image and the corresponding image to be inspected are subjected to edge enhancement processing, and the number of pixels within a certain brightness difference range is counted. I do. Then, by comparing the numbers of pixels obtained for each image, the similarity between these images can be obtained.

Further, according to the automatic wafer macro inspection apparatus of the present invention, an image detecting section for detecting a surface image of a wafer;
An image processing unit for analyzing the detected surface image. The image detection unit includes a resolution failure inspection unit that performs a resolution failure inspection, and the image detected by the inspection unit is processed by the above-described image processing unit. Therefore,
Appearance inspection for wafer resolution failure can be performed. Also, for example,
If the image detection unit and the image processing unit are controlled by a computer device, the appearance inspection can be performed automatically. Therefore, it is possible to remarkably reduce the number of operation steps and realize a reliable inspection that does not depend on the skill of the operator.

Further, according to the automatic wafer macro inspection apparatus of the present invention, since the surface of the wafer is irradiated with diffused light and the first detection unit detects the surface image, the solution of the pattern formed on the surface of the wafer is solved. An image defect can be inspected.

According to the automatic wafer macro inspection apparatus of the present invention, since the support has the function of adjusting the attitude of the wafer, it is possible to set an appropriate irradiation angle. Therefore, since a detection error caused by a type and a process of a wafer can be considered, a more reliable inspection can be performed.

Further, according to the automatic wafer macro inspection apparatus of the present invention, an image detecting section for detecting a surface image of a wafer,
An image processing unit for analyzing the detected surface image. The image detection unit includes a coating / development defect inspection unit for inspecting a coating defect and a development defect, and an image detected by the inspection unit is processed by the above-described image processing unit. Therefore, it is possible to inspect the appearance of the coating failure and the development failure of the wafer. Also, for example, if the image detection unit and the image processing unit are controlled by a computer device,
This appearance inspection can be performed automatically. Therefore, it is possible to remarkably reduce the number of operation steps and realize a reliable inspection that does not depend on the skill of the operator.

Further, according to the automatic wafer macro inspection apparatus of the present invention, since the surface of the wafer is irradiated with the diffused light and the surface image is detected by the second detecting section, the pattern of the pattern formed on the surface of the wafer is coated. Defective or defective development can be inspected.

Further, according to the automatic wafer macro inspection apparatus of the present invention, uniform diffused light can be applied to the wafer by using the half mirror. The illumination light reflected by the wafer is detected by the second detection unit. Further, if this half mirror is provided between the imaging means of the image detection unit and the wafer, it is possible to prevent the image of the imaging means from being detected.

Further, according to the automatic wafer macro inspection apparatus of the present invention, an image detecting section for detecting a surface image of a wafer;
An image processing unit for analyzing the detected surface image. The image detection unit includes a flaw inspection unit that performs flaw inspection, and the image detected by the inspection unit is processed by the above-described image processing unit. Therefore, it is possible to inspect the appearance of a scratch on the wafer. Also, for example, if the image detection unit and the image processing unit are controlled by a computer device,
This appearance inspection can be performed automatically. Therefore, it is possible to remarkably reduce the number of operation steps and realize a reliable inspection that does not depend on the skill of the operator.

Further, according to the automatic wafer macro inspection apparatus of the present invention, since the surface of the wafer is irradiated with the spot light and the surface image is detected by the third detection section, the flaw of the pattern formed on the surface of the wafer is improved. Can be inspected.

Further, according to the automatic wafer macro inspection apparatus of the present invention, since the supporting portion has a function of adjusting the attitude of the wafer, the irradiation angle can be set to a type and a process.

In addition, according to the automatic wafer macro inspection apparatus of the present invention, the angle of the grid line extends by 45 °
In this case, the inspection light is emitted from the above angle, so that the reflected light from the grid lines can be detected as little as possible. Therefore, the flaw is easily detected.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an automatic wafer macro inspection apparatus according to an embodiment.

FIG. 2 is a diagram illustrating a configuration of a resolution failure inspection unit.

FIG. 3 is a diagram illustrating a principle of detecting a resolution failure.

FIG. 4 is a diagram illustrating a configuration of a coating / development defect inspection unit.

FIG. 5 is a diagram illustrating a principle of detecting a coating defect and a development defect.

FIG. 6 is a diagram showing a configuration of a flaw inspection unit.

FIG. 7 is a diagram showing a principle of detecting a flaw.

FIG. 8 is a diagram showing an arrangement of illumination and a wafer.

FIG. 9 is a diagram illustrating a configuration of an image processing unit used for a resolution failure inspection.

FIG. 10 is a diagram showing an arrangement of a wafer and illumination.

FIG. 11 is a diagram showing a method of creating an inspection area.

FIG. 12 is a diagram illustrating a method of creating an inspection area, following FIG. 11;

FIG. 13 is a diagram illustrating a method of creating an inspection area, following FIG. 12;

FIG. 14 is a diagram showing a lightness difference distribution graph.

FIG. 15 is a diagram showing a configuration of a comparison unit used for a coating / development defect inspection.

FIG. 16 is a diagram showing a template creation method.

FIG. 17 is a diagram illustrating a template creation method following FIG. 16;

FIG. 18 is a diagram showing a method for creating an inspection area.

[Explanation of symbols]

 10: Resolution failure inspection unit 12: Coat / development failure inspection unit 14: Scratch inspection unit 16: Image detection unit 18: Image processing unit 20, 32: Diffuse illumination 22: First detection unit 24: Tilt-type wafer chuck 26: Wafer 28: External light shielding box 30: Resist 34: Second detector 36: Fixed wafer chuck 38: Half mirror 40: Base pattern 42: Resist 44, 44a, 44b: Spot illumination 46: Third detector 48: Up / down Type wafer chuck 50: image processing device 52: monitor 54: device control personal computer 56: control monitor 58: inspection area setting unit 60: chuck control unit 62: image memory unit 64: comparison unit 66: determination unit 68: edge processing Unit 70: pixel number counting unit 72: pixel number comparison unit 74: template setting unit 76: brightness distribution reading unit 78: brightness distribution comparison unit 8 0: Communication cable

Claims (23)

[Claims] An illumination unit irradiates inspection light toward a wafer, a detection unit detects a surface image of the wafer under illumination of the inspection light, and an image processing unit analyzes the detected surface image. In performing an appearance inspection of a pattern formed on the surface of the wafer, when performing an inspection for poor resolution of the pattern, the analysis of the surface image is performed by using the surface image of the reference wafer as a reference image by the detection unit. Detecting, storing the reference image in an image memory unit, detecting the surface image of the inspection target wafer as the inspection image by the detection unit, reading the reference image from the image memory unit, A macro inspection method for a wafer, comprising: a step of comparing a reference image with the image to be inspected; and a step of determining the quality of the wafer to be inspected according to a result of the comparison. 2. The wafer macro inspection method according to claim 1, wherein the reference image is detected by setting a reference area on the reference wafer, and the inspection light is incident on the set reference area. Adjusting the relative position between the reference wafer and the illumination unit so that the angle is constant; and detecting the surface image of the reference area as a reference image by the detection unit. Macro inspection method. 3. The macro inspection method for a wafer according to claim 1, wherein the step of detecting a surface image of the wafer to be inspected comprises: setting an area to be inspected on the wafer to be inspected; Adjusting the relative position between the wafer to be inspected and the illumination unit so that the incident angle of the inspection light is constant; and detecting the surface image of the inspection area as the image to be inspected by the detection unit. And a step of performing a macro inspection of a wafer. 4. The macro inspection method for a wafer according to claim 1, wherein the comparison is performed by performing an edge enhancement process on the stored reference image; ,
Counting the number of pixels equal to or less than the first lightness difference and the number of pixels equal to or more than the second lightness difference as reference values, and recording the reference values in the first memory means; Performing an edge enhancement process on the image; and
Counting the number of pixels equal to or less than the first brightness difference and the number of pixels equal to or greater than the second brightness difference as a test value, and recording the test value in a second memory unit; Reading the reference value and the inspection value from the means, and comparing the reference value and the inspection value, respectively. 5. An illumination unit irradiates inspection light toward the wafer, a detection unit detects a surface image of the wafer under illumination of the inspection light, and an image processing unit analyzes the detected surface image. In performing the appearance inspection of the pattern formed on the surface of the wafer, when inspecting the coating failure and the development failure of the pattern, the analysis of the surface image is based on the surface image of the reference wafer by the detection unit. Detecting the reference image as an image, storing the reference image in an image memory unit, detecting the surface image of the inspection target wafer as the inspection image by the detection unit, reading the reference image from the image memory unit, Comparing the reference image with the image to be inspected, and determining whether the inspected wafer is good or bad according to a result of the comparison. 6. The wafer macro inspection method according to claim 5, wherein the comparing is performed by: setting a reference template in the stored reference image; and determining a brightness distribution of each pixel constituting the set reference template. Recording in a first memory means as a reference distribution; setting a template to be inspected in an area of the detected image to be inspected corresponding to the reference template; and a brightness distribution of each pixel constituting the template to be inspected. In the second memory means as a distribution to be inspected, and reading the reference distribution and the distribution to be inspected from the first and second memory means, respectively, and comparing the reference distribution and the distribution to be inspected. A macro inspection method for a wafer, comprising: 7. The macro inspection method for a wafer according to claim 6, wherein the setting of the reference template or the inspection target template is performed on the entire surface of the detected reference wafer or the detected inspection target wafer. Setting a pattern forming region in an image; creating a grid region by partitioning the pattern forming region into a grid; and forming the grid region excluding a non-inspection region with the reference template or the inspection target template. A macro inspection method for a wafer. 8. An illumination unit irradiates inspection light toward the wafer, a detection unit detects a surface image of the wafer under illumination of the inspection light, and an image processing unit analyzes the detected surface image. In performing an appearance inspection of a pattern formed on the surface of the wafer, when inspecting a flaw of the pattern, the analysis of the surface image is performed by detecting the surface image of the reference wafer as the reference image by the detection unit. Storing the reference image in an image memory unit; detecting the surface image of the inspection target wafer as the inspection image by the detection unit; reading the reference image from the image memory unit; A step of comparing the inspection target image with the inspection target image, and a step of determining whether the inspection target wafer is good or bad according to a result of the comparison. 9. The macro inspection method for a wafer according to claim 8, wherein the detection of the reference image and the detection of the image to be inspected are performed in an extending direction of a grid line formed on the reference wafer or the wafer to be inspected. And a direction perpendicular to the inspection light generating surface of the illumination unit is set to be substantially 45 °. 10. The wafer macro inspection method according to claim 8, wherein the comparison is performed by performing an edge enhancement process on the stored reference image; ,
Counting the number of pixels equal to or smaller than the first brightness difference and the number of pixels equal to or larger than the second brightness difference as a reference value, and recording the reference value in a first memory unit; Performing an edge enhancement process; and for each pixel constituting the image to be inspected after the edge enhancement process,
Counting the number of pixels equal to or less than the first brightness difference and the number of pixels equal to or greater than the second brightness difference as a test value, and recording the test value in a second memory unit; Reading the reference value and the inspection value from the means, and comparing the reference value and the inspection value, respectively. 11. A wafer inspection apparatus used for inspecting the appearance of a pattern formed on a surface of a wafer, wherein an image for detecting a surface image of a wafer to be inspected and a surface image of a reference wafer as an image to be inspected and a reference image, respectively. In an automatic wafer macro inspection apparatus comprising: a detection unit, an image processing unit that compares the detected reference image and the image to be inspected, and determines whether the inspected wafer is good or bad according to a result of the comparison. The automatic wafer macro inspection apparatus according to claim 1, wherein the image detection unit includes a resolution defect inspection unit that inspects a resolution defect of the pattern. 12. The automatic wafer macro inspection apparatus according to claim 11, wherein the resolution defect inspection unit is configured to irradiate the surface of the wafer with diffused light, and to detect the surface image of the wafer. 1. An automatic wafer macro inspection apparatus, comprising: a detection unit; and a support unit that supports the wafer. 13. The automatic wafer macro inspection apparatus according to claim 12, wherein said support section has a mechanism for adjusting a relative position of said wafer with respect to said diffused illumination. Macro inspection device. 14. The automatic wafer macro inspection apparatus according to claim 12, wherein said diffused illumination has a function of changing an amount of light to be irradiated according to a type of said wafer and a pattern formed on said wafer. An automatic wafer macro inspection apparatus, characterized in that: 15. A wafer inspection apparatus used for inspecting the appearance of a pattern formed on a surface of a wafer, wherein an image for detecting a surface image of a wafer to be inspected and a surface image of a reference wafer as an image to be inspected and a reference image, respectively. In an automatic wafer macro inspection apparatus comprising: a detection unit, an image processing unit that compares the detected reference image and the image to be inspected, and determines whether the inspected wafer is good or bad according to a result of the comparison. The automatic wafer macro inspection apparatus according to claim 1, wherein the image detection unit includes a coating / development defect inspection unit that inspects the pattern for coating defects and development defects. 16. The automatic wafer macro inspection apparatus according to claim 15, wherein said coat / development defect inspection unit detects diffused illumination for irradiating diffused light to a surface of said wafer, and detects said surface image of said wafer. An automatic wafer macro inspection apparatus, comprising: a second detection unit; and a support unit that supports the wafer. 17. The automatic wafer macro inspection apparatus according to claim 16, wherein the diffuse illumination has a function of changing an amount of light to be irradiated according to a type of the wafer and a pattern formed on the wafer. An automatic wafer macro inspection apparatus, characterized in that: 18. The automatic wafer macro inspection apparatus according to claim 16, wherein the diffused light is reflected toward the surface of the wafer, and the diffused light reflected from the surface of the wafer is reflected by the second detector. An automatic wafer macro inspection apparatus comprising a half mirror for transmitting light toward a side. 19. A wafer inspection apparatus for use in inspecting the appearance of a pattern formed on a surface of a wafer, the image detecting a surface image of a wafer to be inspected and a surface image of a reference wafer as an image to be inspected and a reference image, respectively. In an automatic wafer macro inspection apparatus comprising: a detection unit, an image processing unit that compares the detected reference image and the image to be inspected, and determines whether the inspected wafer is good or bad according to a result of the comparison. The automatic wafer macro inspection apparatus according to claim 1, wherein the image detection unit includes a defect inspection unit that inspects the pattern for defects. 20. The automatic wafer macro inspection apparatus according to claim 19, wherein the flaw inspection unit includes a spot illumination for irradiating a spot light on a surface of the wafer, and a third detection for detecting the surface image of the wafer. An automatic wafer macro inspection apparatus, comprising: a support section for supporting the wafer; 21. The automatic wafer macro inspection apparatus according to claim 20, wherein said support portion has a mechanism for adjusting a relative position of said wafer with respect to said diffused illumination. Macro inspection device. 22. The automatic wafer macro inspection apparatus according to claim 20, wherein the spot illumination has a function of changing an amount of light to be irradiated according to a type of the wafer and a pattern formed on the wafer. An automatic wafer macro inspection apparatus, characterized in that: 23. The automatic wafer macro inspection apparatus according to claim 20, wherein an extending direction of a grid line formed on the reference wafer or the inspected wafer and a direction perpendicular to an inspection light generating surface of the illumination unit. Wherein the spot illumination is provided so that the angle is substantially 45 °.