JPH10240572A5 - - Google Patents

Info

Publication number
JPH10240572A5
JPH10240572A5 JP1997349884A JP34988497A JPH10240572A5 JP H10240572 A5 JPH10240572 A5 JP H10240572A5 JP 1997349884 A JP1997349884 A JP 1997349884A JP 34988497 A JP34988497 A JP 34988497A JP H10240572 A5 JPH10240572 A5 JP H10240572A5
Authority
JP
Japan
Prior art keywords
memory
data
bus
signal
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1997349884A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10240572A (ja
Filing date
Publication date
Priority claimed from GBGB9626367.8A external-priority patent/GB9626367D0/en
Application filed filed Critical
Publication of JPH10240572A publication Critical patent/JPH10240572A/ja
Publication of JPH10240572A5 publication Critical patent/JPH10240572A5/ja
Pending legal-status Critical Current

Links

JP9349884A 1996-12-19 1997-12-19 命令トレース供給方式 Pending JPH10240572A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB9626367.8A GB9626367D0 (en) 1996-12-19 1996-12-19 Providing an instruction trace
GB9626367-8 1996-12-19

Publications (2)

Publication Number Publication Date
JPH10240572A JPH10240572A (ja) 1998-09-11
JPH10240572A5 true JPH10240572A5 (enExample) 2013-06-20

Family

ID=10804688

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9349884A Pending JPH10240572A (ja) 1996-12-19 1997-12-19 命令トレース供給方式

Country Status (5)

Country Link
US (1) US6279103B1 (enExample)
EP (1) EP0849670B1 (enExample)
JP (1) JPH10240572A (enExample)
DE (1) DE69706271T2 (enExample)
GB (1) GB9626367D0 (enExample)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7308629B2 (en) * 2004-12-07 2007-12-11 Texas Instruments Incorporated Addressable tap domain selection circuit with TDI/TDO external terminal
US7571364B2 (en) * 2005-08-09 2009-08-04 Texas Instruments Incorporated Selectable JTAG or trace access with data store and output
US6041406A (en) * 1997-04-08 2000-03-21 Advanced Micro Devices, Inc. Parallel and serial debug port on a processor
US6189140B1 (en) 1997-04-08 2001-02-13 Advanced Micro Devices, Inc. Debug interface including logic generating handshake signals between a processor, an input/output port, and a trace logic
US6148381A (en) * 1997-04-08 2000-11-14 Advanced Micro Devices, Inc. Single-port trace buffer architecture with overflow reduction
US6154857A (en) * 1997-04-08 2000-11-28 Advanced Micro Devices, Inc. Microprocessor-based device incorporating a cache for capturing software performance profiling data
US6185732B1 (en) 1997-04-08 2001-02-06 Advanced Micro Devices, Inc. Software debug port for a microprocessor
US6314530B1 (en) 1997-04-08 2001-11-06 Advanced Micro Devices, Inc. Processor having a trace access instruction to access on-chip trace memory
US6142683A (en) * 1997-04-08 2000-11-07 Advanced Micro Devices, Inc. Debug interface including data steering between a processor, an input/output port, and a trace logic
US5978902A (en) * 1997-04-08 1999-11-02 Advanced Micro Devices, Inc. Debug interface including operating system access of a serial/parallel debug port
US6167536A (en) * 1997-04-08 2000-12-26 Advanced Micro Devices, Inc. Trace cache for a microprocessor-based device
US6154856A (en) * 1997-04-08 2000-11-28 Advanced Micro Devices, Inc. Debug interface including state machines for timing synchronization and communication
US6009270A (en) * 1997-04-08 1999-12-28 Advanced Micro Devices, Inc. Trace synchronization in a processor
US6094729A (en) * 1997-04-08 2000-07-25 Advanced Micro Devices, Inc. Debug interface including a compact trace record storage
US6175914B1 (en) 1997-12-17 2001-01-16 Advanced Micro Devices, Inc. Processor including a combined parallel debug and trace port and a serial port
US6378093B1 (en) * 1998-02-10 2002-04-23 Texas Instruments Incorporated Controller for scan distributor and controller architecture
US6145100A (en) * 1998-03-04 2000-11-07 Advanced Micro Devices, Inc. Debug interface including timing synchronization logic
US6145123A (en) * 1998-07-01 2000-11-07 Advanced Micro Devices, Inc. Trace on/off with breakpoint register
US6567932B2 (en) * 1999-10-01 2003-05-20 Stmicroelectronics Limited System and method for communicating with an integrated circuit
US7802077B1 (en) * 2000-06-30 2010-09-21 Intel Corporation Trace indexing via trace end addresses
US7757065B1 (en) 2000-11-09 2010-07-13 Intel Corporation Instruction segment recording scheme
US6950903B2 (en) * 2001-06-28 2005-09-27 Intel Corporation Power reduction for processor front-end by caching decoded instructions
US7062607B2 (en) * 2001-09-24 2006-06-13 Intel Corporation Filtering basic instruction segments in a processor front-end for power conservation
EP1302857A3 (en) * 2001-10-09 2004-04-21 Texas Instruments Incorporated Apparatus and method for an on-board trace recorder unit
GB2389931B (en) * 2002-06-07 2005-12-14 Advanced Risc Mach Ltd Generation of trace elements within a data processing apparatus
US7197671B2 (en) 2002-06-07 2007-03-27 Arm Limited Generation of trace elements within a data processing apparatus
GB2389432B (en) * 2002-06-07 2005-09-07 Advanced Risc Mach Ltd Instruction tracing in data processing systems
JP2004102331A (ja) * 2002-09-04 2004-04-02 Renesas Technology Corp 半導体装置
US8374841B2 (en) * 2002-11-22 2013-02-12 Texas Instruments Incorporated Precise detection of triggers and trigger ordering for asynchronous events
TWI282057B (en) * 2003-05-09 2007-06-01 Icp Electronics Inc System bus controller and the method thereof
US7149926B2 (en) * 2003-05-22 2006-12-12 Infineon Technologies Ag Configurable real-time trace port for embedded processors
US7363600B1 (en) * 2003-10-21 2008-04-22 Xilinx, Inc. Method of simulating bidirectional signals in a modeling system
US7451357B2 (en) * 2004-11-18 2008-11-11 International Business Machines Corporation Apparatus and system for adjusting trace data granularity
US7395454B1 (en) * 2005-01-04 2008-07-01 Marvell Israel (Misl) Ltd. Integrated circuit with integrated debugging mechanism for standard interface
US7865776B2 (en) * 2007-10-25 2011-01-04 International Business Machines Corporation Adaptive prevention of data loss during continuous event tracing with limited buffer size
WO2013147866A1 (en) * 2012-03-30 2013-10-03 Intel Corporation System and method for real time instruction tracing
US11314623B2 (en) * 2019-01-23 2022-04-26 Red Hat, Inc. Software tracing in a multitenant environment
CN111045906A (zh) * 2019-11-21 2020-04-21 中国航空工业集团公司西安航空计算技术研究所 一种基于有限状态机的统一架构gpu性能采样与存储方法
US12367047B2 (en) * 2022-12-13 2025-07-22 SiFive, Inc. Debug trace circuitry configured to generate a record including an address pair and a counter value

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3673573A (en) * 1970-09-11 1972-06-27 Rca Corp Computer with program tracing facility
US4231087A (en) * 1978-10-18 1980-10-28 Bell Telephone Laboratories, Incorporated Microprocessor support system
JPH04328646A (ja) * 1991-04-26 1992-11-17 Nec Corp 障害情報の採取方式
US5321828A (en) * 1991-06-07 1994-06-14 Step Engineering High speed microcomputer in-circuit emulator
EP0636976B1 (en) * 1993-07-28 1998-12-30 Koninklijke Philips Electronics N.V. Microcontroller provided with hardware for supporting debugging as based on boundary scan standard-type extensions
US5446876A (en) * 1994-04-15 1995-08-29 International Business Machines Corporation Hardware mechanism for instruction/data address tracing
FR2721725B1 (fr) * 1994-06-23 1996-09-20 Matra Marconi Space France Module de test pour analyser l'exécution d'un programme par une carte à microprocesseur.
JP2752592B2 (ja) * 1994-12-28 1998-05-18 日本ヒューレット・パッカード株式会社 マイクロプロセッサ、マイクロプロセッサ−デバッグツール間信号伝送方法及びトレース方法

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