JPH1023767A - Motor driver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid malfunctioning of a motor. SOLUTION: In a drive circuit 31, speed signals are inputted to a high side device unit 7 to make P transistors 7a and 7b perform switching operations. On the other hand, switching signals MF and MR are inputted to N transistors 8a and 8b through gate circuits 38 and 39 to put the N transistors 8a and 8b into on-states or off-states selectively. The speed signals MF and MR are, after their signal levels are shifted by a level shifter transistor array (40 and 41), inputted to the respective one side input terminals of AND circuits 44 and 45 which are standard gate integrated circuits of which a drive device 67 which drives the P transistors 7a and 7b in the high side device unit 7 is composed. Logical products of the outputs of the transistors 42 and 43 and the output of an OR circuit 46 are calculated by the AND circuits 44 and 45 and their outputs are supplied to the gate terminals of the P transistors 7a and 7b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motor driving apparatus for driving a brushed DC motor by a PWM (pulse width modulation) method as an example.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing an example of the configuration of a motor drive circuit on which the present invention is based, and is used commonly in the description of the prior art described below and the description of the embodiments. FIG. 4 is a graph showing an operation state of a circuit element of the related art, FIG. 5 is a circuit diagram showing a configuration example of a motor driving circuit (hereinafter, a driving circuit) 1 of the related art, and FIG.
FIG. 7 is a circuit diagram showing a configuration example of a later-described power element unit on the low side, and FIG. 7 is a circuit diagram showing a drive circuit 1 showing a configuration example of a later-described power element unit on the high side. Hereinafter, the configuration of the conventional motor drive circuit 1 will be described with reference to FIG. 2 and FIGS. In the following prior art and examples, a two-phase motor will be described for simplicity of description. However, this description also holds true for control of a motor of another phase such as three-phase. .

As an example, a medium withstand voltage (eg, rated voltage = DC2
4V) The brushless DC motor 3 is driven by a PWM (pulse width modulation) speed control method with a current limiter in a drive circuit 1 for controlling a forward / reverse open loop speed of the motor 3 in accordance with a given signal. The following configuration is adopted to satisfy the specification that the value is suppressed to a certain value or less. As shown in FIG. 2, the drive circuit 1 has a motor driving Vcc =
A power supply unit 2 including a first power supply unit 2a that outputs 24 VDC and a second power supply unit 2b that outputs a DC voltage of 5 VDC for driving the circuit; and performs forward / reverse rotation of the PWM modulated speed signal and the motor 3. A main control unit 4 for outputting a switching signal for switching, a power element unit 5 which is an inverter circuit composed of a MOSFET (MOS structure field effect transistor) as an example for outputting a driving current to the motor 3, and the speed signal and the switching signal Is provided with a slave control unit 6 composed of a C-MOS gate IC as an example of outputting a drive signal to turn on / off each transistor of the power element unit 5 to the power element unit 5.

The power element section 5 has a high-side element section 7 including a P-channel MOSFET for supplying a drive current to the motor 3 and a low-side element section 8 including an N-channel MOSFET into which a current from the motor 3 flows. doing. The driving power supply Vcc is supplied to the slave control section 6 and the high-side element section 7 via a power supply line 9 and a ground line 10 connected between the power supply section 2 and the power element section 5.
The ground line 10 compares the voltage drop amount of the current sensor 11 with a reference value, and outputs an excess signal to the sub-control unit 6 when the voltage drop amount exceeds the reference value. A current sensor 11 including a resistance element for stopping on / off operation is arranged. The ground line 10 is connected to the current sensor 1
1. The power supply unit 2 is commonly connected to the first power supply unit 2a, the second power supply unit 2b, the low-side element unit 8, and the slave control unit 6.

FIG. 5 shows a circuit example of the slave control section 6 and the power element section 5 of such a conventional drive circuit 1. As shown in FIG. In connection with the slave control unit 6, a Zener diode 12 and a resistor 13 connected to the power supply line 9 are included.
A constant voltage circuit 14 that outputs a constant voltage of V is provided.
The high-side element section 7 includes a P-channel MOS
FETs (hereinafter, P-transistors) 7 a and 7 b are provided, and an N-channel MOSFET
(Hereinafter, N transistors) 8a and 8b are provided. The outputs of the constant voltage circuit 14 are P transistors 7a, 7b
Are supplied to the inverting circuits 15 and 16 (for example, the element TC4011B) for outputting the gate signal. The inverting circuits 15 and 16 receive a switching signal MF for setting the rotation direction of the motor 3 in the forward direction and a switching signal MR for setting the rotation direction in the reverse direction among the switching signals via transistors 17 and 18, respectively. Is entered. Accordingly, the gate signals of the P-transistors 7a and 7b are level-shifted by the transistors 17 and 18 with respect to the ground potential reference switching signals MF and MR, and pass through the voltage Vcc-based inverting circuits 15 and 16 to the P-transistors 7a and 7b. 7b.

Further, in the conventional driving circuit 1, as shown in FIG. 5, the speed signal PWM is not inputted to the high side element section 7, and the switching signals MF and MR are supplied to the transistor 17 and
18, and the P transistors 7 a and 7 b are selectively set to a conductive state or a cut-off state. The speed signal PWM is ANDed with the switching signals MF and MR by AND circuits 26 and 27, and the output is ANDed.
The circuits 19 and 20 calculate the logical product with the output of the overcurrent detection circuit 21. Outputs of the AND circuits 19 and 20 (element types are the same as above) are input to respective gate terminals of the N transistors 8a and 8b. The overcurrent detection circuit 21 includes:
When the current is small, the voltage value detected by the current sensor 11 is small, the transistor 22 is turned off, and the Zener diode 23 is turned on. Is supplied to one input terminal of each of the AND circuits 19 and 20, and the AND circuits 19 and 20 output the input speed signal PWM. On the other hand, when a large current flows through the motor 3, the voltage value detected by the current sensor 11 increases, the transistor 22 conducts, the potential difference between the terminals of the Zener diode 23 decreases, and the Zener diode 23 is cut off. . This allows
The ground potential is supplied to the AND circuits 19 and 20 via the transistor 22 so that the AND circuits 19 and 20 are cut off, and the rotation of the motor 3 is stopped.

[0007]

SUMMARY OF THE INVENTION
Of AND circuits 19, 20 and N transistors 8a, 8b, and inverting circuits 15, 16 and P transistor 7
FIGS. 5 and 7 show examples of the configurations of a and 7b. In either case of the high-side element section 7 and the low-side element section 8, the driving elements 24 and 25 have a voltage output type C
MOS gate elements are used. In the following description, it is assumed that the motor 3 is rotating forward, and the P transistor 7a is cut off and the P transistor 7b is turned on accordingly. In this case, the potential difference VDD-G of the P transistor 7 of the high-side element 7 being turned off is 2 V which is the threshold voltage Vth of this transistor, and the driving element 2
5 is about 8 mA, while the potential difference VDD-G of the N-transistor 8 that switches between the on state and the off state is 10 V-Vth for the low-side element 8.
= 8 V, the current capacity of the driving element 24 becomes 16 mA or more, the off state of the high-side element 7 is not determined, and both the high-side element 7 and the low-side element 8 are turned on. Abnormal current flows and the motor 3
Malfunctions occur.

This state is shown in FIG. That is, the current capacity of the driving element 24 on the low side that performs switching for driving the motor 3 to rotate is larger than the current capacity of the driving element 25 on the high side. An uncertain situation occurs.

The inventions of claims 1 to 3 have been made to solve the above-mentioned technical problems, and an object of the invention is to provide a motor driving device capable of preventing a malfunction of a motor. .

[0010]

According to a first aspect of the present invention, there is provided a motor driving device for supplying a driving current to a coil of a motor, and a second transistor to which a driving current flows from another coil of the motor. An inverter circuit having a transistor of a conductive type; a first drive circuit having a relatively small current capacity for driving the first conductive type transistor of the inverter circuit on / off; and a second conductive type transistor in an on state. And a second drive circuit having a relatively large current capacity set to one of the off states.

With this, the current capacity of the drive circuit for turning on / off the transistor to drive the motor is increased.
Since the current capacity can be made smaller than the current capacity of the drive circuit for setting the transistor to either the on state or the off state, the operation state of the drive circuit for driving the transistor on / off can be determined. It is possible to prevent a situation in which the operation state of each drive circuit is not determined and short-circuit between the transistors, and prevent a malfunction of the motor.

In the first aspect of the present invention, the first conductivity type may be a P-channel type and the second conductivity type may be an N-channel type. Also in this case, the above-described effects can be achieved. In the invention of claim 1, the first drive circuit includes a gate integrated circuit element having a current capacity of about 60 mA as a basic configuration, and the second drive circuit has a basic configuration of about 20 to about 20 mA.
A gate integrated circuit device having a current capacity of 30 mA may be provided. Also in this case, the operation and effect of the first aspect can be realized.

[0013]

FIG. 1 is a block diagram showing a configuration example of a part of a motor drive circuit according to one embodiment of the present invention.
FIG. 1 is a block diagram showing a schematic configuration example of a motor drive circuit 1 having a configuration serving as a basis of the present invention, which has been described in the prior art, so that the description thereof will not be repeated, and the description of the prior art will be omitted if necessary. See 3 and 4 are graphs showing an operation example of the gate element used in the present embodiment.

Hereinafter, the configuration of the motor drive circuit 31 of this embodiment will be described with reference to FIGS.

FIG. 2 shows a schematic configuration of the motor drive circuit 31 of the present embodiment. FIG. 1 corresponds to FIG. 5 relating to the slave control section 6 and the power element section 5 in FIG. FIG. That is, the feature of the motor drive circuit 31 of this embodiment relates to the improvement of the slave control unit 6 and the power element unit 5 shown in FIG. In the present embodiment, a switching operation for rotationally driving the motor 3 is performed by the high-side element unit 7, and the low-side element unit 8 is turned off or on according to the forward or reverse rotation direction of the motor 3. Is set to

As an example, a medium withstand voltage (eg, rated voltage = DC2
In a drive circuit 31 for driving the DC motor 3 with brush of 4 V) by a PWM (pulse width modulation) speed control method with a current limiter, open-loop speed control of forward / reverse rotation of the motor 3 is performed according to a given signal. Is satisfied in order to satisfy the specification of suppressing the value below a certain value, the configuration described above with reference to FIG. 2 is adopted.

The slave control unit 6 of the drive circuit 31 of the present embodiment.
FIG. 1 shows a circuit example of a portion related to the power element section 5. A circuit corresponding to the constant voltage circuit 14 described with reference to FIG. 5 in relation to the slave control unit 6 is separately provided as a drive circuit 31 although not shown in FIG. The high-side element section 7 includes P-channel MOSFETs (hereinafter, P-transistors) 7a and 7b, and the low-side element section 8 includes N-channel MOSFETs (hereinafter, N-transistors).
8a and 8b are provided. The output of the first power supply unit 2a is supplied to each of the P transistors 7a and 7b.

Among the switching signals output by the main control unit 4, the switching signal MF for setting the rotation direction of the motor 3 to the normal rotation direction and the switching signal MR for setting the rotation direction to the reverse rotation direction are a level shift transistor array ( Hereinafter, array) 32, 3
3 and one end are input to inverting circuits 36 and 37 via resistors 34 and 35 whose grounds are grounded. Outputs of the inverting circuits 36 and 37 are input to gate circuits 38 and 39 (for example, TC4049BF, and current capacity is about 60 mA, for example) which are buffer type gate integrated circuits constituting the driving element 66 for driving the N transistors 8a and 8b. Is done. Therefore, the gate signals of the N transistors 8a and 8b are level-shifted by the arrays 32 and 33 with respect to the ground potential reference switching signals MF and MR, and the voltage Vcc reference inversion circuits 36 and 37 are provided.
Through the gate circuits 38 and 39 for driving the P-transistors 7a and 7b.

In the driving circuit 31 of the present embodiment, contrary to the driving circuit 1 of the prior art, the speed signal PWM is input to the high-side element section 7, and the P-transistors 7a and 7b are used as described later. Perform switching operation. On the other hand, the switching signals MF and MR are input to N transistors 8a and 8b via gate circuits 38 and 39, respectively.
a, 8b are selectively set to a conductive state or a cut-off state. As described above, the speed signal PWM is shifted in signal level through a level shift transistor array (hereinafter, array) 40, 41, and is passed through a high-side element through transistors 42, 43, which are transistor circuits for signal transmission. A standard gate integrated circuit (as an example, a driving element 67 that drives the P transistors 7a and 7b of the unit 7)
TC4093BF) and input to one input terminal of each of AND circuits 44 and 45. The AND circuits 44 and 45 calculate the logical product of the outputs of the transistors 42 and 43 and the output of the OR circuit 46, and the output is supplied to the gate terminals of the P transistors 7a and 7b.

The outputs of the transistors 42 and 43 are inverted and input to the respective input terminals of the OR circuit 46. When at least one of the outputs of the transistors 42 and 43 is at a low level, the OR circuit 46 outputs a high level signal. , And the AND circuits 44 and 45 are set to the conductive state. On the other hand, when the outputs of the transistors 42 and 43 are both at a high level, the OR circuit 46 outputs a low level signal, and the AND circuits 44 and 45
3 is set to a cut-off state in which the signal from 3 is cut off. In this cutoff state, P transistors 7a and 7b stop operating. In such a case, as an example, the switching signal MF,
A transition state or an abnormal state in which both MRs are at the same level such as a high level. At this time, the transistors 7a,
7b is turned off, the transistors 8a and 8b are turned on, and the brake is applied.

On the other hand, an overcurrent limiter circuit (hereinafter, limiter circuit) 47 is provided in connection with the first power supply section 2a. The limiter circuit 47 includes a rectifier circuit 4 in parallel with a capacitor 48 arranged in series with the power supply line 9.
Signals from 9 and 50 are output. Rectifier circuits 49, 50
Between them, a Zener diode 65 is connected so that the rectifier circuit 49 is on the cathode side. The rectifier circuit 49
Has diodes 51 and 52 connected in series with each other, and the respective cathodes of the diodes 51 and 52 are commonly connected to the gate of the transistor 55 of the limiter circuit 47. The rectifier circuit 50 has an anode connected to the rectifier circuit 5.
6 and 57 are input.

The emitter of the transistor 55 is connected to the power supply line 9, the collector is commonly connected to each input terminal of the AND circuit 58, and the capacitor 4 of the resistor 49 is connected via a parallel circuit of a resistor 59 and a capacitor 60.
8 side. The output of the AND circuit 58 is connected to the cathodes of the diodes 61 and 63 provided in the rectifier circuits 56 and 57, respectively. Diode 6
Anodes 1 and 63, AND circuits 44 and 45, respectively
Are connected to the other input terminals. Each rectifier circuit 56, 57
, And the cathodes of the diodes 62 and 64 reversely connected to the diodes 61 and 63 are connected to the anodes of the diodes 61 and 63, respectively.
Each of the anodes 64 is commonly connected to the cathode of the diode 53 of the rectifier circuit 50.

Hereinafter, the operation of the drive circuit 31 of the present embodiment will be described.

The limiter circuit 47 limits the current level from the motor 3 via the high-side element section 7 to a predetermined level. When this current is small, the voltage value detected by the current sensor 11 which is a resistance element is small,
The transistor 55 is turned off, and a low-level signal is input to the AND circuit 58. Thereby, the AND circuit 58
Is inverted to a high level, and a signal is input to the OR circuit 46. As a result, the output of the OR circuit 46 becomes high level, the respective AND circuits 44 and 45 conduct, and as described above, the speed signal PWM via the transistors 42 and 43 is supplied to the respective P transistors via the AND circuits 44 and 45. 7a and 7b, and the motor 3 is driven.

On the other hand, the high-side element 7 from the motor 3
Is large, the voltage value detected by the current sensor 11, which is a resistance element, also increases, and the transistor 55 is turned on. As a result, a high-level signal is input to the AND circuit 58. Thereby, the AND circuit 5
8 is inverted to a low level, and the rectifier circuit 5
6 and 57 are input. At this time, the rectifier circuit 56,
A low-level signal obtained by inverting the high-level signal is input to the OR circuit 46 via the common 57. As a result, the output of the OR circuit 46 becomes low level,
The circuits 44 and 45 are cut off, and the speed signal PWM via the transistors 42 and 43 is applied to the AND circuit 4 as described above.
It is cut off at 4 and 45 so that no signal is input to each of the P transistors 7a and 7b. Thus, when an overcurrent flows through the motor 3, the rotation of the motor 3 is stopped.

The control operation of the motor 3 when a steady current flows through the motor 3 will be described. One of the switching signals MF and MR is selectively set to a low level, and the motor 3 is switched between forward rotation and reverse rotation. At this time, in the drive circuit 31 of the present embodiment, the AND circuits 44 and 45, which are the drive elements 66 for driving the high-side element section 7, are provided.
Is a standard gate integrated circuit having a relatively small current capacity such as 20 to 30 mA (for example, TC4
093BF), and the driving element 67 for driving the low-side element section 8 includes, for example, TC404
A voltage output type CMOS gate element having a relatively large current capacity such as 9BF (current capacity is about 60 mA as an example) is used. The AND circuits 38 and 39 for driving the low-side element section 8 have a configuration in which the two standard gate integrated circuits (TC4049BF) are connected in parallel, and have a current capacity of about 120 mA.

It is assumed that the motor 3 is rotating forward and the N-transistor 8a is cut off and the N-transistor 8b is turned on accordingly. In this case, the potential difference VDD-G of the N-transistor 8a of the low-side element unit 8 that is turned off
Is 2V which is the threshold voltage Vth of this transistor.
The gate circuits 38 and 39 have a current capacity of about 120 mA.
, The potential difference VDD-G of the P-transistor 7 that switches between the on-state and the off-state for the high-side element unit 7 that repeats on / off.
Is 10 V−Vth = 8 V, and the current capacity of the AND circuits 44 and 45 is as small as 20 to 30 mA, so that the OFF state of the low side element 8 side by the AND circuits 44 and 45 on the switching side can be determined.

This prevents the high-side element 7 and the low-side element 8 from both being turned on, and prevents a problem that the motor 3 is erroneously operated by short-circuiting with each other, causing an excessive abnormal current to flow.

Further, the configuration described in the above embodiment shows one embodiment of the present invention, and does not limit the scope of the present invention. The present invention includes a wide variety of modifications without departing from the spirit of the present invention.

[0030]

As described above, according to the first aspect of the present invention,
Since the current capacity of the drive circuit that drives the transistor on / off to drive the motor can be smaller than the current capacity of the drive circuit that sets the transistor to either the on state or the off state, the transistor On /
The operating state of the drive circuit to be driven off can be determined, the operating state of each of these drive circuits is not determined, and the situation where each transistor is short-circuited can be prevented, and the malfunction of the motor can be prevented. it can.

In the first aspect of the present invention, the first conductivity type may be a P-channel type, and the second conductivity type may be an N-channel type. Also in this case, the above-described effects can be achieved. In the invention of claim 1, the first drive circuit includes a gate integrated circuit element having a current capacity of about 60 mA as a basic configuration, and the second drive circuit has a basic configuration of about 20 to about 20 mA.
A gate integrated circuit device having a current capacity of 30 mA may be provided. Also in this case, the operation and effect of the first aspect can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of a part of a motor drive circuit 31 according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration example of a motor drive circuit 1 that is a basis of the present invention.

FIG. 3 is a graph showing an operation example of a gate element used in the example.

FIG. 4 is a graph showing operation states of circuit elements according to a conventional technique and an example.

FIG. 5 is a circuit diagram illustrating a configuration example of a motor driving circuit 1 according to the related art.

FIG. 6 is a circuit diagram illustrating a configuration example of a low-side side of a power element unit described later in the drive circuit 1.

FIG. 7 is a circuit diagram showing a configuration example of a high-side side of a power element unit described later in the drive circuit 1.

[Explanation of symbols]

 2 power supply section 3 motor 4 main control section 5 power element section 6 slave control section 7 high side element section 7a, 7b P high side element section 8 low side element section 8a, 8b low side element section 31 drive circuits 38, 39 gate circuit 42, 43 transistor for signal transmission 44, 45 AND circuit 46 OR circuit 47 overcurrent limiter circuit

Claims (3)

[Claims] 1. A first motor for supplying a drive current to a coil of a motor.
An inverter circuit having a transistor of a conductive type and a transistor of a second conductive type into which a drive current flows from another coil of the motor; and a relatively small current for turning on / off the first conductive type transistor of the inverter circuit. A first driving circuit of a capacitor;
A second drive circuit having a relatively large current capacity for setting the second conductivity type transistor to either an on state or an off state. 2. The method according to claim 1, wherein the first conductivity type is a P-channel type.
The motor drive device according to claim 1, wherein the second conductive type is an N-channel type. 3. The first driving circuit has a basic structure of about 60
a gate integrated circuit device having a current capacity of mA.
The motor drive device according to claim 1, wherein the drive circuit includes a gate integrated circuit element having a current capacity of about 20 to 30 mA as a basic configuration.