JPH10232772A - Program changing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a program changing device with which the addition/change/ reduction of program trouble spread over plural instructions can be executed in a minimum processing time. SOLUTION: When an address comparator 103 detects the coincidence between an execution address from a program counter 101 and a branching source address from a branching source address register 102, a branching destination address register 104 stores a branching destination address corresponding to the coincident branching source address in a program counter 101 and branches that address into addition/change/reduction program. When the addition/change/ reduction program is completely executed, a return address corresponding to the coincident branching source address is selected out of a return address register 106, stored in the program counter 101 and branched. Therefore, it is not necessary to add the branching instruction to the end of addition/change/ reduction program.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program changing apparatus, and more particularly to a program changing apparatus in which a program to be changed, added, or reduced due to a program design error or the like occurs. The present invention relates to a program change device that executes a program by replacing a part with another program.

[0002]

2. Description of the Related Art FIG. 7 is a block diagram of a first example of a conventional program changing apparatus disclosed in Japanese Patent Laid-Open Publication No. Sho 61-213928. This program changing device includes a program counter 10 for holding a program address being executed.
1, a branch source address register 702 for holding an address where a program is to be added or changed, and an execution address and a branch source address indicated by the program counter 101 when addition / change / reduction of the program is permitted by an enable signal. An address comparator 703 that compares the branch source address held by the register 702; a branch destination address register 704 that stores a branch source address to be branched when the execution address matches the branch source address; An address save register 405 holds the branch source address +1 when the addresses match.

Next, the operation of this conventional example will be described with reference to the flowchart of FIG. When starting the execution of a conventional program including a portion to be corrected, first, a program to be added / changed / reduced is read into an area executable by the program change device, and an address to be changed or added or reduced in the conventional program is read. The start address of the addition / change / reduction program is set in the branch source address register 702 and stored in the branch destination register 704 (step 801).

Next, the operation of comparing the execution address and the branch source address in the address comparator 703 is permitted by the enable signal (step 802), and the program counter 10
1 sequentially executes the conventional program by incrementing the address. At this time, the execution address and the branch source address are compared by the address comparator 703 (step 80).
3) If they match, the branch destination address register 70
4 rewrites the program counter 101 to the start address of the addition / change / reduction program and branches (step 804). At the same time, the address save register 405 increments the address of the program counter 101 before branching and holds the incremented value as a return address.

When the execution of the addition / change / reduction program is performed (step 805) and the completion of the execution of the addition / change / reduction program is detected (step 806), the address save register 405 stores the information before branching. The address +1 is written back to the program counter 101 to branch to the conventional program (step 807), and the execution of the conventional program is resumed (step 808). After the execution of the conventional program is resumed in step 808, it is determined whether the execution of the conventional program is completed (step 809).
If the execution is not completed, the process returns to step 803 again and the address comparator 703 compares the execution address with the branch source address.

If it is determined in step 803 that the execution address does not match the branch source address, the conventional program is executed (step 808). Thereafter, in the same manner as described above, until the execution of the conventional program is completed, the above-described step 8 is performed.
Steps 03 to 809 are repeated.

The program counter 101 includes a branch destination address BR based on a branch instruction, a branch destination address SUB based on a subroutine call instruction, and a branch destination address based on a return instruction, in addition to the branch based on the address setting from the branch destination address register 702 and the address saving register 405. R
It has a branching means by ET.

Since the return address register 405 always writes back the address +1 before the branch, in the first conventional example, only one instruction in the conventional program can be replaced with an addition / change / reduction program. . FIG.
Shows that the instruction 4 of the conventional program is replaced with the change instruction 1, the change instruction 2, and the change instruction 3 of the addition / change / reduction program.

Next, a second example of the conventional program changing apparatus will be described. FIG.
Of the conventional program change device disclosed in
FIG. The difference between this program changing apparatus and the first conventional example shown in FIG. 7 is that a branch source address register 102 for holding a plurality of branch source addresses arranged in a table and a respective branch source address register 102 , A branch destination address register 104 for holding a plurality of branch destination addresses corresponding to the above, an address comparator 103 comparing a plurality of branch source addresses with an execution address, and an address save register. It is a point which does not have. The other parts are the same as the first example of the related art, and the description thereof is omitted.

Next, the operation of the second conventional example will be described with reference to the flowchart of FIG. 11 focusing on the differences from the first conventional example. In the conventional apparatus of FIG. 10, first, a plurality of addresses to be changed / added / reduced are set in the branch source address register 102, and the start addresses of the plurality of addition / change / reduction programs corresponding to the respective branch source addresses are branched. It is stored in the destination program 104 (step 1101). Next, the address comparison in the address comparator 103 is permitted by the enable signal, and the conventional program is executed (step 1102).

Subsequently, it is determined whether or not the execution address matches one of the branch source addresses (step 110).
3) If there is a match, the branch destination address register 104 rewrites the program counter 101 to a branch destination address corresponding to the matched branch source address and performs branching (step 1104). Subsequently, the addition / change / reduction program is executed (step 1105). At this time,
In the second conventional example, there is no means for holding a return address described later. Therefore, when the execution of the addition / change / reduction program at the branch destination is completed, a branch instruction is executed in the addition / change / reduction program, and the program branches to an arbitrary address to which the conventional program returns (step 110).
7), execution of the conventional program is resumed (step 11)
08).

The execution of the addition / change / reduction program is executed until the execution of the program is completed (step 1).
106). As described above, the second example of the related art provides a means for adding / changing / reducing programs at a plurality of locations by holding a plurality of branch destination addresses and a plurality of branch source addresses. In addition, since a branch instruction is used to return to an arbitrary address, a defective program that spans a plurality of instructions can be replaced with an addition / change / reduction program.

After resuming the execution of the conventional program in step 1108, it is determined whether the execution of the conventional program is completed (step 1109). If the execution is not completed, the process returns to step 1103 and the address comparator 103 branches to the execution address. The original addresses are compared. If it is determined in step 1103 that the execution address does not match the branch source address, the conventional program is executed (step 1108). Thereafter, in the same manner as above, steps 1103 to 1109 are performed until the execution of the conventional program is completed.
Is repeated.

FIG. 12 shows instructions 4 and 5 of the conventional program.
Is replaced with a change instruction 1, a change instruction 2, and a branch instruction. The means for reading the addition / change / reduction program in the conventional example is disclosed in Japanese Patent Laid-Open No. 7-325.
The description is omitted because it is exemplified in Japanese Patent Publication No. 711.

[0015]

However, in the conventional program changing apparatus having the address saving register 405 shown in FIG. 7, the return address held in the address saving register 405 is limited to the original execution address + 1. Therefore, only addition / change is allowed for only one instruction, and it is not possible to replace a defect in a program extending over a plurality of instructions.

Further, in the conventional program changing apparatus which returns by using the branch instruction shown in FIG. 10, the return address for returning to the conventional program is not considered, and the normal branch instruction is used for the return of the conventional instruction. Inevitably, the return address must be generated in the addition / change / reduction program, and a branch instruction including return address information is added to the originally required addition / change / reduction program. The execution time of the addition / change / reduction program is longer than that of the original program to be corrected, and there is a danger that the execution of the program will not be completed within a predetermined time.

Particularly, when a program to be changed is severely restricted in terms of timing or is repeatedly executed, an increase in execution time may have a fatal effect on system performance. There is.

The present invention has been made in view of the above points,
Add / change / defect program defects that span multiple instructions
It is an object of the present invention to provide a program change device capable of executing reduction with a minimum processing time.

[0019]

In order to achieve the above object, the present invention provides a program counter for holding a program address being executed and a branch for holding an address to be added / changed / reduced in a conventional program as a branch source address. Source address holding means and addition / deletion corresponding to the branch source address
Branch destination address holding means for holding the start address of the change / reduction program as a branch destination address, return address generation means for holding or generating a return address corresponding to the branch source address when the addition / change / reduction program is completed, When the addition / change / reduction of the program is permitted by the enable signal, the execution address from the program counter is compared with the branch source address from the branch source address holding means, and when they match, the corresponding branch source address is matched. The branch destination address to be output is output from the branch destination address holding means, stored in the program counter, and added / changed /
Address comparison means for branching to the reduction program, and upon completion of execution of the addition / change / reduction program, the return address from the return address generation means is stored in the program counter as the execution address, and the program is branched to the conventional program to execute the conventional program. And a control means.

According to the present invention, when the execution address matches the branch source address, the branch destination address corresponding to the matched branch source address is stored in the program counter, and the program is branched to the addition / change / reduction program and executed. When the execution of the addition / change / reduction program is completed, the return address corresponding to the branch source address is stored in the program counter as the execution address, the program is branched to the conventional program, and the conventional program is executed. A conventional program can be replaced with an addition / change / reduction program without addition.

According to the present invention, when the address comparing means determines that the execution address matches the branch source address from the branch source address holding means, the address holding the value obtained by adding +1 to the execution address at that time. Saving means, changing size holding means for holding a value equal to -1 to size information of a program to be changed corresponding to the branch source address, contents held by the address saving means and contents held by the changing size holding means Or a change size holding means for holding size information of a program to be changed corresponding to a branch source address, and an execution address and a branch by an address comparing means. The branch source address of the branch source address holding unit when a match with the branch source address from the source address holding unit is determined. And an adder for adding the contents held by the change size holding means in place of the return address generating means. When the addition / change / reduction program is completed, the control means sets the output address of the addition means to a program counter. And branch to the conventional program to execute the conventional program.

According to the present invention, a conventional program can be replaced with an addition / change / reduction program without adding a branch instruction.

Further, in the present invention, the branch source address holding means arranges and holds a plurality of branch source addresses in a table form, and the branch destination address holding means stores a plurality of branch destination addresses respectively corresponding to the plurality of branch source addresses. It is characterized in that addresses are arranged and held in a table.

According to the present invention, a plurality of instructions of the conventional program can be replaced with an addition / change / reduction program without adding a branch instruction. Therefore, add /
Of the change / reduction programs, the execution time spent on branch instructions can be reduced.

[0025]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a configuration diagram of a first embodiment of a program change device according to the present invention. The program changing device according to the present embodiment has a program counter 1
01, a branch source address register 102, an address comparator 103, a branch destination address register 104, and a return address register 106. Here, the branch source address register 102, the address comparator 103, and the branch destination address register 104 are the same as those in the second example of the conventional device.

The program counter 101 holds a program address being executed. The branch source address register 102 holds a plurality of branch source addresses arranged in a table. The address comparator 103 compares the execution address with the branch source address when the addition / change / reduction of the program is permitted by the enable signal. The branch destination address register 104 holds a plurality of branch destination addresses corresponding to each branch source address.

The return address register 106 holds a plurality of return addresses arranged in a table corresponding to the respective branch source addresses, and stores the return address corresponding to the branch source address when the addition / change / reduction program is completed. Output to the program counter 101. When a program is added / changed / reduced, the added / changed / reduced program is created in a different area from the currently executing program (conventional program).

The first embodiment is different from the first embodiment in that a return address at the time of completion of the addition / change / reduction program is set in the return address register 106 in advance. This is different from the second conventional example in FIG. 10 in that the return address corresponding to the branch source address of the return address register 106 is stored in the program counter 101 and branching is not performed.

Next, the operation of the first embodiment will be described with reference to the flowchart of FIG. First, a plurality of addresses to be changed / added / reduced are set in the branch source address register 102, and head addresses of a plurality of addition / change / reduction programs corresponding to the respective branch source addresses are stored in the branch destination address register 104. ,
A plurality of return addresses arranged in a table corresponding to each branch source address are stored in a return address register 10.
6 (step 201).

Next, the address comparison in the address comparator 103 is permitted by the enable signal, and the conventional program is executed (step 202). Program counter 1
01 sequentially increments the address and executes the conventional program. At this time, the address comparator 103 compares the execution address from the program counter 101 with the branch source address from the branch source address register 102 (step 203). If they match, the branch destination address register 104 stores the branch destination address corresponding to the matched branch source address in the program counter 101 based on the output match signal of the address comparator 103 at that time, and adds / changes / reduces. The process branches to a program (step 204).

Subsequently, the addition / change / reduction program is executed (step 205). Then, it is monitored whether or not the execution of the branch destination addition / change / reduction program has been completed (step 206). When the execution is completed, the program change device of this embodiment stores the return address stored in the return address register 106 in advance. Among the addresses, the address comparator 103 selects a return address corresponding to the coincident branch source address, stores the selected return address in the program counter 101, and branches. Therefore, in this embodiment, it is not necessary to add a branch instruction at the end of the addition / change / reduction program.

Thereafter, as in the second conventional example, the execution of the conventional program is resumed (step 208), and
The execution of the change / reduction program is performed until the execution of the program is completed (step 206). If the execution address matches the branch source address at that time, the processing of steps 204 to 209 is repeated again.

FIG. 3 shows how instructions are changed in the first embodiment. As shown in the figure, in the first embodiment, when instructions 4 and 5 of the conventional program are replaced with change instructions 1 and 2, a branch instruction is added after the instruction of the add / change / reduction program. You do n’t have to
The feature is that the program execution time does not need to be extended.

Next, a second embodiment of the present invention will be described. FIG. 4 shows a configuration diagram of a second embodiment of the program change device according to the present invention. In the figure, the same components as those of FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. FIG.
Is characterized in that an address save register 405, a change size register 407, and an adder 408 are provided in place of the return address register 106 of the first embodiment.

Here, the address save register 405 is
When an address matches, a value obtained by adding +1 to the previous execution address (that is, execution address + 1) is held. The change size register 407 holds size information of a plurality of programs to be changed arranged in a table corresponding to each branch source address. When the addition / change / reduction program is completed, the adder 408 stores the contents held by the address save register 405 and the change size register 40.
7 is added to the program size to be changed, which is held in 7, and the result is output to the program counter 101.

The difference between the second embodiment and the second conventional example shown in FIG. 10 is that the execution address held in the program counter 101 is incremented by +1 when the addresses match.
Storing the changed value in the address save register 405, holding the changed size register 407 at first with a value smaller than the original program size to be changed, and adding / changing / reducing the program. Is completed, the contents of the address save register 405 and the change size register 40
7 is added by the adder 408, stored in the program counter 101, and branched.

Next, the operation of this embodiment will be described with reference to the flowchart of FIG. In FIG.
The same processing steps as those in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted. In this embodiment, first, a plurality of addresses to be changed / added / reduced are set in the branch source address register 102, and the start addresses of the plurality of addition / change / reduction programs corresponding to the respective branch source addresses are set. It is stored in the branch destination address register 104, and a value obtained by subtracting -1 from the original program size to be changed is set in the change size register 407 (step 501).

Next, the address comparison in the address comparator 103 is permitted by the enable signal, and the conventional program is executed (step 202). When the execution address matches the branch source address (step 203), the program counter 101 A value obtained by adding +1 to the held execution address (which is equal to the branch source address at this time) is stored and held in the address save register 405, and based on the output coincidence signal of the address comparator 103, the branch destination address register 104 Stores the branch destination address corresponding to the coincident branch source address in the program counter 101, and branches to the addition / change / reduction program (step 502).

Subsequently, the addition / change / reduction program is executed (step 205), and it is monitored whether or not the execution of the addition / change / reduction program at the branch destination is completed (step 206). 40
Address saved at 5 (branch source address + 1)
And size information preset in the change size register 407 (for example, 2-1 = 1 when two instructions of the conventional program are changed) are added by the adder 408,
The result of the addition is stored in the program counter 101 and branches (step 503), and the program returns to the conventional program and starts executing again (step 208). The following behavior
This is the same as in the first embodiment.

Also in this embodiment, addition / change /
Obviously, it is not necessary to add a branch instruction to the reduction program. Also, the address save register 405
Instead of saving the branch source address + 1, the branch source address can be saved. In this case, the original program size to be changed may be set in the change size register 407.

Compared to the first embodiment, in this embodiment, the size of the program to be changed is stored as a table in place of the return address, but generally, the size of the program to be changed should be compared with the address. Since the size of the program is small, the word length of the change size register 407 that should hold the size information can be configured to be small.

For example, if a program space of 64 Kbytes is provided and the change size is 256 bytes at the maximum, the first embodiment requires registers of (16 bits × the maximum number of branch source addresses). On the other hand, in the second embodiment, it is sufficient to have (8 bits × the maximum number of branch source addresses) registers. Although the number of the adders 408 seems to be increasing, a general information processing device originally has an adder for arithmetic processing and an adder for address calculation. It is possible to avoid an increase in the amount of circuits.

Next, a third embodiment of the present invention will be described. FIG. 6 shows a configuration diagram of a third embodiment of the program change apparatus according to the present invention. 4, the same components as those of FIG. 4 are denoted by the same reference numerals, and the description thereof will be omitted. FIG.
The program change device shown in FIG. 7 is composed of an address save register 405 and a change size register 4 provided in the second embodiment.
07 is added by the adder 408, and the content of the branch source register 102 and the content of the change size register 407 are added by the adder 608 and output to the program counter 101. is there.

Since the original execution address stored in the address save register 405 in the second embodiment matches the branch source address, the change size register 40
7, the adder 608 stores the original program size number to be changed, the adder 608 stores the branch source address from the branch source address register 102, and the original program size to be changed from the change size register 407. Is added, the adder 408 according to the second embodiment is added.
Can be generated.

The other operation of the third embodiment is the same as that of the second embodiment, and the description is omitted. The third embodiment has a feature that the address saving register 405 can be further reduced while having the same features as the second embodiment.

[0046]

As described above, according to the present invention,
A return address holding means for storing a return address corresponding to the branch source address in a program counter and branching without using a branch instruction when the addition / change / reduction program is completed, or completion of the addition / change / reduction program In some cases, the contents of the address saving means and the contents of the changed size holding means are added by the adding means and stored in the program counter for branching, or the branch source address from the branch source address holding means and the changed size holding means By adding the original program size to be changed from and the original program size to be stored in the program counter and branching, a return address according to the changed size can be generated without using a branch instruction. Without adding branch instructions, it is possible to replace program defects that span multiple instructions. / Change / reduction program), the execution time of the addition / change / reduction program spent on the branch instruction can be reduced, and the execution time of the addition / change / reduction program is extended. There is a feature that there is no.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a first embodiment of the present invention.

FIG. 2 is a flowchart for explaining the operation of FIG. 1;

FIG. 3 is a diagram showing how the instruction shown in FIG. 1 is changed;

FIG. 4 is a configuration diagram of a second embodiment of the present invention.

FIG. 5 is a flowchart for explaining the operation of FIG. 4;

FIG. 6 is a configuration diagram of a second embodiment of the present invention.

FIG. 7 is a configuration diagram of a first conventional example.

FIG. 8 is a flowchart for explaining the operation of FIG. 7;

FIG. 9 is a diagram showing how the instruction shown in FIG. 8 is changed.

FIG. 10 is a configuration diagram of a second conventional example.

FIG. 11 is a flowchart for explaining the operation of FIG. 10;

FIG. 12 is a diagram showing how the instruction of FIG. 10 is changed.

[Explanation of symbols]

 Reference Signs List 101 Program counter 102 Branch source address register 103 Address comparator 104 Branch destination address register 106 Return address register 405 Address save register 407 Change size register 408, 608 Adder

Claims (5)

[Claims] A program counter for holding a program address being executed; branch source address holding means for holding an address to be added / changed / reduced in a conventional program as a branch source address; Branch destination address holding means for holding the start address of the change / reduction program as a branch destination address, and return address generation means for holding or generating a return address corresponding to the branch source address when the addition / change / reduction program is completed When addition / change / reduction of a program is permitted by an enable signal, the execution address from the program counter is compared with the branch source address from the branch source address holding means. Adds the branch destination address corresponding to the branch source address to the branch destination address. Address comparison means for outputting from the storage means, storing the program address in the program counter and branching to the addition / change / reduction program, and when the execution of the addition / change / reduction program is completed, the return address from the return address generation means. Control means for storing the execution address in the program counter, branching to the conventional program, and executing the conventional program. 2. The branch source address holding means arranges and stores the branch source addresses in a plurality of tables, and the branch destination address holding means stores a plurality of branch destination addresses respectively corresponding to the plurality of branch source addresses. 2. The program change apparatus according to claim 1, wherein the addresses are arranged in a table and held. 3. The return address generating means generates a plurality of return addresses by arranging the return addresses in a table, and the control means, when the execution of the addition / change / reduction program is completed, returns the plurality of return addresses. 3. The program according to claim 1, wherein a return address corresponding to the coincident branch source address is selected, stored in the program counter, branched to the conventional program, and the conventional program is executed. Change device. 4. An address for holding a value obtained by adding +1 to the execution address at that time when the address comparison means determines that the execution address matches the branch source address from the branch source address holding means. Save means, change size holding means for holding a value obtained by subtracting -1 from the size information of the program to be changed corresponding to the branch source address, contents held by the address save means and held by the change size holding means And an adder for adding the contents to be added to the program counter. The controller stores the output address of the adder in the program counter when the addition / change / reduction program is completed. 3. The program change apparatus according to claim 1, wherein the program is branched to execute the conventional program. Place. 5. A change size holding means for holding size information of a program to be changed corresponding to the branch source address, a branch source address of the branch source address holding means, and contents held by the change size storage means. The return address generating means in place of the return address generating means. When the addition / change / reduction program is completed, the control means controls the execution address and the branch source address by the address comparing means from the adding means. Storing the result of addition of the branch source address and the content held by the change size holding means when it is determined that the address matches with the program size, stores the result in the program counter, branches to the conventional program, and executes the conventional program. 3. The program change device according to claim 1, wherein