JPH10228364A - Data transfer device, its controlling method and printing system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a data transfer device, its controlling method and a printing system capable of attaining bus control of high convenience by judging the permission/refusal of data transfer and informing a host of the judged result. SOLUTION: When a data transfer request is outputted from a host (701), a printer side judges whether data can be received or not (702), and when data reception is possible, outputs reception possible information to the host (704). Thereby the host transfers data (705) and the printer receives the transferred data (706) When reception is impossible, the host is informed of the judged result (708). The host receiving the reception impossible information intermittently continues the issue of the data transfer request.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transfer device, a control method thereof, and a printing system.
More specifically, the present invention relates to a data transfer apparatus, a control method thereof, and a printing system for realizing construction of a highly convenient connection environment for shared peripheral devices by automatically performing arbitration for a plurality of data transfer requests. It is.

[0002]

2. Description of the Related Art At present, personal computers (PCs)
To connect SCSI and external peripherals, SCSI (Small
There are various external buses such as puter system interface), RS-232C, and Centronics. However, the external bus used so far is a bus specialized for each peripheral device connected thereto, and has adopted a specific transfer method.

[0003] Further, with the spread of PCs, individuals use one or more PCs, and opportunities to share and use peripheral devices such as printers and scanners are increasing.

A conventional example in which peripheral devices are connected so as to be shared using the external bus will be described with reference to FIG. Output port 1108 of host # 1 1101 such as PC and input port 11 of bus switching device 1103
10 are connected by a connection cable 1105. Similarly, an output port 1109 of the host # 2 1102 and an input port 1112 of the bus switching device 1103 are connected by a connection cable 1106. Further, the output port 1113 of the bus switching device 1103 and the input port 1114 of the peripheral device 1104 such as a printer
07.

The bus switching device 1103 has an input port 11
It has a function of connecting one port selected from 10, 1111, 1112 to the output port 1113. In many cases, the bus switching device 1103 and the peripheral device 1104 are always in a connected state, and the host is connected or disconnected as appropriate, or is connected to another host after being replaced.

[0006] Using the host 1101, the peripheral device 110
First, the user who has issued the request to use the host # 1 1101 and the bus switching device 11
03 is connected. Next, the host # 1 1101 checks which input port of the bus switching device 1103 is connected to the host device. If the input port at that time is connected to the output port 1113 of the bus switching device 1103, the peripheral device is immediately connected. 1104 can be used.

However, if the input port and the output port 1113 of another host are connected by the bus switching device 1103, the port of the bus switching device 1103 is waited until another user finishes using the peripheral device 1114. , The peripheral device 1104 can be used.

As another method of sharing peripheral devices, L
It is possible to connect a host and peripheral devices to an AN (Loacal Area Network) so that they can be shared.
The cost, management load, etc., such as wiring and maintenance of the server, are much greater than those of the conventional example. Therefore, the sharing environment as in the above-mentioned conventional example is effective as a simple peripheral device sharing environment.

[0009]

As described above, in the environment where peripheral devices are shared as described in the conventional example, a bus switching device is prepared and a host is connected to the bus switching device. Switching of buses and sharing of peripheral devices have been performed.

However, when a plurality of users share one peripheral device, every time a request to use the peripheral device is issued, it is checked whether another user is using the peripheral device, Had to make sure that was connected to his host. This is because the above-described external bus used conventionally had only a one-way communication function, so that a shared environment could be constructed only by physically switching the bus or preparing a server or the like. .

In addition, the bus switching device is generally installed near a peripheral device in many cases, and it is often difficult for each user to immediately perform a switching operation.

As described above, in the conventional example, there is a problem that the convenience of switching the bus by the user himself is impaired in the usage environment.

SUMMARY OF THE INVENTION The present invention has been made in view of the above conventional example, and has a data transfer apparatus which realizes highly convenient bus control by judging permission / non-permission of data transfer and notifying the host of the result. A control method and a printing system are provided.

[0014]

SUMMARY OF THE INVENTION The present invention has been made in view of the above conventional example, and has the following configuration. That is, connection means for connecting a plurality of hosts and peripheral devices, and whether a data transmission / reception between the host and the peripheral devices is possible when a data transfer request is issued from one of the plurality of hosts. It has a judging means for judging and, if the result of the judgment indicates that data transmission / reception is possible, a transfer control means for transmitting / receiving data between the host which issued the data transfer request and the peripheral device.

Alternatively, there is provided a method for controlling a data transfer apparatus comprising a plurality of hosts connected to a peripheral device, wherein when a data transfer request is issued from one of the plurality of hosts, the host and the peripheral device are connected. A determining step of determining whether data transmission / reception is possible with the host; and, if the result of the determination is that data transmission / reception is possible, data transmission / reception between the host that issued the data transfer request and the peripheral device is performed. Transfer control step to be performed.

Alternatively, the printing apparatus is connected to a plurality of hosts by the above-described data transfer apparatus, and performs print output based on data received from the host by the data transfer apparatus.

Alternatively, a printing system includes the above-described printing apparatus and a plurality of hosts connected to the printing apparatus.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 1 is a connection diagram of an environment for sharing peripheral devices according to an embodiment of the present invention.

Host # 1 101, Host # 2 102
Is a PC equipped with ports 106 and 107, respectively. Reference numeral 103 denotes a peripheral device such as a printer, which is provided with a plurality of ports 108, 109, and 110. Ports 106 and 10 of host # 1 101 and host # 2102
7 is connected to ports 108 and 110 of the peripheral device 103 via buses 104 and 105, respectively. The bus that can be used in the present embodiment is a condition that the bus can perform bidirectional communication. For example, USB (Universal Serial Bus), I
A bidirectional bus such as IEEE1284 and IEEE1394 is used.

Here, a case where a printer is used as a peripheral device will be described. FIG. 2 is a schematic block diagram of the entire system, FIG. 3 is a block diagram of the host external bus control unit 217, and FIG. 4 is a block diagram of the peripheral device external bus control unit 217.

In FIG. 2, a host 201 corresponds to the host 101 or the host 102 in FIG. Inside the host 201, there are an address signal line 203, a data signal line 204, and a control signal line 205 as a system bus, and a ROM (Read Only Memory) 206 and a RAM (Ra
ndom Access Memory) 207, an overall control unit 208, a display control unit 209, a storage unit 210, an I / O control unit 211, and a host external bus control unit 212. The overall control unit 208 selects each functional block through the address signal line 203, and the data signal line 204 and the control signal line 2
05, the operation of each block is controlled, and the overall operation of the host 201 is controlled.

The ROM 206 stores basic program codes such as a method for controlling access between the overall control unit 208 and each functional block. The ROM 207 is an operating system (hereinafter, referred to as an operating system) of the entire system in which the overall control unit is stored in the ROM 206 or the storage unit 210.
Operating modules, data required during operation, drivers for external peripheral devices, etc., required operating modules,
This is a memory for temporarily storing parameters and the like required by each module during operation.

The display control unit 209 includes a CR (not shown).
It controls an external display device such as a T monitor and a liquid crystal display. The storage unit 210 includes an HDD (Hard Disk Drive),
It is composed of a storage device such as a D-ROM Drive and its control unit, and stores application execution files and data files created by the applications. The I / O control unit 211 is connected to an input device (not shown) such as a keyboard and a mouse, and enables a user to input desired control information.

The host external bus control unit 212 transmits the peripheral device 20 via one of the external buses 213, 224, and 225.
2 and transmits / receives data to / from the peripheral device 202. However, hosts connected via the external buses 224 and 225 are not shown.

The host external bus control unit 212 has a configuration as shown in FIG. The control signal line 205, the data signal line 204, and the address signal line 203 of the system bus are connected to the control unit 31.
1 and controls the buffer unit 304 and the data transfer unit 306 according to a control procedure sent according to an instruction from the host control unit 208.

Data transferred to a peripheral device not shown in FIG.
Are stored in the buffer unit 304.

The data transfer unit 306 generates a signal of a procedure specified by the bus used, and
The data is transmitted and received to and from the peripheral device via the control unit 311 and the result is passed to the control unit 311 or the buffer unit 304.

A user inputs desired control data to the I / O control unit 211 to cause the host to perform a desired operation. The user selects an application or a data file stored in the storage unit 210 while viewing the screen displayed on the external display device, activates the application, and inputs the application to perform a series of operations. When a request to transfer the work result to the peripheral device 202 occurs at that time, data transfer is performed using the host external bus control unit 212 and the external bus 213.

A description will be given by taking a printer as an example of the peripheral device 202 in FIG. The peripheral device 202 has an address signal line 214 as an internal bus, a data signal line 215,
A control signal line 216 is provided. The internal bus includes a peripheral device external bus control unit 217, a motor control unit 218, a head control unit 219, a peripheral device control unit 220, a ROM 221 and a RAM.
222 and an image processing unit 223 are connected. The peripheral device control unit 220 selects each functional block by an address signal line 214, transfers data by a data signal line 215 and a control signal line 216, and
Control the operation of.

The peripheral device external bus control unit 212 is connected to the host 201 via the external bus 213, and transmits and receives data to and from the host 201. Motor control unit 21
Reference numeral 8 drives a paper feed and head drive motor under the control of the peripheral device control unit 220. Head control unit 218
Receives the data to be printed and controls the head to print. The image processing unit 223 further performs image processing on the transferred data.

The ROM 223 stores a program for operating the peripheral device control unit 220. The peripheral device control unit 220 processes data sent to the peripheral device external bus control unit 217 according to the program. Control of other functional blocks to enable printing. RAM 22
Numeral 2 is used to store transmitted data or parameters generated during processing.

The peripheral device external bus control unit 217 has a configuration as shown in FIG. The control signal line 216, the data signal line 215, and the address signal line 214 of the internal bus are connected to the control unit 415.
The switch 405 is switched according to control information sent by an instruction from the peripheral device control unit 220, and the buffer unit 404 and the data transfer units 406, 409,
412 is controlled.

The data transfer units 406, 409, and 412 generate signals of the procedure specified by the bus used, and transmit and receive data to and from peripheral devices via the transceivers 407, 410, and 413. The control unit 41
5 or passed to the buffer unit 404.

First, a series of operations for causing a printer, which is a peripheral device, to execute a printout request from the host will be described with reference to FIGS. Here, a description will be given from a point where a user creates a document by a predetermined application and prints out the document.

When the user issues a print command on the application, this is notified to the printer driver (501).

The printer driver notifies the system of printer setting information such as paper size and print quality (502).

The system requests the application to convert the data (503), and the application converts the print data into data of a predetermined format required by the system and transfers the data to the system (504).

The system stores the transferred data in the RAM 2
07 or stored in the storage unit 210 (505) and notifies the application of termination permission (506). The application receives this permission, ends the printing operation, and shifts to a state of receiving the next operation (507).

The system divides the data stored in step 505 into a data amount large enough to be processed by the printer driver and transfers the data to the printer driver (6).
01).

The printer driver performs image processing for generating image data optimal for the target printer from the received data (602). For example, color space conversion,
Examples include color matching, rasterization, edge enhancement, and softness. In these processes, an optimal combination is selected according to a text area, an image area, and a graphics area.

The image data generated in step 602 is converted into a printer control command (603) and passed to the system together with a data transmission request to the printer (60).
4).

The system transfers the received printer control command to the host external bus control unit 212 (60).
5). The host external bus control unit 212 transmits the received printer control command to the peripheral device external bus control unit 217 via the external bus 213 (606, 607). When the data transfer is completed, the host external bus control unit 212
Notifies the system of the end of data transfer.

The peripheral device external bus control unit 217 that has received the data notifies the peripheral device control unit 220 of the printer that the data has been transmitted. The peripheral device control unit 220 controls each functional block so as to perform printout according to the received data (608).

When notified of the end of the data transfer (609), the system repeats 601 to 609 until one of the pages to be printed ends (610).

The above procedure is repeated for all pages for which printing is requested (611).

The characteristic operation of the printing system according to the present invention will be described with reference to FIGS. FIG. 7 is a flowchart showing the operation of the external bus control unit of the host computer and the external bus control unit of the printer.
6 to 609. FIG. 8 schematically shows the operation status of the external bus at that time. Hereinafter, with reference to FIG. 8, the corresponding processing contents are indicated by reference numerals in FIG.

First, the printing system is in an idle state shown in FIG.

When a request for transferring data of a document to be printed is issued from the host to the printer,
As shown in FIG. 8B, the host external bus control unit 212
Then, a data transfer request is issued (701). The printer that has received the data transfer request determines whether the printer is ready for printing at this time (702, 703). Judgment factors include the state of the external bus as to whether data is received from another host, and the state of the printer itself such as out of paper or ink.

If the data is received and printing is possible, as shown in FIG.
CK) is returned (704). If printing is not possible, a data reception disable notification is returned (708, 709). At this time,
Either NAK information indicating that another host is using the external bus as a cause of printing failure or error information indicating that there is a problem with the printer is returned to the host. By indicating this cause to the user, the host can know why the user cannot print.

The host receiving the data transfer permission notice starts data transfer as shown in FIGS. 8D to 8G (705, 706, 707).

At the same time, the peripheral device control unit 220 of the printer
Determines which of the external buses 408, 411, and 414 the data transfer permission is currently given to the peripheral device external bus control unit 2.
By notifying the control unit 311 of FIG. 17, the data transfer units other than the selected data transfer unit respond to the data transfer request in FIG.
A data transfer disable notification is returned as shown in (e) and (f).

The host that has received the data transfer disable notification continues to issue data transfer requests periodically until the operation of the printer out ends.

As described above, by providing a plurality of external bus ports in the peripheral device and providing control means for data transfer using a protocol capable of bidirectional communication, the bus switching operation which has been manually operated until now can be performed. This can be performed automatically, and a highly convenient peripheral device sharing environment can be easily constructed.

Although the present embodiment has been described using a printer as a peripheral device, the peripheral device is not limited to this.

Here, as an example of the interface between the host computer and the printer, IEEE 13
94 will be described. <Overview of IEEE 1394 Technology> Digital VT for Home Use
With the advent of R and DVD, it is necessary to support real-time and high information amount data transfer of video data and audio data. In order to transfer such video and audio data in real time, and to transfer them to a personal computer (PC) or other digital devices, an interface capable of high-speed data transfer with necessary transfer functions is required. The interface developed from such a viewpoint is IEEE 1394-1995 (High Performance Serial
Bus) (hereinafter, 1394 serial bus).

FIG. 11 shows an example of a network system configured using a 1394 serial bus. This system is provided with devices A, B, C, D, E, F, G, and H. A-B, A-C, B-D, D-E, C-F
, CG, and CH are connected by a twisted pair cable of a 1394 serial bus.
The devices A to H are, for example, PC, digital VTR, DV
D, digital camera, hard disk, monitor, etc.

The connection method between the devices is such that the daisy chain method and the node branch method can be mixed.
A highly flexible connection is possible.

Each device has its own unique ID, and by recognizing each other, forms a single network in a range connected by a 1394 serial bus. One 1394 connection between each digital device
Just by sequentially connecting with a serial bus cable, each device plays a role of relay, and constitutes one network as a whole. In addition, a plug-and-play function, which is a feature of the 1394 serial bus, has a function of automatically recognizing the device and recognizing the connection status when a cable is connected to the device.

In the system shown in FIG. 11, when a device is deleted from the network or newly added, the bus is automatically reset, and the network configuration up to that point is reset. Then, rebuild a new network. With this function, the configuration of the network at that time can be constantly set and recognized.

The data transfer rate is 100/200/4
It has a transmission rate of 00 Mbps, and a device having a higher transfer rate supports the transfer rate of times and is compatible.

As the data transfer mode, asynchronous data (Asynchronous data: A
Asynchronous transfer mode for transferring sync data)
Synchronous data such as video data and audio data in real time (Isochronous data: hereafter Iso data)
There is an Isochronous transfer mode for transferring data. This Asy
In each cycle (usually 125 μS per cycle), the nc data and the Iso data follow the transfer of a cycle start packet (CSP) indicating the start of the cycle, and
The so data is transferred in a mixed manner within the cycle while giving priority to the transfer of the so data.

Next, FIG. 12 shows the components of the 1394 serial bus.

The 1394 serial bus has a layer (hierarchical) structure as a whole, as shown in FIG.
The most hardware type is a 1394 serial bus cable, which has a connector port to which a connector of the cable is connected.
There are layers and link layers.

The hardware section is a substantial interface chip. The physical layer performs coding and control related to connectors, and the link layer performs packet transfer and cycle time control.

The transaction layer of the firmware section manages data to be transferred (transacted), and issues commands such as Read and Write. The management layer is a part that manages the connection status and ID of each connected device and manages the configuration of the network.

The hardware and firmware are the actual configuration of the 1394 serial bus.

The software application
The layer differs depending on the software used, and is a part that defines how data is placed on the interface.
It is specified by a protocol such as the V protocol.

The above is the configuration of the 1394 serial bus.

Next, FIG. 13 shows a diagram of the address space in the 1394 serial bus.

Each device (node) connected to the 1394 serial bus always has a 64-bit address unique to each node. By storing this address in the ROM, the node address of the user or the other party can always be recognized, and communication specifying the other party can be performed.

The addressing of the 1394 serial bus is based on the IEEE1212 standard, and the address setting is such that the first 10 bits specify the bus number.
The next 6 bits are used for specifying the node ID number. The remaining 48 bits become the address width given to the device,
Each can be used as a unique address space. The last 28 bits store information such as identification of each device and designation of use conditions as a unique data area.

The above is the outline of the technology of the 1394 serial bus.

Next, the technical portion which can be said to be a feature of the 1394 serial bus will be described in more detail. <Electrical Specifications of 1394 Serial Bus> FIG.
4 shows a sectional view of a serial bus cable.

In the 1394 serial bus, a power supply line is provided in a connection cable in addition to two twisted pair signal lines. As a result, power can be supplied to a device having no power supply, a device whose voltage has dropped due to a failure, and the like.

The voltage of the power supply flowing in the power supply line is 8 to 40.
V and the current are specified as the maximum current DC 1.5A. <DS-Link encoding> DS-Link of data transfer format adopted in the 1394 serial bus
FIG. 15 is a diagram for explaining the encoding method.

In the 1394 serial bus, DS-Lin
The k (Data / Strobe Link) coding method is adopted. This DS-link coding method is suitable for high-speed serial data communication, and its configuration requires two signal lines. The main data is sent to one of the twisted pairs, and the strobe signal is sent to the other twisted pair.

On the receiving side, the clock can be reproduced by taking the exclusive OR of this communicated data and the strobe.

The advantages of using the DS-Link coding method include higher transfer efficiency as compared with other serial data transfer methods, and the circuit scale of the controller LSI can be reduced because a PLL circuit is not required.
Since there is no need to send information indicating the idle state when there is no data to be transferred, the power consumption can be reduced by setting the transceiver circuit of each device to the sleep state. <Sequence of Bus Reset> In the 1394 serial bus, each connected device (node) is given a node ID and recognized as a network configuration.

When there is a change in the network configuration, for example, a change occurs due to an increase or decrease in the number of nodes due to insertion / removal of a node or power ON / OFF, etc., and when it is necessary to recognize a new network configuration, the change is made. Each detected node sends a bus reset signal on the bus,
Enter the mode to recognize the new network configuration. The method of detecting the change at this time is performed by detecting a change in the bias voltage on the 1394 port substrate.

When a bus reset signal is transmitted from a certain node, the physical layer of each node transmits the bus reset signal to the link layer at the same time as receiving the bus reset signal, and transmits the bus reset signal to another node. . After all the nodes finally detect the bus reset signal, the bus reset is activated.

The bus reset is also activated by the above-described activation by hardware insertion / removal due to cable disconnection or network abnormality or the like, and also by directly issuing a command to the physical layer by host control from a protocol.

Further, when the bus reset is activated, the data transfer is suspended, the data transfer during this period is waited, and after the end, the data transfer is resumed under a new network configuration.

The above is the bus reset sequence. <Sequence of Node ID Determination> After the bus reset, each node starts an operation of giving an ID to each node in order to construct a new network configuration. The general sequence from the bus reset to the determination of the node ID at this time will be described with reference to the flowcharts of FIGS. 23, 24, and 25.

The flowchart of FIG. 23 shows a series of bus operations from the occurrence of a bus reset until the node ID is determined and data transfer can be performed.

First, as step S101, the occurrence of a bus reset in the network is constantly monitored, and if a bus reset occurs due to power ON / OFF of a node, the process proceeds to step S102.

In step S102, from the state where the network is reset, a parent-child relationship is declared between the directly connected nodes in order to know the connection status of the new network. As step S103,
When the parent-child relationship is determined between all nodes, step S
One route is determined as 104. Until the parent-child relationship is determined between all nodes, the parent-child relationship is declared in step S102, and the route is not determined.

After the route is determined in step S104, the process of setting a node ID for giving an ID to each node is performed in step S105. Node IDs are set in a predetermined node order, and I
The setting operation is repeatedly performed until D is given. When the IDs are finally set in all the nodes in step S106, the new network configuration is recognized in all the nodes. And data transfer is started.

In the state of step S107, a mode for monitoring the occurrence of a bus reset again is entered.
When the bus reset occurs, the setting operation from step S101 to step S106 is repeatedly performed.

The above is a description of the flowchart of FIG. 23. The flowchart from FIG. 23 shows the part from the bus reset to the route determination and the procedure from the route determination to the end of the ID setting in a more detailed flowchart. Are shown in FIGS. 24 and 25, respectively.

First, the flowchart of FIG. 24 will be described.

When a bus reset occurs in step S201, the network configuration is reset once. The occurrence of a bus reset is constantly monitored in step S201.

Next, as a first step of re-recognizing the network connection status reset in step S202, a flag indicating a leaf (node) is set for each device. Further, in step S203, each device checks how many ports it has are connected to other nodes.

In accordance with the result of the number of ports in step S204, the number of undefined (undetermined parent-child) ports is checked in order to start the declaration of the parent-child relationship. Immediately after the bus reset, the number of ports = the number of undefined ports. However, as the parent-child relationship is determined, the number of undefined ports detected in step S204 changes.

First, immediately after a bus reset, only a leaf can declare a parent-child relationship. A leaf can be known by checking the number of ports in step S203. In step S205, the leaf declares "I am a child and the other is a parent" to the node connected thereto, and ends the operation.

A node which has a plurality of ports in step S203 and is recognized as a branch has a number of undefined ports> 1 in step S204 immediately after the bus reset.
Moving to step S206, a flag of branch is first set, and in step S207, the process waits for acceptance of "parent" in the parent-child relationship declaration from the leaf.

The leaf declares a parent-child relationship, and the branch that has received the declaration in step S207 appropriately returns to step S20.
Confirm the number of undefined ports of 4 and find that the number of undefined ports is 1
If it becomes, it becomes possible to declare “I am a child” in step S205 for the node connected to the remaining port. After the second time, step S204
Even if the number of undefined ports is confirmed in step S207, for a branch having two or more ports, the process waits again in step S207 to accept a "parent" from a leaf or another branch.

Finally, if any one branch or exceptional leaf (because it did not operate quickly to allow child declaration) becomes zero as a result of the number of undefined ports in step S204, And the only node for which the number of undefined ports has become zero (all are determined as parent ports) is flagged as a root in step S208,
In step S209, the route is recognized.

Thus, the process from the bus reset shown in FIG. 24 to the declaration of the parent-child relationship between all the nodes in the network is completed.

Next, the flowchart of FIG. 25 will be described.

First, in the sequence up to FIG.
Since the information of the flag of each node such as branch and route is set, it is separated based on this information in step S301.

As a task of assigning an ID to each node, an ID can first be set from a leaf. The IDs are set in ascending order of leaf → branch → route (node number = 0).

In step S302, the number N (N is a natural number) of leaves existing in the network is set. Thereafter, in step S303, each leaf requests the root to give an ID. If there are a plurality of such requests, the route performs arbitration (operation of arbitration into one) in step S304, and proceeds to step S3.
As 05, an ID number is given to one winning node, and a failure result is notified to the losing node. In step S306, the leaf whose ID acquisition has failed fails issues an ID request again, and repeats the same operation. In step S307, the ID information of the node is transferred to all the nodes by broadcasting from the leaf whose ID has been acquired. One node I
When the broadcasting of the D information is completed, step S30
As 8, the number of remaining leaves is reduced by one. here,
In step S309, when the number of the remaining leaves is one or more, the operation from the ID request in step S303 is repeatedly performed, and finally, when all the leaves broadcast the ID information, N = 0 in step S309, and the next Moves to the branch ID setting.

The setting of the branch ID is performed in the same manner as in the leaf setting.

First, at step S310, the number M (M is a natural number) of branches existing in the network is set. Thereafter, in step S311, each branch requests the root to give an ID. On the other hand, the root performs arbitration as step S312, and gives the branch in order from the winning branch to the next youngest number that has been given to the leaf. In step S313, the root notifies the branch that issued the request of ID information or a failure result, and in step S314, the branch whose ID acquisition has failed fails issues an ID request again and repeats the same operation. In step S315, the ID information of the node is broadcast and transferred to all the nodes from the branch where the ID has been obtained. When the broadcast of the one node ID information ends, the number of remaining branches is reduced by one in step S316. Here, step S
If the number of the remaining branches is 1 or more as 317, the operation from the ID request in step S311 is repeated.
The process is performed until all the branches finally broadcast the ID information. When all the branches have acquired the node IDs, M = 0 in step S317, and the branch ID acquisition mode ends.

When the process ends so far, the only node from which the ID information has not been finally obtained is the root, so that step S
318 is set as the own ID number among the unassigned numbers, and the root I
Broadcast D information.

Thus, as shown in FIG. 25, the procedure from the determination of the parent-child relationship to the setting of the IDs of all the nodes is completed.

Next, the operation in the actual network shown in FIG. 16 will be described as an example with reference to FIG.

As an explanation of FIG. 16, (root) node B
Are directly connected to node A and node C,
Further, a node D is directly connected below the node C, and a node E and a node F are directly connected below the node D in a hierarchical structure. The procedure for determining the hierarchical structure, the root node, and the node ID will be described below.

After the bus reset, a parent-child relationship is declared between the directly connected ports of each node in order to recognize the connection status of each node. The parent and child can be said to be such that the parent is higher in the hierarchical structure and the child is lower.

In FIG. 16, it is the node A that first declared the parent-child relationship after the bus reset. Basically, a node (called a leaf) having a connection to only one port of the node can declare a parent-child relationship. Since the user can first know that the connection is only one port, he / she recognizes that this is the edge of the network, and the parent-child relationship is determined from the node that has operated earlier in the network. In this way, the port on the side that has declared the parent-child relationship (node A between AB) is set as a child,
The port on the other end (node B) is set as the parent. Thus, the child-parent between the nodes AB and the child-parent between the nodes E-D.
The parent and the node FD are determined as child-parent.

[0111] Further, the layer goes up once more, and among nodes having a plurality of connection ports (branches), the declaration of the parent-child relationship is sequentially higher from the node that has received the declaration of the parent-child relationship from another node. I will go. In FIG. 16, after the parent-child relationship between the node D and the node D-F and the node D-F is determined,
The parent-child relationship is declared for node C, and as a result, child-parent is determined between nodes D and C.

The node C receiving the parent-child relationship declaration from the node D becomes the node B connected to another port.
Declare a parent-child relationship. As a result, a child-parent is determined between the nodes C and B.

Thus, a hierarchical structure as shown in FIG. 16 is formed, and the node B which has become the parent in all finally connected ports is determined as the root node. There is only one route in one network configuration.

In FIG. 16, node B is determined to be the root node. Node B, which has received a parent-child relationship declaration from node A, makes a parent-child relationship declaration to other nodes at a fast timing. If so, the root node may have moved to another node. That is, any node may become a root node depending on the transmission timing, and the root node is not always constant even in the same network configuration.

When the root node is determined, the process enters a mode for determining each node ID. Here, all nodes notify their determined node IDs to all other nodes (broadcast function).

The self ID information includes its own node number, information on the connected position, the number of ports it has, the number of ports it has connected, information on the parent-child relationship of each port, and the like.

As a procedure for assigning node ID numbers, first, nodes can be started from a node (leaf) connected to only one port, and node numbers = 0, 1, 2,... .

The node that has obtained the node ID broadcasts information including the node number to each node. Thereby, it is recognized that the ID number is “assigned”.

When all the leaves have obtained their own node IDs, the process moves to the branch and the node ID number following the leaf is assigned to each node. Similarly to the leaf, the node ID information is broadcast sequentially from the branch to which the node ID number is assigned, and finally, the root node broadcasts its own ID information. That is, the root always owns the maximum node ID number.

As described above, the assignment of the node IDs of the entire hierarchical structure is completed, the network configuration is reconstructed, and the bus initialization operation is completed. <Arbitration> In the 1394 serial bus, arbitration (arbitration) of the right to use the bus is always performed prior to data transfer. Since the 1394 serial bus is a logical bus network, each individually connected device relays the transferred signal to transmit the same signal to all devices in the network.
Arbitration is necessary to prevent packet collisions. This allows only one node to transfer at a given time.

As a diagram for explaining arbitration, FIG. 17 (a) shows a diagram of a bus use request, and FIG. 17 (b) shows a diagram of a bus use permission, which will be described below.

When arbitration starts, one or more nodes issue a bus use request to the parent node. Nodes C and F in FIG. 17A are nodes that have issued requests for the right to use the bus. The parent node (node A in FIG. 17) that has received the request further issues (relays) a bus use request toward the parent node. This request is finally delivered to the arbitration route.

The root node having received the bus use request determines which node uses the bus. This arbitration work can be performed only by the root node, and the node that has won the arbitration is given permission to use the bus. FIG.
In (b), use permission is given to the node C, and use of the node F is rejected. A DP (data prefix) packet is sent to the node that lost the arbitration to notify that the node has been rejected. The rejected node use request waits until the next arbitration.

As described above, the node that has won the arbitration and has obtained the bus use permission can start transferring data thereafter.

Here, a series of arbitration flows will be described with reference to a flowchart shown in FIG.

In order for a node to be able to start data transfer, the bus must be idle. In order to recognize that the data transfer that has been performed earlier is completed and that the bus is currently idle, a predetermined idle time gap length that is individually set in each transfer mode (eg, an idle time gap length).
Sub-action gap)
Each node determines that its own transfer can be started.

In step S401, it is determined whether a predetermined gap length corresponding to each data to be transferred, such as Async data and Iso data, has been obtained. Unless the predetermined gap length is obtained, the request for the right to use the bus required to start the transfer cannot be made, so the process waits until the predetermined gap length is obtained.

If a predetermined gap length is obtained in step S401, it is determined in step S402 whether there is data to be transferred. If so, a request for a bus use right is issued in step S403 to secure a bus for transfer. Emit to the route. At this time, the transmission of the signal indicating the request for the right to use the bus is finally delivered to the route while relaying each device in the network as shown in FIG. If there is no data to be transferred in step S402,
Wait as it is.

Next, at step S404, when the route receives one or more bus use requests at step S403, the route checks at step S405 the number of nodes that have issued use requests. If the selection value in step S405 is the number of nodes = 1 (the number of nodes that issued the use right request is one), the immediately subsequent bus use permission is obtained for that node. If the selection value in step S405 is the number of nodes> 1 (the number of nodes that have issued use requests), the root performs arbitration work in step S406 to determine one node to which use permission is given. This arbitration work is fair, and it is configured such that the same node is not always granted permission, but rights are equally given.

As step S407, step S40
At step 6, the node arbitrates the route from among the plurality of nodes that have issued the use request and selects one node whose use has been granted and another node that has lost. Here, for one node that has been arbitrated and has obtained use permission, or a node that has obtained use permission without arbitration with the number of use request nodes = 1 from the selection value in step S405, the route is set to that node as step S408. A permission signal is sent to it. The node that has received the permission signal starts transferring data (packets) to be transferred immediately after receiving the permission signal. Further, the nodes for which the arbitration in step S406 has been defeated and the bus use has not been permitted are provided in step S406
At step 409, a DP (data prefix) packet indicating an arbitration failure is sent from the root, and the node that has received the packet returns to step S401 to issue a bus use request for performing transfer again, until the predetermined gap length is obtained. stand by.

The flow of the arbitration has been described above with reference to the flowchart of FIG. <Asynchronous transfer> Asynchronous transfer is asynchronous transfer. FIG. 18 shows a temporal transition state in the asynchronous transfer. The first sub-action gap in FIG. 18 indicates the idle state of the bus. When the idle time reaches a fixed value, the node desiring to transfer determines that the bus can be used, and executes arbitration for acquiring the bus.

When the use of the bus is obtained by arbitration, data transfer is executed in packet format.
After the data transfer, the receiving node sets ack (reception confirmation return code) of the reception result for the transferred data to a.
After a short gap of ck gap, the transfer is completed by returning and responding or sending a response packet. The acK is composed of 4-bit information and a 4-bit checksum, and includes information such as success, busy status, and pending status, and is immediately returned to the source node.

Next, FIG. 19 shows an example of the packet format of the asynchronous transfer.

A packet has a header part in addition to the data part and the data CRC for error correction. The header part has a destination node ID, a source node ID, a transfer data length and various data as shown in FIG. Code etc. are written,
A transfer is performed.

Asynchronous transfer is one-to-one communication from a self-node to a partner node. The packet transferred from the transfer source node is distributed to each node in the network, but the address other than the address for itself is ignored, so that only one destination node reads the packet.

The above is the description of the asynchronous transfer. <Isochronous (synchronous) transfer> Isochronous transfer is synchronous transfer. This isochronous transfer, which can be said to be the greatest feature of the 1394 serial bus, is
This transfer mode is suitable for transferring data that requires real-time transfer, such as multimedia data such as O video data and audio data.

When the asynchronous transfer (asynchronous) is 1
Unlike the one-to-one transfer, the isochronous transfer is uniformly transferred from one transfer source node to all other nodes by the broadcast function.

FIG. 20 is a diagram showing a temporal transition state in isochronous transfer.

The isochronous transfer is executed at fixed time intervals on the bus. This time interval is called an isochronous cycle. The isochronous cycle time is 125 μS. The cycle start packet indicates the start time of each cycle, and plays a role of adjusting the time of each node. A node called a cycle master transmits a cycle start packet, and after a transfer in a previous cycle is completed, a predetermined idle period (subaction gap) is passed, and then the start of this cycle is announced. Send a cycle start packet. The time interval at which this cycle start packet is transmitted is 125 μS.

FIG. 20 shows channel A, channel B,
As indicated by the channel C, a plurality of types of packets can be separately transferred by being given channel IDs in one cycle. This allows real-time transfer between a plurality of nodes at the same time, and the receiving node fetches only the data of the channel ID desired by itself. The channel ID does not represent the address of the transmission destination, but merely gives a logical number for the data. Therefore, the transmission of a certain packet is 1
From one source node to all other nodes,
It will be transferred by broadcast.

Prior to the packet transmission in the isochronous transfer, arbitration is performed as in the asynchronous transfer. However, since the communication is not one-to-one communication as in the asynchronous transfer, there is no ack (reception confirmation reply code) in the isochronous transfer.

The iso gap (isochronous gap) shown in FIG. 20 indicates an idle period necessary for recognizing that the bus is empty before performing the isochronous transfer. After the predetermined idle period has elapsed, a node that wishes to perform isochronous transfer determines that the bus is free, and can perform arbitration before transfer.

Next, FIG. 21 shows an example of a packet format of the isochronous transfer, which will be described.

Each packet divided into each channel has a header portion in addition to a data portion and data CRC for error correction. The header portion has a transfer data length and a channel number as shown in FIG. , And other various codes and a header CRC for error correction are written and transferred.

The above is the description of the isochronous transfer. <Bus Cycle> In an actual transfer on the 1394 serial bus, isochronous transfer and asynchronous transfer can coexist. FIG. 22 is a diagram showing a state of a temporal transition of the transfer state on the bus in which the isochronous transfer and the asynchronous transfer are mixed at that time.

The isochronous transfer is executed prior to the asynchronous transfer. The reason is that after the cycle start packet, the isochronous transfer can be started with a gap length (isochronous gap) shorter than the gap length (subaction gap) of the idle period required to start the asynchronous transfer. . Therefore, the isochronous transfer is executed with priority over the asynchronous transfer.

In the general bus cycle shown in FIG. 22, a cycle start packet is transferred from the cycle master to each node at the start of cycle #m. As a result, each node adjusts the time, and after waiting for a predetermined idle period (isochronous gap), the node that should perform isochronous transfer performs arbitration and starts packet transfer. In FIG. 22, the channel e, the channel s, and the channel k are sequentially transferred in an isochronous manner.

After the operations from the arbitration to the packet transfer are repeatedly performed for the given channel, when all the isochronous transfers in the cycle #m are completed, the asynchronous transfer can be performed.

When the idle time reaches the subaction gap where asynchronous transfer is possible, the node that wishes to perform asynchronous transfer determines that arbitration can be performed.

However, during the period in which the asynchronous transfer can be performed, there is a sub-action gap for starting the asynchronous transfer until the end of the isochronous transfer and the time (cycle synch) to transfer the next cycle start packet. Only when they are given.

In cycle #m of FIG. 22, two packets (packet 1 and packet 2) of isochronous transfer for three channels and then asynchronous transfer (including ack) are transferred. After this asynchronous packet 2, the time to start cycle m + 1 (cycle syn.
ch), the transfer in cycle #m ends here.

However, during the asynchronous or synchronous transfer operation, the time to transmit the next cycle start packet (cyc
If le synch) is reached, the cycle start packet of the next cycle is transmitted after waiting for an idle period after the transfer is completed, without forcibly interrupting the transfer. That is, when one cycle continues for 125 μS or more, it is assumed that the next cycle is shortened by that much from the reference 125 μS. Thus, the isochronous cycle is 125 μS
Can be exceeded or shortened based on the standard.

However, the isochronous transfer is always executed if necessary every cycle to maintain the real-time transfer, and the asynchronous transfer may be transferred to the next and subsequent cycles due to the shortened cycle time.

When the present invention is implemented on IEEE1394, the connection shown in FIG. 1 is configured to be taken in as a part in FIG. In this case, the arbitration of the bus is performed as shown in FIGS.
The device that has become the root in the parent-child relationship declaration after the bus reset described in 4 will be performed. Therefore, in order for the host to notify the printer of the print request, it is necessary to request the device whose root is the host to request the use of the bus and obtain the right to use the device as a preliminary step. Similarly, when transmitting a print enable notification (ACK) or a print disable notification (NAK) to a host that has issued a print request from a printer, a bus use request is issued to the root and a bus use right is issued. You will be notified after acquiring As described above, the bus arbitration work by the route is involved, but the present invention can be implemented. (Second Embodiment) In the first embodiment, while a peripheral device gives data transfer permission to a certain host,
There is no use for other hosts to issue data transfer requests without knowing it. An embodiment for improving this point will be described below.

The configuration of the printing system according to the second embodiment is the same as that of the first embodiment. Therefore, the differences will be described with reference to FIGS.

FIG. 9 is a flowchart of a control procedure by the external bus control unit of the host and the printer in the second embodiment, and corresponds to steps 609 to 609 described in FIG. FIG. 10 schematically shows the operation status of the external bus at that time.

First, the printing system is in an idle state shown in FIG.

When a request to transfer data of a document to be printed is issued from the host to the printer,
As shown in FIG. 10B, the host external bus control unit 21
2 issues a data transfer request (901). Upon receiving the data transfer request, the printer checks the status of the printer itself, such as the absence of paper or ink (902), and determines that the printer is ready for printing (903, 904).

If printing is not possible, a data rejection notice is issued to the host together with the cause (91).
0), the host notifies the user of the cause, so that the user can know the cause of the print failure (91).
1).

When data is received and printing is possible, as shown in FIG. 10C, data reception indicating that the host other than the host for which the data transfer request has been accepted has entered a printout operation. A refusal notice is issued (904). Next, a data transfer permission notification is issued to the requesting host as shown in FIG. 10D (905).

The host having received the data transfer permission notice starts data transfer as shown in FIG.
Printing results can be obtained (906, 907, 90
8).

After the end of the printout operation, as shown in FIG. 10 (f), another host receives a data receivable notice indicating that it is ready to start the next printout operation. Issue.

The host that has received the data receivable notice issues a data transfer request when there is a document to be printed.

As described above, by providing a plurality of external bus ports in the peripheral device and providing data transfer control means using a communication protocol capable of two-way communication, a bus switching operation which has been manually operated until now is provided. Can be automatically performed, and a highly convenient peripheral device sharing environment can be easily constructed.

As described above, when a data transfer request is issued from a certain host to the first embodiment, a data reception disable notification is issued to another host, whereby waste from the host is avoided. Issue of a data transfer request can be eliminated.

Further, in the first and second embodiments, a printer has been described as a peripheral device, but the peripheral device is not limited to this.

[0167]

[Other Embodiments] Even if the present invention is applied to a system including a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.), an apparatus (for example, a copying machine) Machine, facsimile machine, etc.).

Further, an object of the present invention is to supply a storage medium storing a program code of software for realizing the functions of the above-described embodiments to a system or an apparatus, and to provide a computer (or CPU) of the system or apparatus.
Or MPU) reads and executes the program code stored in the storage medium.

In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiment, and the storage medium storing the program code constitutes the present invention.

Examples of the storage medium for supplying the program code include a floppy disk, hard disk, optical disk, magneto-optical disk, CD-ROM, and CD.
-R, a magnetic tape, a nonvolatile memory card, a ROM, or the like can be used.

When the computer executes the readout program codes, not only the functions of the above-described embodiment are realized, but also the OS (Operating System) running on the computer based on the instructions of the program codes. ) Performs part or all of the actual processing, and the processing realizes the functions of the above-described embodiments.

Further, after the program code read from the storage medium is written into a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer, based on the instructions of the program code, The case where the CPU of the function expansion board or the function expansion unit performs part or all of the actual processing, and the function of the above-described embodiment is realized by the processing.

[0173]

As described above, according to the present invention,
When a data transfer request is issued from a certain host, the permission / rejection of data transfer is determined by a determination step of determining whether data transfer is possible and a notification step of notifying the result of the determination step. The present invention relates to a data transfer method and a device that realize highly convenient bus control by making a determination and notifying the host of the result.

[0174]

[Brief description of the drawings]

FIG. 1 is a block diagram of a printing system according to the present invention.

FIG. 2 is a block diagram of a printing system according to the present invention.

FIG. 3 is a block diagram of an external bus control unit of the host according to the present invention.

FIG. 4 is a block diagram of an external bus control unit of the printer according to the present invention.

FIG. 5 is a flowchart of a print processing procedure according to the present invention.

FIG. 6 is a flowchart of a print processing procedure according to the present invention.

FIG. 7 is a flowchart of a control procedure by an external bus control unit according to the first embodiment of the present invention.

FIG. 8 is a diagram schematically illustrating a data transfer operation according to the first embodiment of the present invention.

FIG. 9 is a flowchart of a control procedure performed by the external bus control unit according to the first embodiment of the present invention.

FIG. 10 is a diagram schematically illustrating a data transfer operation according to the first embodiment of the present invention.

FIG. 11 is a diagram illustrating an example of a network system configured using a 1394 serial bus.

FIG. 12 is a diagram showing components of a 1394 serial bus.

FIG. 13 is a diagram showing a diagram of an address space in a 1394 serial bus.

FIG. 14 is a diagram showing a sectional view of a 1394 serial bus cable.

FIG. 15 is a diagram illustrating a DS-Link encoding system of a data transfer format adopted in a 1394 serial bus.

FIG. 16 is a diagram illustrating an example of a hierarchical structure of nodes.

FIG. 17 is a diagram illustrating arbitration of a bus.

FIG. 18 is a diagram showing a temporal transition state in asynchronous transfer.

FIG. 19 is a diagram illustrating an example of an asynchronous transfer packet format.

FIG. 20 is a diagram showing a temporal transition state in isochronous transfer.

FIG. 21 is a diagram of a packet format for isochronous transfer.

FIG. 22 is a diagram showing a state of a temporal transition of a transfer state on a bus in which isochronous transfer and asynchronous transfer are mixed.

FIG. 23 is a flowchart of a procedure from bus reset to data transfer.

FIG. 24 is a detailed flowchart of a procedure from bus reset to route determination.

FIG. 25 is a flowchart of a procedure from route determination to ID setting end.

FIG. 26 is a flowchart of an arbitration procedure.

FIG. 27 is a block diagram of a conventional printing system.

[Explanation of symbols]

 101, 102 Host 103 Peripheral device 208 Overall control unit 211 I / O control unit 212 Host external bus control unit 217 Peripheral device external bus control unit 220 Peripheral device control unit

Claims (14)

[Claims] A connection means for connecting a plurality of hosts to a peripheral device; and a data transfer request between the host and the peripheral device when a data transfer request is issued from one of the plurality of hosts. Determining means for determining whether or not there is, and as a result of the determination, if data transmission / reception is possible, transfer control means for performing data transmission / reception between the host that issued the data transfer request and the peripheral device, A data transfer device comprising: 2. The data transfer apparatus according to claim 1, wherein the transfer control unit notifies the host that has issued the data transfer request that the data cannot be transferred unless data transmission / reception is possible. 3. The method according to claim 1, wherein the determining unit determines that data transmission / reception is not possible during communication with a host other than the source of the data transfer request. 3. The data transfer device according to claim 2, wherein notification is made that communication is being performed with a host other than the host. 4. The method according to claim 1, wherein the determining unit determines that data transmission / reception is not possible when the data transfer apparatus is in an error state. 3. The data transfer device according to claim 2, wherein the data transfer device notifies that an error has occurred. 5. The data transfer control means, if data transmission / reception is possible, notifies a host other than the host that issued the data transfer request that data transfer is not possible, and communicates with the host that issued the data transfer request. The data transfer device according to claim 1, wherein data transmission and reception are performed with a peripheral device. 6. The transfer control means notifies the other hosts that data transfer is possible after the end of data transmission / reception between the host that issued the data transfer request and the peripheral device. The data transfer device according to claim 5, wherein: 7. A method for controlling a data transfer device, comprising connecting a plurality of hosts and a peripheral device, wherein when a data transfer request is issued from one of the plurality of hosts, the host and the peripheral device are controlled. A determining step of determining whether data can be transmitted and received with the peripheral device; and Controlling the data transfer device to perform the transfer. 8. The data transfer apparatus according to claim 7, wherein the transfer control step notifies the host that issued the data transfer request that the data cannot be transferred unless data transmission / reception is possible. Control method. 9. The determining step determines that data transmission / reception is not possible during communication with a host other than the source of the data transfer request. The transfer control step includes: 9. The control method for a data transfer device according to claim 8, wherein notification is made that communication is being performed with a host other than the host. 10. The determining step determines that data transmission / reception is not possible when an error state occurs in the data transfer device. The transfer control step includes: 9. The method according to claim 8, wherein a notification that an error has occurred is provided. 11. The transfer control step, if data transmission / reception is possible, notifies a host other than the host that issued the data transfer request that data transfer is not possible, and communicates with the host that issued the data transfer request. The method of controlling a data transfer device according to claim 7, wherein data is transmitted / received to / from a peripheral device. 12. The transfer control step, after completion of data transmission / reception between the host that has issued the data transfer request and the peripheral device, notifies other hosts that data transfer is possible. The method for controlling a data transfer device according to claim 11, wherein: 13. A data transfer device according to claim 1, wherein the data transfer device is connected to a plurality of hosts, and prints out based on data received from the host by the data transfer device. Printing device. 14. A printing device according to claim 13,
A printing system comprising: a plurality of hosts connected to the apparatus.