JPH10223862A - Semiconductor memory element and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce isolated regions to realize a high integration, by isolating memory elements through first and second isolating regions in axial directions Y and X respectively. SOLUTION: Mutually parallel active regions 1' continuous in the X-axis direction but at a specified spaces in the Y-axis direction and mutually parallel first isolating regions arranged between the active regions are formed on a semiconductor substrate with word lines 21-24 formed in the Y-axis direction. In an Si substrate between the word lines 21-24 sources 25 and drains 26 doped with a first conductivity type impurity are formed to form memory elements. To isolate the memory elements having the word lines, sources and drains second isolating regions 27 doped with a second conductivity type impurity opposite to the first conductivity type impurity are formed on specified points of the active regions.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device and a method of manufacturing the same, and more particularly, to a technique for improving a device isolation structure.

[0002]

2. Description of the Related Art Conventionally, DRAM (Dynamic Random Acces
As shown in FIG. 4, the memory element forms a rectangular active region 1 in which a memory cell is formed, and a thick oxide film (filled oxide film) is formed on a non-active region 2 excluding the active region 1. It is formed by applying a LOCOS (Local Oxidation of Silicon) method of forming and electrically isolating the memory elements.

That is, a structure in which an active region 1 in which a memory element (not shown) is formed is surrounded by a filled oxide film 2 to block a flow of electric charge between the memory elements, and a principle of isolating the memory element. In order to form a channel between a source and a drain of a memory element, it is necessary to apply a voltage higher than a predetermined voltage (threshold voltage) to a gate. For example, if the thickness of the filled oxide film is 10 times larger than the thickness of the gate oxide film, and if the transistor formed on the filled oxide film is turned on, the transistor on the active region is turned on. It is necessary to apply a voltage ten times the voltage to the gate. Therefore, even if a voltage necessary to turn on the transistor in the normal active region is applied to the gate of the transistor formed on the filled oxide film, the transistor is not turned on based on the principle that the transistor is not turned on. It is a method of electrically isolating.

Next, a conventional method of electrically isolating memory elements by performing such a LOCOS method will be described with reference to FIG.
5 (A) to 5 (C) and FIGS. 6 (D) to 6 (F). First, as shown in FIGS. 4 and 5A, the silicon substrate 11 is oxidized to form a pad oxide film having a thickness of 35 n.
A silicon oxide film 12 having a thickness of about m is formed, and a silicon nitride film 13 as an antioxidant film is deposited on the silicon oxide film 12 to a thickness of 100 nm.

Next, a photosensitive film is formed on the silicon chamber film 13.
After coating 14, photolithography is performed using a mask (not shown) to form an active region 1 where a memory element is formed and a non-active region 2 where a memory element is not formed. Of the photosensitive film 14 is removed. Next, as shown in FIG. 5B, the silicon nitride film 13 on the non-active region 2 whose surface has been exposed by the removal of the photosensitive film 14 is removed by dry etching, and then the active region 1 is removed. The remaining photosensitive film 14 is removed.

Next, as shown in FIG. 5C, when the silicon substrate 11 is subjected to wet oxidation using water vapor, the remaining active region 1 of the silicon nitride film 13 as an antioxidant film is not oxidized, The non-active region 2 not covered with the nitride film 13 is oxidized, and an oxide film (called a filled oxide film) 15 having a thickness of about 800 nm grows. At this time, SiO 2 is formed below the edge of the silicon nitride film 13.
2 penetrates to form a bird's beak 15 ', and the thick oxide film 15 serves to electrically isolate the memory elements, thereby isolating the memory elements by the LOCOS method.

As described above, the active region 1 in which the memory element is formed is surrounded by the filled oxide film 2, and when the isolation operation between the memory elements is completed, as shown in FIG. 6D, the active region 1 remains in the active region. After removing the silicon nitride film 13 and the silicon oxide film 12 that have been formed and growing a gate oxide film 16 to a thickness of about 35 nm over the entire surface of the semiconductor substrate, FIG.
As shown in FIG. 6E, polysilicon is deposited on the active region and patterned to form word lines 17, and as shown in FIG. 6F, impurities are ion-implanted into the silicon substrate on both sides of the word lines 17. Then, a source 18 and a drain 19 are respectively formed, and a memory element is formed in the active region 1.

[0008]

However, in the conventional semiconductor memory device and the method of manufacturing the same in which the isolation structure is formed by using the LOCOS method, a step is generated between the active region and the non-active region, and a flat surface is formed. Therefore, when a wiring process is performed on a memory element, there is a problem that a wiring short-circuit phenomenon occurs.

In the case of forming a word line by performing dry etching, ions are irregularly reflected on an inclined portion (bird's beak) of the filled oxide film during the etching, and the halation of the word line for etching the side surface of the word line is performed. In order to secure a stable word line width, a word line width larger than a design value is required, and the chip area is increased and the degree of integration is reduced.

Further, when the filled oxide film is formed, the crystal structure of the silicon substrate is deteriorated at the interface between the silicon lattice and the filled oxide film, and a leakage current is generated between the memory devices adjacent to the filled oxide film, thereby causing the memory device to fail. In this case, since the formation region of the memory element is reduced due to the bird's beak of the filled oxide film, it is necessary to secure a large formation region of the memory element in advance.
There is a problem that high integration cannot be achieved.

The present invention has been made in view of such conventional problems, and a semiconductor memory device which has solved the above-mentioned problems by changing an isolation structure formed in a longitudinal direction of a channel of the memory device. And a method for producing the same.

[0012]

In order to achieve the above object, a memory device according to the present invention has a predetermined width in a semiconductor substrate and is continuous in a first direction and is perpendicular to the first direction. A plurality of active regions arranged in parallel in the second direction at predetermined intervals, a plurality of first isolation regions respectively formed in the active region in parallel with the first region, and a plurality of active regions in the active region. A plurality of word lines arranged to intersect, source and drain regions formed at predetermined portions in the active region between the word lines and doped with a first conductivity type impurity, the word lines, the source, And a predetermined portion in the active region is doped with a second conductivity type impurity having a conductivity type opposite to the first conductivity type impurity so as to separate memory elements having a drain and a drain. A method of manufacturing a semiconductor memory device according to the present invention, the method further comprising: sequentially forming an oxide film and an anti-oxidation film on a semiconductor substrate; A photosensitive film is coated on the prevention film, and a plurality of active areas are formed in rows in a first direction at predetermined intervals, and the plurality of active areas are formed in a second direction perpendicular to the first direction. Etching and patterning the photosensitive film so that a first isolation region is formed therebetween; and removing an oxidation preventing film on the first isolation region to expose an oxide film. Oxidizing the exposed oxide film, removing the antioxidant film remaining on the semiconductor substrate, forming a gate oxide film on the entire surface of the semiconductor substrate, and forming the first oxide film on the gate oxide film. Continuous in the direction intersecting the direction Forming a word line, a step of implanting first conductivity type impurity into the word within the predetermined region of the semiconductor substrate between the lines, the first
Implanting a second conductivity type impurity having a conductivity type opposite to that of the first conductivity type impurity into the semiconductor substrate between the impurity regions to form a second isolation region.

[0013]

According to the semiconductor memory device of the present invention, since the isolation region of the semiconductor memory device is reduced, it can be applied to high integration. In addition, since the step for element isolation in the longitudinal direction of the channel is eliminated and flattened, and the formation of a bird's beak can be prevented, the phenomenon of word line halation is eliminated, and a stable word line width can be secured to a minimum, Thus, high integration and improvement in reliability can be achieved.

According to the method of manufacturing a semiconductor memory device according to the present invention, in addition to manufacturing the semiconductor memory device having the above-mentioned features, it is possible to prevent the occurrence of a short-circuit phenomenon of wiring when performing a wiring process on the memory device. it can.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In the memory device according to the present invention,
As shown in FIG. 1, continuous in the X-axis direction without interruption,
A plurality of active regions 1 'formed in parallel with each other at predetermined intervals in the Y-axis direction, and a plurality of first isolation regions (filled oxide films) 2 arranged in parallel with each other between the active regions 1''Are arranged on the semiconductor substrate.

As shown in FIG. 2, word lines 21, 22, 23 and 24 are formed on the active region 1 'and the first isolation region 2' in the Y-axis direction. The word lines 21, 22, 23, and 2
A source 25 and a drain 26 doped with a first conductivity type impurity are formed in the silicon substrate between the four to form a memory device.
In order to isolate between memory elements having drains and drains, a second isolation region 27 doped with a second conductivity type impurity having a conductivity type opposite to the first conductivity type impurity is provided at a predetermined portion on the active region 1 ′. Are formed.

Next, a description will be given of a method of manufacturing the memory device according to the present invention thus constituted. First, a silicon oxide film as a pad oxide film and a silicon nitride film as an antioxidant film are sequentially formed on the entire surface of the semiconductor substrate, and then a photosensitive film is coated on the silicon oxide film and the silicon nitride film. A plurality of active regions 1 ′ that are continuous in the X-axis direction and are formed at predetermined intervals in the Y-axis direction to form an active region 1 ′ and a first isolated region 2 ′ having the shapes shown; A mask is used so that a plurality of first isolation regions 2 ′ having the same shape as the active region 1 ′ and arranged in parallel between the active regions 1 ′ are alternately formed in the Y-axis direction. Then, the photosensitive film is photo-etched.

Next, after removing the photosensitive film on the first isolation region 2 ', the semiconductor substrate is etched to remove the silicon nitride film on the first isolation region 2', and the semiconductor substrate is oxidized. A thick oxide film is formed in the first isolation region 2 '. At this time, the filled oxide film 2 'electrically isolates the plurality of active regions 1' from each other.

Next, when the silicon nitride film on the active region 1 'is removed, the semiconductor substrate having undergone such a process has a flat shape in which no filled oxide film is formed in the X-axis direction, and no bird's beak is formed. Only Then
A plurality of word lines 21, 22, 23, and 24 made of polysilicon are formed on the semiconductor substrate along the Y-axis direction, and n-impurities are implanted into predetermined portions on both sides of the semiconductor substrate between the word lines 22. Thus, a source 25 and a drain 26 are formed. Thereafter, in order to isolate the memory element in the X-axis direction, which is the gist of the present invention, a second isolation area is formed by implanting p-impurity into the memory element isolation area 27 which is a predetermined area on the active area 1 '.

Therefore, in the memory device according to the present invention, the memory device is isolated in the Y-axis direction by the filled oxide film (first isolation region), and the implanted impurity ions in the X-axis direction (second isolation region). Separate the memory elements.
The principle of isolation of the memory device according to the present invention manufactured by such a method will be described with reference to FIG.

As a principle of operation of the memory device, first, when a corresponding word line 22 and a bit line 28 are selected by a row decoder (not shown) and a column decoder (not shown), the word line 22 is selected. A channel is formed between the source 25 and the drain 26 by the applied voltage, and the charge stored in the capacitance is transmitted to the bit line to read information stored in the memory device, or to read information input from the outside. The data is transmitted to the capacitor via the bit line and stored. That is, when the word line 22 is selected, a source 25 connected to a bit line and a drain 26 connected to a capacitor are provided.
A channel is formed therebetween, and information input to the bit line is stored in the capacitor, or information stored in the capacitor is transmitted to the bit line.

However, when the word line 23 is selected, no charge flows from the drain region 26 connected to the capacitor to the device isolation region 27 doped with the p-type impurity, so that the information stored in the capacitor is not generated. Keeps the original information unaffected. That is, 0V or minus voltage is applied to the p-type substrate,
Substrate and the p-type impurity region 27 are in ohmic contact (ohmic contact).
c conduct), the p-type impurity region 27
Even if 0 V or a negative voltage is applied to the mold substrate, and a positive voltage is applied to the word line 23, a pn junction in the opposite direction always exists between the n-channel formed in the gate and the p-type impurity region 27. In this case, the flow of charges is not performed, so that the memory elements are electrically isolated.

[Brief description of the drawings]

FIG. 1 is a plan view showing an isolation structure of a semiconductor memory device according to the present invention.

FIG. 2 is a plan view of a memory element according to the present invention.

FIG. 3 is a longitudinal sectional view along A-A 'of FIG. 2;

FIG. 4 is a plan view showing an isolation structure of a conventional semiconductor memory device.

FIG. 5 is a process chart showing a former stage of a conventional method of manufacturing a semiconductor memory device.

FIG. 6 is a process chart showing a latter stage of a conventional method of manufacturing a semiconductor memory device.

[Explanation of symbols]

 1, 1 ': active area 2, 2': first isolation area 21, 22, 23, 24: word line 25: source 26: drain 27: second isolation area

Claims (5)

[Claims] 1. A plurality of active areas which are continuous in a first direction with a predetermined width in a semiconductor substrate and are arranged in parallel in a second direction perpendicular to the first direction at predetermined intervals. A plurality of first isolation regions respectively formed in the active region in parallel with the first region; a plurality of word lines arranged to intersect the active region; and the active region between the word lines. A source and drain region formed at a predetermined portion in the inside and doped with a first conductivity type impurity, and a predetermined portion in the active region so as to separate a memory element having the word line, the source and the drain; A second isolation region formed by doping with a second conductivity type impurity having a conductivity type opposite to that of the first conductivity type impurity. 2. The semiconductor memory device according to claim 1, wherein said first isolation region is a filled oxide film. 3. The semiconductor memory device according to claim 1, wherein said first conductivity type impurity is n-type, and said second conductivity type impurity is p-type. 4. The semiconductor memory device according to claim 1, wherein said first conductivity type impurity is p-type and said second conductivity type impurity is n-type. 5. A step of sequentially forming an oxide film and an antioxidant film on a semiconductor substrate, coating a photosensitive film on the oxide film and the antioxidant film,
A plurality of active regions are formed in a row at predetermined intervals in a first direction, and a first isolation region is formed between the plurality of active regions in a second direction perpendicular to the first direction. Etching the photoresist film to pattern the photoresist film, removing the antioxidant film on the first isolation region to expose the oxide film, and oxidizing the exposed oxide film. A step of removing an antioxidant film remaining on the semiconductor substrate; a step of forming a gate oxide film on the entire surface of the semiconductor substrate; and a plurality of steps continuous on the gate oxide film in a direction crossing the first direction. Forming a word line; implanting a first conductivity type impurity into a predetermined region of the semiconductor substrate between the word lines; and defining the first conductivity type impurity in the semiconductor substrate between the first impurity regions. Second conductivity of opposite conductivity type Forming a second isolation region by injecting an electric impurity into the second isolation region.