JPH10223546A - Susceptor for chemical vapor deposition - Google Patents

Susceptor for chemical vapor deposition

Info

Publication number
JPH10223546A
JPH10223546A JP9041487A JP4148797A JPH10223546A JP H10223546 A JPH10223546 A JP H10223546A JP 9041487 A JP9041487 A JP 9041487A JP 4148797 A JP4148797 A JP 4148797A JP H10223546 A JPH10223546 A JP H10223546A
Authority
JP
Japan
Prior art keywords
susceptor
wafer
layer
flat plate
protrusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9041487A
Other languages
Japanese (ja)
Other versions
JP3565469B2 (en
Inventor
Katsuyuki Takamura
勝之 高村
Eiichi Sotodani
栄一 外谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Coorstek KK
Covalent Materials Tokuyama Corp
Original Assignee
Tokuyama Toshiba Ceramics Co Ltd
Toshiba Ceramics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokuyama Toshiba Ceramics Co Ltd, Toshiba Ceramics Co Ltd filed Critical Tokuyama Toshiba Ceramics Co Ltd
Priority to JP04148797A priority Critical patent/JP3565469B2/en
Publication of JPH10223546A publication Critical patent/JPH10223546A/en
Application granted granted Critical
Publication of JP3565469B2 publication Critical patent/JP3565469B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PROBLEM TO BE SOLVED: To eliminate the sagging phenomenon of an electrical specific difference such as a spread resistance and a non-uniformity in a wafer surface by forming a semiconductor wafer placement recessed part on the upper surface of a projecting part that projects from the surface of a flat plate. SOLUTION: A susceptor 1 for chemical vapor deposition is entirely formed in a circular flat-plate body with a flat surface 2 and a vent hole 3 for gas nozzle when setting a reaction oven such as in bell jar type is formed through the center. A protrusion 4 on the flat surface 2 is arranged and formed at an equal interval nearly along a circumference. Also, a recess 5 of a counter sink part for placing a semiconductor wafer is formed on the upper surface of the protrusion 4. Also, in the susceptor 1, the surface of a base 10 such as a carbon material in this kind of shape is covered with an SiC film 11 with improved corrosion resistance. In the susceptor that is formed this way, the arrangement position of the protrusion 4 for forming the recess 5 on the upper surface is not limited particularly and the protrusion 4 can be arranged properly at a specific position for providing a counter sink part for placing a semiconductor wafer on the flat surface 2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は気相成長用のサセプ
タに関し、詳しくは半導体ウエハを載置する凹部を、平
板表面より所定厚さで突出した凸部上面に形成すること
により、例えばIGBT(絶縁ゲートバイポーラトラン
ジスタ)ウエハ等の2層構造エピタキシャルウエハ形成
のように、単結晶シリコン基板等の基体上に化学気相成
長により複数層の電気的特性の異なる単結晶膜層を形成
するために用いて、特に、多層構造の各膜層間において
異なる電気的特性、例えば、SR値(Spreading Resist
ance:広がり抵抗)の差が徐々に変化するようなダレ現
象を生じることなく急峻に変化させることができる気相
成長用のサセプタに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a susceptor for vapor phase growth, and more particularly, to a susceptor for mounting a semiconductor wafer formed on an upper surface of a projection protruding from a flat plate surface by a predetermined thickness. Used to form a plurality of single-crystal film layers having different electrical characteristics by chemical vapor deposition on a substrate such as a single-crystal silicon substrate as in the formation of a two-layer structure epitaxial wafer such as an insulated gate bipolar transistor (wafer) wafer. In particular, different electrical characteristics, for example, SR values (Spreading Resist)
The present invention relates to a susceptor for vapor phase growth that can be changed steeply without causing a dripping phenomenon in which a difference in ance (spreading resistance) changes gradually.

【0002】[0002]

【従来の技術】2層構造のエピタキシャル膜を有するI
GBTウエハ等の単結晶シリコン基板上に電気的特性の
異なる単結晶膜層を複数形成された多層構造ウエハが、
単結晶シリコン基板等の基体上に化学気相成長法で成膜
して形成されることは従来から知られている。各単結晶
膜層の電気的特性の差異、例えばIGBTウエハでは、
一般に基板上に形成される第1層目はキャリアの不純物
濃度を高くして抵抗値がより低くなるようにすると共
に、第1層上に形成される第2層目は不純物濃度を低く
して抵抗がより高くなるように形成される。この場合、
第1層と第2層との界面近傍における深さ方向に対する
SR値が、緩やかに低下することなく急峻に変化するよ
うに、即ち、多層構造の各膜層間において異なる電気的
特性にダレ現象を生じることなく急激に変化する層構造
を有するウエハは、優れた特性を有するデバイスを提供
できることが知られている。一方、このSR値等の電気
的特性の差が緩やかに変化する、いわゆるダレ現象が生
じる場合には、デバイス特性が悪化することも確認され
ている。従って、IGBTウエハ等の多層構造ウエハ
が、上記のように層間のSR値等の電気的特性が急峻に
変化するように成膜して得られることが要望されてい
る。
2. Description of the Related Art An I-type semiconductor device having an epitaxial film having a two-layer structure
A multi-layered wafer in which a plurality of single crystal film layers having different electric characteristics are formed on a single crystal silicon substrate such as a GBT wafer,
It is conventionally known that a film is formed on a substrate such as a single crystal silicon substrate by a chemical vapor deposition method. The difference in electrical characteristics of each single crystal film layer, for example, in an IGBT wafer,
Generally, the first layer formed on the substrate has a higher impurity concentration of the carrier so as to have a lower resistance value, and the second layer formed on the first layer has a lower impurity concentration. It is formed to have higher resistance. in this case,
The SR value in the depth direction near the interface between the first layer and the second layer changes sharply without gradually lowering, that is, the sagging phenomenon occurs in the different electrical characteristics between the respective film layers of the multilayer structure. It is known that a wafer having a layer structure that changes rapidly without occurrence can provide a device having excellent characteristics. On the other hand, it has also been confirmed that device characteristics deteriorate when a so-called sagging phenomenon occurs in which the difference in electrical characteristics such as the SR value gradually changes. Therefore, it is desired that a multi-layered wafer such as an IGBT wafer can be obtained by forming a film such that the electrical characteristics such as the SR value between the layers change sharply as described above.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、従来の
化学気相成長法で成膜した多層構造エピタキシャルウエ
ハにおいて、深さ方向に対する電気的特性、例えば2層
構造のSR値について測定して得られるプロファイル
は、一般に、2層の界面近傍でダレ現象が生じることが
観察される。また、このような深さ方向へのSR値のダ
レ現象が、ウエハの中央部よりも周辺部で大きくなるこ
とも観察される。このウエハの中央部と周辺部でSR値
のダレ現象の程度が異なることは、ウエハ面内特性が均
質でなくバラツいていることであり、結果的にデバイス
特性が不均質となるものである。このようなSR値変化
にダレ現象が生じる原因の1つとしては、一般に不純物
濃度の低い高抵抗値の第2層が、高濃度不純物である低
抵抗値の第1層上に形成されるため、第1層形成時にサ
セプタ上に堆積する高濃度不純物が、第2層形成時に影
響することによると考えられている。また、ウエハ中央
部より周辺部においてダレ現象が大きいことは、第1層
形成時にサセプタ上に高濃度の不純物が堆積し、そのサ
セプタ上に堆積した不純物が第2層形成時にウエハの周
辺部により大きく影響するためと考えられている。
However, the profile obtained by measuring the electrical characteristics in the depth direction, for example, the SR value of a two-layer structure, in a multilayer epitaxial wafer formed by a conventional chemical vapor deposition method. Is generally observed that a sagging phenomenon occurs near the interface between the two layers. It is also observed that such a drooping phenomenon of the SR value in the depth direction becomes larger in the peripheral portion than in the central portion of the wafer. The fact that the degree of sag of the SR value differs between the central portion and the peripheral portion of the wafer means that the in-plane characteristics of the wafer are not uniform but vary, resulting in non-uniform device characteristics. One of the causes of such a droop phenomenon in the change of the SR value is that the high resistance second layer having low impurity concentration is generally formed on the low resistance first layer which is high concentration impurity. It is considered that high-concentration impurities deposited on the susceptor during the formation of the first layer affect the formation of the second layer. Also, the fact that the sagging phenomenon is greater in the peripheral portion than in the central portion of the wafer means that a high concentration of impurities is deposited on the susceptor during the formation of the first layer, and the impurities deposited on the susceptor are removed by the peripheral portion of the wafer during the formation of the second layer. It is thought to have a significant effect.

【0004】上記の第1層形成時の不純物による影響を
防止するため、例えば、第1層を形成した後、サセプタ
を取替えて、または、別の気相成長装置に移して第2層
を形成することが行われている。即ち、同一サセプタま
たは装置を用いて第1層成膜後に引続き第2層を成膜し
ないようにして、サセプタに蒸着等した不純物の影響を
回避する方法である。また、第1層形成時に堆積した不
純物をエッチング除去し、その後、第2層を成膜するこ
ともなされている。しかし、上記のサセプタの交換や洗
浄、他装置への移動等は、気相成長反応を一旦停止する
か、または、切替えて行うものであり、製造工程上操作
が繁雑となると同時に生産性も低下し好ましくない。一
方、出願人のうちの一人は、先に、上記のようなIGB
Tウエハのエピタキシャル相成長の問題から、特開平8
−203831号公報にて基体上に先ず低抵抗の第1層
を成長させた後、不純物を含まないアンドープ層を成長
させ、その上に高抵抗の第2層を連続的に気相成長させ
ることにより、第1層と第2層との抵抗値の差が急峻す
る化学気相成長方法を提案した。
[0004] In order to prevent the influence of impurities at the time of forming the first layer, for example, after forming the first layer, the susceptor is replaced or transferred to another vapor deposition apparatus to form the second layer. That is being done. In other words, this method is to avoid the influence of impurities deposited on the susceptor by preventing the second layer from being formed after the formation of the first layer using the same susceptor or apparatus. Further, an impurity deposited during the formation of the first layer is removed by etching, and then the second layer is formed. However, the above-mentioned susceptor replacement, cleaning, transfer to another device, etc. are performed by temporarily stopping or switching the vapor phase growth reaction, which complicates the operation in the manufacturing process and lowers productivity. But not preferred. On the other hand, one of the applicants first
Due to the problem of epitaxial phase growth of T wafer,
JP-A-203831 discloses a method of first growing a low-resistance first layer on a substrate, then growing an undoped layer containing no impurity, and continuously growing a high-resistance second layer on the undoped layer. Has proposed a chemical vapor deposition method in which the difference in resistance between the first layer and the second layer is sharp.

【0005】上記提案の方法は、操作上の不都合等のプ
ロセス的な面から検討したもので、気相成長を連続して
行うことができ製造工程上好ましいものである。一方、
本発明は、上記2層の境界面でのSR値変化のダレやそ
の不均質等の不都合を生じさせないための装置的観点か
らの改良を目的とする。即ち、2層構造のIGBTウエ
ハを始め多層構造のエピタキシャルウエハを化学気相成
長させ形成するための装置の部材を改良することにより
上記不都合を解消しようとするものである。発明者ら
は、この目的のため、前記した従来からその影響が問題
にされていたサセプタ上の堆積不純物について検討し
た。その結果、エピタキシャル成長に用いられるサセプ
タにおいて、平板面に所定の凸部を設けて、その凸部上
面にウエハを載置保持する凹部を形成するすることによ
り、上記のSR値等の電気的特性差のダレ現象やウエハ
面内での不均質性を解消できることを見出し、本発明を
完成した。
The method proposed above has been studied from the viewpoint of process such as inconvenience in operation, and is preferable from the viewpoint of a manufacturing process because vapor phase growth can be continuously performed. on the other hand,
An object of the present invention is to provide an improvement from the viewpoint of an apparatus for preventing inconveniences such as dripping of the SR value change at the boundary surface between the two layers and inhomogeneity thereof. That is, the above-mentioned disadvantages are intended to be solved by improving members of an apparatus for forming an epitaxial wafer having a multilayer structure, such as an IGBT wafer having a two-layer structure, by chemical vapor deposition. For this purpose, the present inventors have studied the above-described deposited impurities on the susceptor, the influence of which has been a problem. As a result, in the susceptor used for epitaxial growth, a predetermined convex portion is provided on a flat plate surface, and a concave portion for mounting and holding a wafer is formed on the upper surface of the convex portion, so that a difference in electrical characteristics such as the SR value is obtained. The present inventors have found that the dripping phenomenon and inhomogeneity in the wafer surface can be eliminated, and the present invention has been completed.

【0006】[0006]

【課題を解決するための手段】本発明によれば、カーボ
ン基材表面をSiC膜で被膜してなる気相成長用サセプ
タであって、平板の表面から突出した1または2以上の
凸部を有し、凸部上面に半導体ウエハ載置凹部が形成さ
れてなることを特徴とする気相成長用のサセプタが提供
される。本発明の気相成長用のサセプタにおいて、凸部
の厚さが平板の厚さの1/7〜2/7であることが好ま
しい。また、凸部上面の半径が、前記凹部半径より3〜
20mm大きく形成されることが好ましい。
According to the present invention, there is provided a susceptor for vapor phase growth comprising a carbon substrate surface coated with a SiC film, wherein one or more projections projecting from the surface of a flat plate are formed. A susceptor for vapor phase growth, wherein the susceptor has a semiconductor wafer mounting concave portion formed on the upper surface of the convex portion. In the susceptor for vapor phase growth of the present invention, it is preferable that the thickness of the projection is 1/7 to 2/7 of the thickness of the flat plate. Further, the radius of the upper surface of the convex portion is 3 to 3 times larger than the radius of the concave portion.
Preferably, it is formed to be 20 mm larger.

【0007】本発明は上記のように構成され、カーボン
基材表面がSiC(炭化珪素)皮膜で被覆された気相成
長用のサセプタにおいて、半導体ウエハを載置する凹部
を平板面から突出した状態の凸部上面に形成することか
ら、サセプタ下方に配置されるヒータにより加熱され
て、平板面の方が凸部上面に比して高温となる。このた
め第2層成膜への切換え操作時に、第1成膜用ドーパン
トガスを水素ガスでパージする際に、シリコンウエハ上
に成膜された第1層気相成長膜に影響を及ぼすことな
く、不純物高濃度の第1成膜時にサセプタの平板表面上
に付着した不純物が高温により蒸発飛散除去することが
できることから、本発明のサセプタ表面の残留不純物濃
度が、従来のサセプタに比し著しく低減され、水素ガス
によるガスパージ後の第2層成膜処理において、第2層
が成膜当初より所定の低濃度ドーパントで形成される。
従って、本発明のサセプタを用いて形成した異なる電気
的特性を有する多層構造のエピタキシャルウエハは、各
層の境界面近傍におけるSR値の勾配が急傾斜となりダ
レ現象が抑制される。
According to the present invention, there is provided a susceptor for vapor phase growth having a carbon substrate surface coated with a SiC (silicon carbide) film as described above, wherein a recess for mounting a semiconductor wafer is projected from a flat plate surface. Is formed on the upper surface of the convex portion, and is heated by the heater disposed below the susceptor, so that the temperature of the flat surface becomes higher than that of the upper surface of the convex portion. Therefore, when the first deposition dopant gas is purged with the hydrogen gas during the switching operation to the second layer deposition, the first layer vapor deposition film deposited on the silicon wafer is not affected. Since impurities adhering to the flat surface of the susceptor at the time of the first film formation with a high impurity concentration can be removed by evaporation at a high temperature, the residual impurity concentration on the susceptor surface of the present invention is significantly reduced as compared with the conventional susceptor. Then, in the second layer film forming process after the gas purge with the hydrogen gas, the second layer is formed with a predetermined low concentration dopant from the beginning of the film formation.
Therefore, in the epitaxial wafer having a multilayer structure having different electrical characteristics formed by using the susceptor of the present invention, the gradient of the SR value near the boundary surface of each layer becomes steep, and the sagging phenomenon is suppressed.

【0008】[0008]

【発明の実施の形態】以下、本発明について実施例に基
づき図面を参照にして詳細に説明する。但し、本発明
は、下記の実施例に制限されるものでない。図1は本発
明の気相成長用のサセプタの一実施例の模式的な平面説
明図(A)及びそのB−B線断面の端部説明図(B)で
ある。図1において、気相成長用のサセプタ1は、全体
が平板面2を有して円形平板体に形成され、その中心に
はベルジャ型等の反応炉にセットする場合のガスノズル
用通孔3が貫通形成されている。平板面2上に突出して
凸部4が、ほぼ円周に沿って等間隔に配置形成されてい
る。また、凸部4上面には半導体ウエハを載置するザグ
リ部の凹部5が形成されている。従来のサセプタが、平
板面2上面にザグリ部を凹部状に形成していたのと異な
る。また、サセプタ1は、従来の気相成長用サセプタと
同様に、上記の様な形状のカーボン材等の基材10表面
を耐食性に優れるSiC膜11で被覆される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on embodiments with reference to the drawings. However, the present invention is not limited to the following examples. FIG. 1 is a schematic plan view (A) of an embodiment of a susceptor for vapor phase growth according to the present invention, and an end view (B) of a cross section taken along the line BB of FIG. In FIG. 1, a susceptor 1 for vapor phase growth is entirely formed in a circular flat plate having a flat plate surface 2, and a gas nozzle through hole 3 when set in a bell-jar type reaction furnace is formed at the center thereof. It is formed through. Protrusions 4 projecting from the flat plate surface 2 are formed at substantially equal intervals along the circumference. Further, a concave portion 5 of a counterbore portion for mounting a semiconductor wafer is formed on the upper surface of the convex portion 4. This is different from the conventional susceptor in which a counterbore portion is formed in a concave shape on the upper surface of the flat plate surface 2. The susceptor 1 is, like the conventional susceptor for vapor phase growth, coated on the surface of the base material 10 such as a carbon material having the above-mentioned shape with the SiC film 11 having excellent corrosion resistance.

【0009】上記のように形成される本発明のサセプタ
において、その上面に凹部5を形成する凸部4の配設位
置は特に制限されず、平板面2の半導体ウエハを載置す
るザグリ部配設予定位置に適宜配設することができる。
通常、従来のサセプタに配設したザグリ部と同様な位置
に配設する。このように平板面に厚さが異なる部分を形
成することにより、下方のヒータからサセプタが加熱さ
れた場合、平板面と平板面に形成された凸部上面では、
相対的に高温部と低温部が形成されることになる。本発
明のサセプタは、この相対的低温部に被膜処理するウエ
ハを載置することから、異なる条件下での成膜工程への
切換え時のガスパージ処理時に、ウエハの載置部分は比
較的低温に保持しながら、平板面の温度を相対的に高温
とすることができる。従って、次の成膜工程前に、前段
の成膜工程で平板面に付着したドーパント成分を高温で
蒸発除去することができ、各成膜工程毎に連続する前段
または後段の成膜条件の影響を受けることなく各独立的
に成膜することができる。この場合、凸部の平板表面か
らの立ち上がり高さ、即ち凸部厚さ(t)と平板厚さ
(T)とは、t=1/7T〜2/7Tの関係となるよう
にする。凸部厚さが1/7T未満であると、平板面2と
凸部4上面との温度差が少ないため、平板面2に付着し
た不純物の蒸発量が減少し好ましくない。一方、2/7
Tを超えた場合は、温度差が大きくなりサセプタにクッ
ラクが生じるおそれがあり好ましくない。平板面の厚さ
は、使用する気相成長装置の反応炉の高周波発振出力等
ヒータ発熱力に応じて適宜選択することが一般的であ
る。例えば、外径640〜900mmφの円盤状サセプ
タであれば、通常、円盤厚さ約12〜22mmに形成さ
れる。
In the susceptor of the present invention formed as described above, the position of the convex portion 4 forming the concave portion 5 on the upper surface thereof is not particularly limited. It can be appropriately arranged at the planned installation position.
Usually, it is disposed at the same position as the counterbore part disposed on the conventional susceptor. By forming the portions having different thicknesses on the flat plate surface in this manner, when the susceptor is heated from the lower heater, the flat plate surface and the upper surface of the convex portion formed on the flat plate surface have:
A relatively high temperature portion and a low temperature portion are formed. Since the susceptor of the present invention mounts the wafer to be subjected to the film processing on the relatively low-temperature portion, the portion on which the wafer is mounted is kept at a relatively low temperature during the gas purging process when switching to the film forming process under different conditions. While holding, the temperature of the flat plate surface can be made relatively high. Therefore, before the next film formation step, the dopant component adhered to the flat plate surface in the previous film formation step can be removed by evaporation at a high temperature, and the influence of the film formation conditions of the preceding or subsequent step in each film formation step is continuous. Each film can be independently formed without receiving the same. In this case, the rising height of the projection from the flat plate surface, that is, the thickness (t) of the projection and the thickness (T) of the flat plate are set to have a relationship of t = 1 / 7T to 2 / 7T. If the thickness of the convex portion is less than 1 / 7T, the temperature difference between the flat plate surface 2 and the upper surface of the convex portion 4 is small, so that the amount of evaporation of impurities attached to the flat plate surface 2 decreases, which is not preferable. On the other hand, 2/7
If the temperature exceeds T, the temperature difference becomes large and cracks may occur in the susceptor, which is not preferable. Generally, the thickness of the flat plate surface is appropriately selected according to the heating power of the heater such as the high-frequency oscillation output of the reaction furnace of the vapor phase growth apparatus to be used. For example, a disk-shaped susceptor having an outer diameter of 640 to 900 mmφ is usually formed to a disk thickness of about 12 to 22 mm.

【0010】本発明の気相成長用のサセプタにおいて、
図1では平板面2、凸部4及び凹部5のいずれも円形状
として示したが、それらの形状や大きさは特に制限され
るものでない。反応炉等の使用条件に合わせて適宜選択
することができる。通常、平板面は従来のものと同様の
大きさ、形状とする。また、凸部の形状及び大きさは、
その上面に半導体ウエハ載置凹部を形成できればよい。
通常、凹部が載置するウエハの円形状に合わせて円形に
形成されることから、凸部も円形状の上面を有するよう
に形成することが好ましい。この場合、上面が凹部を形
成可能な厚さの円形であれば、凸部のサセプタ表面から
の立上りは、特に、制限されない。通常、垂直に形成す
るが、錐台状にテーパを有してもよい。通常、凸部はサ
セプタ表面に円柱体状に形成する。厚みのある平板体を
用いて円柱体状に凸部を残しながら研削して平板面を形
成することができ、製造上簡便である。凸部上面は、当
然ながらウエハ載置凹部を形成できる広さを有する。同
時に、その凸部上面に同心状に凹部を形成したとき、凹
部の周縁部に連続する凸部上面の一部、即ち、図1にお
いて、凸部4の上面が半径Rの円形で、凹部5が半径r
の円形に形成した場合、(R−r=)3〜20mmの幅
Xの外周面を有することが好ましい。例えば、直径15
2mm、深さ0.8mmのウエハ載置円形凹部を形成す
る場合、同心状で直径172mmの円形上面の凸部を形
成し、凹部周縁部外に幅(X)約10mmの外周面を形
成する。上記の幅Xが20mmを超えた場合は、残留凸
部上面に付着している不純物量が多くなり、気相成長さ
せたウエハの周辺部でSR値のダレ現象が生じるおそれ
がある。一方、幅Xが3mm未満では残留凸部上面が極
めて薄く、高温となる平板面の影響がザグリ部周辺に伝
わり、ウエハの中央部と周辺部に温度差が生じ、薄膜の
面内が不均一となるおそれがあるためである。半導体ウ
エハ載置凹部の形成は従来法と同様に行うことができ
る。
In the susceptor for vapor phase growth of the present invention,
In FIG. 1, the flat plate surface 2, the convex portions 4, and the concave portions 5 are all shown as circular shapes, but their shapes and sizes are not particularly limited. It can be appropriately selected according to the use conditions of the reaction furnace and the like. Usually, the flat surface has the same size and shape as the conventional one. Also, the shape and size of the convex portion are
It suffices if the semiconductor wafer mounting recess can be formed on the upper surface.
Usually, since the concave portion is formed in a circular shape in accordance with the circular shape of the wafer to be mounted, it is preferable that the convex portion is also formed to have a circular upper surface. In this case, if the upper surface is a circle having a thickness capable of forming the concave portion, the rising of the convex portion from the susceptor surface is not particularly limited. Usually, it is formed vertically, but may have a frustum-shaped taper. Usually, the convex portion is formed in a cylindrical shape on the susceptor surface. A flat plate surface can be formed by grinding using a thick flat plate while leaving a convex portion in a columnar shape, which is convenient in manufacturing. The upper surface of the convex portion has a width enough to form a wafer mounting concave portion. At the same time, when the concave portion is formed concentrically on the upper surface of the convex portion, a part of the upper surface of the convex portion continuous to the peripheral portion of the concave portion, that is, in FIG. Is the radius r
It is preferable to have an outer peripheral surface having a width X of (R−r =) 3 to 20 mm when formed in a circular shape. For example, the diameter 15
When forming a wafer mounting circular concave portion having a depth of 2 mm and a depth of 0.8 mm, a concentric convex portion having a circular upper surface having a diameter of 172 mm is formed, and an outer peripheral surface having a width (X) of about 10 mm is formed outside the peripheral portion of the concave portion. . If the width X exceeds 20 mm, the amount of impurities adhering to the upper surface of the remaining convex portion increases, and there is a possibility that a droop phenomenon of the SR value may occur at the peripheral portion of the wafer grown by the vapor phase. On the other hand, if the width X is less than 3 mm, the upper surface of the remaining convex portion is extremely thin, and the influence of the flat plate surface, which becomes high in temperature, is transmitted to the periphery of the counterbore portion. It is because there is a possibility that it becomes. The formation of the semiconductor wafer mounting recess can be performed in the same manner as in the conventional method.

【0011】上記のように形成される凸部4のサセプタ
の平板面上での配置は、特に制限されるものでない。図
1に示したように各凸部が間隔を有して配置されてもよ
いし、その場合でも後記の図3に示すように平板面上に
2以上の多重環状に配置してもよい。これら凸部の配置
の数や方式は、サセプタを用いる気相成長装置や成長条
件に合わせて適宜選択することができる。また、各凸部
の位置関係も特に制限されない。例えば、図2に他のサ
セプタの部分的に模式的平面図を示したように、各凸部
が間隔を有することなくそれぞれ外周が接する形態
(C)で配置されてもよいし、また、各凸部が重なった
ように連続的に連なった形態(D)に配置されてもよ
い。特に、図2(D)の連なった形態に形成する場合
は、凸部上面に凹部を形成した後の残留凸部上面の面積
が減少され、付着不純物量が低減されることから好まし
い。
The arrangement of the projections 4 formed as described above on the flat surface of the susceptor is not particularly limited. As shown in FIG. 1, the respective protrusions may be arranged with an interval, and even in such a case, as shown in FIG. 3 described later, two or more multiplex rings may be arranged on a flat plate surface. The number and system of the arrangement of these protrusions can be appropriately selected according to the vapor growth apparatus using the susceptor and the growth conditions. Further, the positional relationship between the respective convex portions is not particularly limited. For example, as shown in FIG. 2 in which a partial schematic plan view of another susceptor is shown, each convex portion may be arranged in a form (C) in which the outer circumferences are in contact with each other without a space, and It may be arranged in a form (D) in which the convex portions are continuously connected so as to overlap. In particular, the formation of the continuous form in FIG. 2D is preferable because the area of the upper surface of the remaining convex portion after the concave portion is formed on the upper surface of the convex portion is reduced and the amount of attached impurities is reduced.

【0012】本発明の気相成長用のサセプタは、上記の
ような形態で構成される以外、従来公知の化学気相反応
により所定の薄膜を、被処理材である半導体ウエハ上に
形成する化学気相成長方法に用いるものである。化学気
相成長方法は、既に従来から公知であり、一般に、反応
炉内に配設されたサセプタを高周波加熱やランプ加熱に
より加熱昇温して、その上に載置される半導体ウエハ等
の被膜基材を加熱すると同時に、反応炉内に反応ガスを
導入して被処理基材上に所定皮膜を成膜する方法であ
る。また、この化学気相成長方法に用いられる気相成長
装置も従来から公知であり、反応炉の構造により縦型や
バレル型がある。更に、単一工程で処理されるウエハ枚
数により、複数のバッチ方式と1枚ずつの枚葉方式に区
分されている。各方式により用いるサセプタ形式は多少
異なるが、本発明の気相成長用のサセプタは、上記従来
公知の化学気相成長方法を行ういずれの方式においても
適用することができる。
The susceptor for vapor phase growth of the present invention has a structure as described above, except that a predetermined thin film is formed on a semiconductor wafer to be processed by a conventionally known chemical vapor reaction. It is used for a vapor phase growth method. The chemical vapor deposition method is already known in the art. Generally, a susceptor disposed in a reaction furnace is heated and heated by high-frequency heating or lamp heating to form a coating film such as a semiconductor wafer placed thereon. This is a method in which a predetermined film is formed on a substrate to be treated by heating a substrate and simultaneously introducing a reaction gas into a reaction furnace. In addition, a vapor phase growth apparatus used in this chemical vapor deposition method has been conventionally known, and there are a vertical type and a barrel type depending on the structure of a reaction furnace. Further, according to the number of wafers processed in a single process, the system is classified into a plurality of batch systems and a single wafer system. Although the type of susceptor used varies slightly depending on each method, the susceptor for vapor phase growth of the present invention can be applied to any method for performing the above-mentioned conventionally known chemical vapor deposition method.

【0013】本発明の気相成長用のサセプタは、上記の
ような形態に形成される以外は、従来と同様に形成する
ことができる。即ち、その基材はカーボン材からなり、
表面が炭化珪素(SiC)膜により被覆されたものであ
る。SiC被覆カーボン部材は、従来から半導体製造装
置に用いられており、特に制限されるものでなく、従来
と同様に形成されたものを用いることができる。また、
カーボン基材は、特に、制限されるものでなく、従来公
知の黒鉛等を用いることができる。カーボン基材を上記
のような本発明のサセプタ形状に形成した後、従来のS
iC被覆と同様に処理してその表面にSiC膜を形成し
て製造することができる。本発明のカーボン材上に形成
されるSiC膜の厚さは、特に限定されるものでなく、
従来のサセプタと同様に約40〜150μmとすればよ
い。本発明のサセプタ表面のSiC皮膜の表面粗さ及び
ウエハを載置する凹部の表面粗さ(Ra)は、共に特に
制限されるものでない。例えば、サセプタ平板面をRa
で5〜13μmとし、凹部面をRaで0.1〜3μmと
することができる。
The susceptor for vapor phase growth of the present invention can be formed in the same manner as the conventional one, except that it is formed in the above-described form. That is, the base material is made of carbon material,
The surface is covered with a silicon carbide (SiC) film. The SiC-coated carbon member has been conventionally used in a semiconductor manufacturing apparatus, and is not particularly limited, and a member formed in the same manner as in the related art can be used. Also,
The carbon substrate is not particularly limited, and conventionally known graphite and the like can be used. After forming the carbon substrate into the susceptor shape of the present invention as described above, the conventional S
It can be manufactured by forming the SiC film on the surface by performing the same treatment as the iC coating. The thickness of the SiC film formed on the carbon material of the present invention is not particularly limited,
The thickness may be about 40 to 150 μm as in the conventional susceptor. Both the surface roughness of the SiC film on the susceptor surface and the surface roughness (Ra) of the concave portion on which the wafer is placed are not particularly limited. For example, the susceptor plate surface is Ra
Can be set to 5 to 13 μm, and the concave surface can be set to 0.1 to 3 μm in Ra.

【0014】本発明のサセプタは、上記のように平板表
面から突出した凸部上面に半導体ウエハ載置凹部を形成
したものである。このサセプタを用いエピタキシャル成
長でIGBTウエハ等の電気的特性の異なる複数の膜層
を有する多層構造エピタキシャルウエハを形成した場
合、例えば、前段の成膜時の高濃度不純物がサセプタ表
面に多量に付着しても、凹部が形成される凸部上面に比
し平板表面の温度が高くなることから、付着不純物が次
段の成膜への切換え工程のパージ工程で蒸発飛散除去さ
れ、次段の成膜工程ではサセプタ平板表面の不純物が低
減された状態となる。従って、各成膜時に前段のドーパ
ント濃度の影響を受けることが少なくなり、各層が所望
の電気的性状で成膜当初より形成することができ、得ら
れる多層構造エピタキシャルウエハの各層の界面近傍で
の電気的特性の変化が急峻する。例えば、IGBTウエ
ハのエピタキシャル層の深さ方向にSR値のプロファイ
ルをとると2層の界面近傍でSR値が急峻に変化する。
また、IGBTウエハ周辺部と中央部とのSR値に差が
生じることもない。従って、結果的に均質な優れた特性
を有するデバイスを与えるエピタキシャルウエハを得る
ことができる。
The susceptor of the present invention has a semiconductor wafer mounting concave portion formed on the upper surface of the convex portion projecting from the flat plate surface as described above. When a multi-layer epitaxial wafer having a plurality of film layers having different electrical characteristics such as an IGBT wafer is formed by epitaxial growth using this susceptor, for example, a large amount of high-concentration impurities at the time of the previous film deposition adhere to the susceptor surface. Also, since the temperature of the flat plate surface is higher than that of the upper surface of the convex portion where the concave portion is formed, the adhered impurities are removed by evaporation in the purging process of the switching process to the next film forming process. In this state, impurities on the surface of the susceptor flat plate are reduced. Therefore, the influence of the dopant concentration at the previous stage during each film formation is reduced, and each layer can be formed with desired electrical properties from the beginning of the film formation, and the vicinity of the interface of each layer of the obtained multilayer epitaxial wafer can be formed. Changes in electrical characteristics are steep. For example, when a profile of the SR value is taken in the depth direction of the epitaxial layer of the IGBT wafer, the SR value changes sharply near the interface between the two layers.
Further, there is no difference in SR value between the peripheral portion and the central portion of the IGBT wafer. Therefore, it is possible to obtain an epitaxial wafer which gives a device having uniform and excellent characteristics as a result.

【0015】[0015]

【実施例】以下、本発明を実施例に基づき更に詳細に説
明する。但し、本発明は下記実施例により制限されるも
のでない。 実施例1〜5及び比較例1 (気相成長用のサセプタの調製)カーボン材を用いて、
平板厚さ(T)が14mm、直径(D)が705mmの
円板体で、その平板面2上に厚さ(t)がそれぞれ1、
2、3、4、及び5mmで、半径(R)86mmの円柱
体の凸部4をほぼ等間隔に10個で形成した。更に、各
凸部4上面に、幅(X)が約10mmとなるようにし
て、同心状で半径(r)76mmの凹部5をそれぞれ形
成し、前記図1とほぼ同様の形状のサセプタ基材を形成
した。そのカーボン材のサセプタ基材表面に、従来と同
様の気相反応室で、反応室内温度を1200℃以上、室
内圧を1Torr以下の気相成長条件下でSiC被覆処
理し、表面にSiC被膜が形成されたサセプタを得た。
得られた各サセプタの凹部を、それぞれ従来法により研
磨処理して表面粗さ(Ra)約1〜15μmとした。ま
た、同様のカーボン材の円板体平板面2に凸部を形成す
ることなく、平板面上に半径(r)76mmの凹部を同
様に10個形成し、更に、同様に表面をSiC被覆し、
凹部を研磨処理した従来と同様のサセプタを得た(比較
例1)。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in more detail with reference to embodiments. However, the present invention is not limited by the following examples. Examples 1 to 5 and Comparative Example 1 (Preparation of susceptor for vapor phase growth)
A plate having a plate thickness (T) of 14 mm and a diameter (D) of 705 mm has a thickness (t) of 1,
Ten convex portions 4 of a cylindrical body having a radius (R) of 86 mm were formed at approximately equal intervals at 2, 3, 4, and 5 mm. Further, concentric concave portions 5 each having a radius (r) of 76 mm are formed on the upper surface of each convex portion 4 so as to have a width (X) of about 10 mm, and a susceptor substrate having substantially the same shape as that of FIG. Was formed. The surface of the susceptor substrate of the carbon material is subjected to SiC coating treatment in a vapor phase reaction chamber similar to the conventional one under a vapor phase growth condition of a reaction chamber temperature of 1200 ° C. or more and a room pressure of 1 Torr or less, and a SiC coating is formed on the surface. A formed susceptor was obtained.
The recesses of each of the obtained susceptors were polished by a conventional method to have a surface roughness (Ra) of about 1 to 15 μm. Also, without forming protrusions on the disk-shaped flat plate surface 2 of the same carbon material, ten concave portions having a radius (r) of 76 mm were similarly formed on the flat plate surface, and the surface was similarly coated with SiC. ,
A susceptor similar to the conventional susceptor in which the recess was polished was obtained (Comparative Example 1).

【0016】(気相成長)次いで、図3に示した気相成
長装置とほぼ同様な装置に、上記のようにして調製した
各気相成長用サセプタを用いて、単結晶シリコンウエハ
上にエピタキシャル成長で成膜した。図3は、本実施例
に用いた縦型化学気相成長装置の斜視説明図である。図
3において、化学気相成長装置21は、ベルジャ型反応
管22内に、サセプタ1が回転可能に配設されている。
また、サセプタ1の中心にはガス吹出口25を有する原
料ガス導入ノズル26が立設され、反応管22の下部に
は排気管27が設けられ、さらにサセプタ1の下側には
高周波コイル28が配設されて、サセプタ1上に載置さ
れたウエハ23を所望の温度に加熱することができるよ
うになっている。
(Vapor Growth) Next, epitaxial growth is performed on a single crystal silicon wafer by using each susceptor prepared as described above in a device substantially similar to the vapor growth device shown in FIG. Was formed. FIG. 3 is a perspective explanatory view of the vertical chemical vapor deposition apparatus used in the present embodiment. In FIG. 3, the chemical vapor deposition apparatus 21 has a susceptor 1 rotatably disposed in a bell jar type reaction tube 22.
A source gas introduction nozzle 26 having a gas outlet 25 is provided upright at the center of the susceptor 1, an exhaust pipe 27 is provided below the reaction tube 22, and a high frequency coil 28 is provided below the susceptor 1. The wafer 23 placed on the susceptor 1 can be heated to a desired temperature.

【0017】上記のように構成された縦型化学気相成長
装置21に、前記で形成した各サセプタ1を配置し、表
面を清浄化した単結晶シリコンウエハ23を、サセプタ
1の各凹部5に装着した。その後、高周波コイル28に
より基板を1080〜1120℃に加熱し、反応管21
内にガス吹出口25から、シランガスとしてSiHCl
3 、キャリアガスとして水素ガス、ドーパントガスとし
てホスフィン(PH3)を用い、先ず、SiHCl3
7.5g/分、PH3 ガスを300cc/分の高濃度で
導入して低抵抗の第1層の成膜を行った後、引き続いて
高濃度のPH3ガスを水素ガスで10分間置換した。そ
の後、そのまま室温まで降温して、平板面2上に残留し
た単位体積当たりの不純物P量を測定した。その結果を
表1に示した。なお、測定は2次イオン質量分析(SI
MS)により、任意の面積で、深さ2.5μmの範囲で
行った。
Each of the susceptors 1 formed as described above is arranged in the vertical chemical vapor deposition apparatus 21 configured as described above, and the single-crystal silicon wafer 23 whose surface has been cleaned is placed in each of the recesses 5 of the susceptor 1. I attached it. Thereafter, the substrate is heated to 1800 to 1120 ° C. by the high-frequency coil 28 and the reaction tube 21 is heated.
From the gas outlet 25 into SiHCl as silane gas.
3. Using a hydrogen gas as a carrier gas and phosphine (PH 3 ) as a dopant gas, first introduce 7.5 g / min of SiHCl 3 and a high concentration of 300 cc / min of PH 3 gas to form a low-resistance first layer. After the film formation, the high concentration PH 3 gas was replaced with hydrogen gas for 10 minutes. Thereafter, the temperature was lowered to room temperature, and the amount of impurities P per unit volume remaining on the flat plate surface 2 was measured. The results are shown in Table 1. The measurement was performed by secondary ion mass spectrometry (SI
MS) in an arbitrary area and a depth of 2.5 μm.

【0018】[0018]

【表1】 [Table 1]

【0019】上記実施例及び比較例より明らかなよう
に、凸部を設けない、即ちt=0の従来と同様のサセプ
タでは、平板面の残留不純物濃度が、凸部を設けた本発
明のサセプタに比し、一桁多くなることが分かる。ま
た、凸部の高さtが1mm、即ち、平板厚さ(T)の1
/7未満では、tが2mmのサセプタに比して残留不純
物濃度が高めとなる。一方、凸部高さtが、平板厚さT
の2/7を超えたt=5mmではサセプタにクラックが
発生した。これは平板面と凸部での温度差が極めて大き
くなったためと推定される。
As is clear from the above Examples and Comparative Examples, in a susceptor having no convex portion, that is, a conventional susceptor having t = 0, the susceptor of the present invention having the convex portion has a residual impurity concentration on the flat plate surface. It can be seen that the number is increased by one digit as compared with. In addition, the height t of the projection is 1 mm, that is, 1 of the thickness (T) of the flat plate.
If it is less than / 7, the residual impurity concentration is higher than that of the susceptor having t of 2 mm. On the other hand, the height t of the projection is equal to the thickness T of the flat plate.
At t = 5 mm exceeding 2/7, cracks occurred in the susceptor. This is presumably because the temperature difference between the flat plate surface and the convex portion became extremely large.

【0020】実施例6及び比較例2 前記実施例2及び比較例1で得られたサセプタを用い
て、2層構造のエピタキシャルウエハを形成した。即
ち、実施例2及び比較例1のサセプタをそれぞれセット
した縦型気相成長装置に、上記実施例と同様にシリコン
ウエハ10枚をそれぞれ装着して、先ず低抵抗の第1層
の成膜を行い、高濃度のPH3 ガスを水素ガスで10分
間置換した後、引き続いてSiHCl3 を30g/分、
PH3 ガスを30cc/分の低濃度で導入して高抵抗の
第2層を成膜して2層構造エピタキシャルウエハをそれ
ぞれ得た。得られた2層構造エピタキシャルウエハの中
心部と周辺部についてSR値を測定した。その結果の中
心部のSR値と深さ方向との関係を図4にそれぞれ示し
た。
Example 6 and Comparative Example 2 Using the susceptors obtained in Example 2 and Comparative Example 1, an epitaxial wafer having a two-layer structure was formed. That is, 10 silicon wafers were respectively mounted on the vertical vapor deposition apparatus in which the susceptors of Example 2 and Comparative Example 1 were respectively set in the same manner as in the above-described example, and the first layer of low resistance was formed first. After replacing the high-concentration PH 3 gas with hydrogen gas for 10 minutes, subsequently, SiHCl 3 was added at 30 g / min.
PH 3 gas was introduced at a low concentration of 30 cc / min to form a high-resistance second layer to obtain two-layer epitaxial wafers. The SR value was measured for the central part and the peripheral part of the obtained two-layer epitaxial wafer. The resulting relationship between the SR value at the center and the depth direction is shown in FIG.

【0021】図4から明らかなように、本発明の凸部を
設けたサセプタを用いて得られたエピタキシャルウエハ
の深さ方向でのSR値は、第1層と第2層との境界面近
傍で緩やかな低下がなく急激に低下することが分かる。
また、ウエハ面内での周辺部と中心部においてのSR値
の変化はなく、ほぼ均質に2層構造にエピタキシャル成
長されていることが明らかであった。一方、従来と同様
のサセプタを用いて得られたエピタキシャルウエハの深
さ方向でのSR値は、第1層と第2層との境界面近傍で
緩やかに低下し第1層と第2層の層間にはっきりした区
別がなく、第1層から第2層にかけてSR値が低下して
しまう部分(ダレ)が生じていることが分かる。また、
深さ方向のSR値は、ウエハの中心部よりも周辺部にお
いてダレがより強く生じていた。
As is apparent from FIG. 4, the SR value in the depth direction of the epitaxial wafer obtained by using the susceptor provided with the convex portion of the present invention is near the boundary between the first layer and the second layer. It can be seen that there is no gradual decrease and the temperature drops sharply.
Further, there was no change in the SR value between the peripheral portion and the central portion in the wafer plane, and it was apparent that epitaxial growth was performed almost uniformly in a two-layer structure. On the other hand, the SR value in the depth direction of the epitaxial wafer obtained by using the same susceptor as the conventional one gradually decreases near the boundary surface between the first layer and the second layer, and the SR value of the first layer and the second layer decreases. There is no clear distinction between the layers, and it can be seen that there is a portion (drip) where the SR value decreases from the first layer to the second layer. Also,
In the SR value in the depth direction, sagging occurred more in the peripheral portion than in the central portion of the wafer.

【0022】[0022]

【発明の効果】本発明の気相成長用のサセプタは、平板
面上に所定の厚みの凸部を設け、凸部上面に半導体ウエ
ハを載置するザグリ部の凹部を形成したものである。こ
のため多層にエピタキシャル成膜する場合に、各成膜切
換え工程でのガスパージの際に、平板面温度が被膜処理
される半導体ウエハが載置されている凸部上面に比し、
相対的に高温とすることができることから平板面に付着
したドーパント成分を容易に蒸発飛散除去できる。従っ
て、各成膜時に前段の処理ガス中のドーパント濃度の影
響を受けることなく、当初から所定の電気的特性を有す
るエピタキシャル皮膜を形成でき、例えば、2層構造の
IGBTウエハで、エピタキシャル成長した第1層と第
2層の間で急変する抵抗差を形成でき、ウエハの深さ方
向のSR値のプロファイルにおいてダレが生じることが
ない。また、ウエハの中心部と周辺部での特性の差異も
減少し、これらのウエハを用いたデバイスは、均質で優
れた特性を有するものとなる。
The susceptor for vapor phase growth according to the present invention has a projection with a predetermined thickness provided on a flat plate surface, and a recess of a counterbore for mounting a semiconductor wafer on the projection. For this reason, when performing epitaxial film formation in multiple layers, at the time of gas purging in each film formation switching step, the flat plate surface temperature is lower than that of the upper surface of the convex portion on which the semiconductor wafer to be coated is mounted.
Since the temperature can be relatively high, the dopant component attached to the flat plate surface can be easily evaporated and scattered and removed. Therefore, an epitaxial film having predetermined electrical characteristics can be formed from the beginning without being affected by the dopant concentration in the processing gas at the preceding stage at the time of each film formation. For example, the first film grown epitaxially on an IGBT wafer having a two-layer structure can be formed. A rapidly changing resistance difference can be formed between the layer and the second layer, and sag does not occur in the profile of the SR value in the depth direction of the wafer. Further, the difference in characteristics between the central portion and the peripheral portion of the wafer is reduced, and devices using these wafers have uniform and excellent characteristics.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の気相成長用のサセプタの一実施例の模
式的平面説明図(A)及びそのB−B線断面の端部説明
図(B)
FIG. 1 is a schematic plan view (A) of an embodiment of a susceptor for vapor phase growth of the present invention, and an end view (B) of a cross section taken along line BB of FIG.

【図2】本発明の気相成長用のサセプタの他の実施例の
模式的平面説明図
FIG. 2 is a schematic plan view of another embodiment of the susceptor for vapor phase growth of the present invention.

【図3】本発明の実施例に用いたベルジャ型化学気相成
長装置の斜視説明図
FIG. 3 is an explanatory perspective view of a bell jar type chemical vapor deposition apparatus used in an embodiment of the present invention.

【図4】本発明の実施例及び比較例で得られた2層構造
エピタキシャルウエハの深さ方向に対するSR値を示す
プロファイル
FIG. 4 is a profile showing an SR value with respect to a depth direction of a two-layered epitaxial wafer obtained in Examples and Comparative Examples of the present invention.

【符号の説明】[Explanation of symbols]

1 サセプタ 2 平板面 3 ガスノズル用通孔 4 凸部 5 凹部 10 カーボン基材 11 SiC膜 21 縦型気相成長装置 22 ベルジャ型反応管 23 単結晶シリコンウエハ 25 ガス吹出口 26 原料ガス導入ノズル 27 排気管 28 高周波コイル REFERENCE SIGNS LIST 1 susceptor 2 flat plate surface 3 gas nozzle through hole 4 convex portion 5 concave portion 10 carbon base material 11 SiC film 21 vertical vapor deposition apparatus 22 bell jar type reaction tube 23 single crystal silicon wafer 25 gas outlet 26 source gas introduction nozzle 27 exhaust Tube 28 High frequency coil

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 カーボン基材表面をSiC膜で被膜して
なる気相成長用サセプタであって、平板の表面から突出
した1または2以上の凸部を有し、凸部上面に半導体ウ
エハ載置凹部が形成されてなることを特徴とする気相成
長用のサセプタ。
1. A susceptor for vapor phase growth comprising a carbon substrate surface coated with a SiC film, the susceptor having one or more projections projecting from the surface of a flat plate, and a semiconductor wafer mounted on an upper surface of the projection. A susceptor for vapor phase growth, wherein a recess is formed.
【請求項2】 前記凸部の厚さが、前記平板厚さの1/
7〜2/7である請求項1記載の気相成長用のサセプ
タ。
2. The method according to claim 1, wherein the thickness of the projection is 1 / th of the thickness of the flat plate.
The susceptor for vapor phase growth according to claim 1, wherein the ratio is 7 to 2/7.
【請求項3】 前記凸部上面の半径が、前記凹部半径よ
り3〜20mm大きく形成される請求項1または2記載
の気相成長用のサセプタ。
3. The susceptor for vapor phase growth according to claim 1, wherein a radius of the upper surface of the convex portion is formed to be 3 to 20 mm larger than a radius of the concave portion.
JP04148797A 1997-02-10 1997-02-10 Susceptor for vapor phase growth Expired - Fee Related JP3565469B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04148797A JP3565469B2 (en) 1997-02-10 1997-02-10 Susceptor for vapor phase growth

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04148797A JP3565469B2 (en) 1997-02-10 1997-02-10 Susceptor for vapor phase growth

Publications (2)

Publication Number Publication Date
JPH10223546A true JPH10223546A (en) 1998-08-21
JP3565469B2 JP3565469B2 (en) 2004-09-15

Family

ID=12609717

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3565469B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100520914B1 (en) * 2001-07-30 2005-10-11 도시바세라믹스가부시키가이샤 Wafer processing member
KR100794719B1 (en) 2005-11-02 2008-01-15 주식회사 실트론 Susceptor for chemical vapor-phase deposition apparatus
JP2017098441A (en) * 2015-11-26 2017-06-01 クアーズテック株式会社 Susceptor
CN110277344A (en) * 2019-06-20 2019-09-24 江苏能华微电子科技发展有限公司 Carrier is used in a kind of growth of epitaxial wafer
CN114197038A (en) * 2021-12-10 2022-03-18 中国电子科技集团公司第四十六研究所 Protection device for improving ultraviolet transmittance of aluminum nitride epitaxial layer and use method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5271171A (en) * 1975-12-10 1977-06-14 Matsushita Electronics Corp Production of epitaxial wafer
JPS61144633U (en) * 1985-02-27 1986-09-06
JPH05283351A (en) * 1992-04-01 1993-10-29 Toshiba Ceramics Co Ltd Susceptor
JPH0758029A (en) * 1993-08-16 1995-03-03 Sumitomo Metal Ind Ltd Susceptor
JPH0758040A (en) * 1993-08-20 1995-03-03 Toshiba Ceramics Co Ltd Susceptor for phase growth apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5271171A (en) * 1975-12-10 1977-06-14 Matsushita Electronics Corp Production of epitaxial wafer
JPS61144633U (en) * 1985-02-27 1986-09-06
JPH05283351A (en) * 1992-04-01 1993-10-29 Toshiba Ceramics Co Ltd Susceptor
JPH0758029A (en) * 1993-08-16 1995-03-03 Sumitomo Metal Ind Ltd Susceptor
JPH0758040A (en) * 1993-08-20 1995-03-03 Toshiba Ceramics Co Ltd Susceptor for phase growth apparatus

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100520914B1 (en) * 2001-07-30 2005-10-11 도시바세라믹스가부시키가이샤 Wafer processing member
KR100794719B1 (en) 2005-11-02 2008-01-15 주식회사 실트론 Susceptor for chemical vapor-phase deposition apparatus
JP2017098441A (en) * 2015-11-26 2017-06-01 クアーズテック株式会社 Susceptor
CN110277344A (en) * 2019-06-20 2019-09-24 江苏能华微电子科技发展有限公司 Carrier is used in a kind of growth of epitaxial wafer
CN114197038A (en) * 2021-12-10 2022-03-18 中国电子科技集团公司第四十六研究所 Protection device for improving ultraviolet transmittance of aluminum nitride epitaxial layer and use method
CN114197038B (en) * 2021-12-10 2024-06-07 中国电子科技集团公司第四十六研究所 Protection device for improving ultraviolet transmittance of aluminum nitride epitaxial layer and use method

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