JPH10215275A5 - - Google Patents

Info

Publication number
JPH10215275A5
JPH10215275A5 JP1998000291A JP29198A JPH10215275A5 JP H10215275 A5 JPH10215275 A5 JP H10215275A5 JP 1998000291 A JP1998000291 A JP 1998000291A JP 29198 A JP29198 A JP 29198A JP H10215275 A5 JPH10215275 A5 JP H10215275A5
Authority
JP
Japan
Prior art keywords
processor
interface
bus
data
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1998000291A
Other languages
English (en)
Japanese (ja)
Other versions
JP4002337B2 (ja
JPH10215275A (ja
Filing date
Publication date
Priority claimed from US08/774,605 external-priority patent/US6260073B1/en
Application filed filed Critical
Publication of JPH10215275A publication Critical patent/JPH10215275A/ja
Publication of JPH10215275A5 publication Critical patent/JPH10215275A5/ja
Application granted granted Critical
Publication of JP4002337B2 publication Critical patent/JP4002337B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP00029198A 1996-12-30 1998-01-05 多重バス・アーキテクチャを有するネットワーク・スイッチ Expired - Fee Related JP4002337B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US774605 1996-12-30
US08/774,605 US6260073B1 (en) 1996-12-30 1996-12-30 Network switch including a switch manager for periodically polling the network ports to determine their status and controlling the flow of data between ports

Publications (3)

Publication Number Publication Date
JPH10215275A JPH10215275A (ja) 1998-08-11
JPH10215275A5 true JPH10215275A5 (enExample) 2005-07-28
JP4002337B2 JP4002337B2 (ja) 2007-10-31

Family

ID=25101749

Family Applications (1)

Application Number Title Priority Date Filing Date
JP00029198A Expired - Fee Related JP4002337B2 (ja) 1996-12-30 1998-01-05 多重バス・アーキテクチャを有するネットワーク・スイッチ

Country Status (4)

Country Link
US (1) US6260073B1 (enExample)
EP (1) EP0854611B1 (enExample)
JP (1) JP4002337B2 (enExample)
DE (1) DE69731936T2 (enExample)

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US7487232B1 (en) * 2000-09-13 2009-02-03 Fortinet, Inc. Switch management system and method
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US6417964B1 (en) * 2001-02-05 2002-07-09 Avamex Corporation Reconfigurable automatic gain control and method for optical amplifier
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US6898202B2 (en) * 2001-06-27 2005-05-24 International Business Machines Corporation Method, apparatus and computer program for informing a requesting device of port configuration changes in a computer network switching device
US7181547B1 (en) 2001-06-28 2007-02-20 Fortinet, Inc. Identifying nodes in a ring network
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US7324452B2 (en) * 2002-01-14 2008-01-29 Fujitsu Limited Weighted credit-based arbitration using credit history
US7177311B1 (en) 2002-06-04 2007-02-13 Fortinet, Inc. System and method for routing traffic through a virtual router-based network switch
US7161904B2 (en) * 2002-06-04 2007-01-09 Fortinet, Inc. System and method for hierarchical metering in a virtual router based network switch
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US7203192B2 (en) 2002-06-04 2007-04-10 Fortinet, Inc. Network packet steering
US7340535B1 (en) 2002-06-04 2008-03-04 Fortinet, Inc. System and method for controlling routing in a virtual router system
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US7391719B2 (en) * 2002-07-15 2008-06-24 Sixnet, Llc Redundant network interface for ethernet devices
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US7499419B2 (en) 2004-09-24 2009-03-03 Fortinet, Inc. Scalable IP-services enabled multicast forwarding with efficient resource utilization
US20070115979A1 (en) * 2004-11-18 2007-05-24 Fortinet, Inc. Method and apparatus for managing subscriber profiles
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US7773621B2 (en) * 2006-09-16 2010-08-10 Mips Technologies, Inc. Transaction selector employing round-robin apparatus supporting dynamic priorities in multi-port switch
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US8667254B1 (en) * 2008-05-15 2014-03-04 Xilinx, Inc. Method and apparatus for processing data in an embedded system
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US10356012B2 (en) * 2015-08-20 2019-07-16 Intel Corporation Techniques for routing packets among virtual machines
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