JPH10211986A - Tray for storing chip type parts - Google Patents

Tray for storing chip type parts

Info

Publication number
JPH10211986A
JPH10211986A JP9029782A JP2978297A JPH10211986A JP H10211986 A JPH10211986 A JP H10211986A JP 9029782 A JP9029782 A JP 9029782A JP 2978297 A JP2978297 A JP 2978297A JP H10211986 A JPH10211986 A JP H10211986A
Authority
JP
Japan
Prior art keywords
chip
type component
recesses
tray
trays
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP9029782A
Other languages
Japanese (ja)
Inventor
Naoki Takeshita
直樹 竹下
Manabu Kusano
学 草野
Fumihiko Sagawa
文彦 佐川
Taizo Nakagawa
泰蔵 中川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Priority to JP9029782A priority Critical patent/JPH10211986A/en
Publication of JPH10211986A publication Critical patent/JPH10211986A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68313Auxiliary support including a cavity for storing a finished device, e.g. IC package, or a partly finished device, e.g. die, during manufacturing or mounting

Landscapes

  • Wire Bonding (AREA)
  • Packaging Frangible Articles (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Abstract

PROBLEM TO BE SOLVED: To turn chip parts upside down only by turning stacked trays upside down by forming a recess at opposed locations on the flat opposite surfaces of the tray to receive chip type parts. SOLUTION: A grid-patterned frame 4 is provided on a first surface 2 on the top side of a base body 1 and a second surface 3 on the bottom side of the body 1 respectively to provide a plurality of recesses 5a, 5b arranged, in columns and rows, so as to be opposed to one another. And the recesses 5a on the surface 2 and the recesses 5b on the surface 3 are made symmetrical with respect to a plane. Each of the recesses 5a, 5b has four inclined side surfaces and a flat bottom so as to receive a chip type part 6. For mounting the parts on a circuit substrate of an automatic mounting machine, an empty storage tray is placed on a plurality of trays which are stacked, the storage tray having the same shape as the trays, and the trays are turned upside down. Thus the chip parts 6 stored in the recesses 5a are moved into the recesses 5b of the tray disposed on top of the recesses 5a so that bumps 6a can be directed downward.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、チップ型部品収納
用トレイに関し、詳しくは自動実装機へのIC(集積回
路)チップの供給に使用して好適であるチップ型部品収
納用トレイに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip-type component storage tray, and more particularly to a chip-type component storage tray suitable for use in supplying IC (integrated circuit) chips to an automatic mounting machine. is there.

【0002】[0002]

【従来の技術】従来のチップ型部品収納用トレイDは、
図6、図7に示すように、成形材料からなり、方形に形
成された基体21と、該基体21の上面側の第一の面2
2と下面側の第二の面23と、該第一の面22に設けら
れた格子状の枠部24と、該枠部24に囲まれた複数
行、複数列からなる複数個の凹部25(例えば4行*8
列の32個)とから成る。
2. Description of the Related Art Conventional chip-type component storage trays D are:
As shown in FIGS. 6 and 7, a base body 21 made of a molding material and formed in a square shape, and a first surface 2 on the upper surface side of the base body 21.
2, a second surface 23 on the lower surface side, a lattice-shaped frame portion 24 provided on the first surface 22, and a plurality of concave portions 25 composed of a plurality of rows and a plurality of columns surrounded by the frame portion 24. (For example, 4 lines * 8
32 rows).

【0003】また、トレイDの該凹部25の形成されて
いる上面側の第一の面22と、凹部25の形成されてい
ない下面側の第二の面23とは、略平行であって平坦に
形成されている。該凹部25の深さ寸法Hは、該凹部2
5に収納される集積回路(IC)や抵抗やコンデンサな
どのチップ型部品26の厚さ寸法hより僅かに深い寸法
(H>h)に形成されている。
The first surface 22 on the upper surface of the tray D where the recess 25 is formed and the second surface 23 on the lower surface where the recess 25 is not formed are substantially parallel and flat. Is formed. The depth H of the recess 25 is
5 is formed to have a slightly larger dimension (H> h) than the thickness dimension h of the chip-type component 26 such as an integrated circuit (IC) or a resistor or a capacitor.

【0004】また、前記凹部25は、台形状であって、
四方に傾斜した側面25aと、平坦に形成され底面25
bとを備えている。そして、トレイDの複数個の凹部2
5は、チップ型部品26が、それぞれ収納されるために
形成されており、凹部25の底面25bの大きさは、該
チップ型部品26の上面の大きさに対して同等である
か、僅かに大きく形成されている。
The recess 25 has a trapezoidal shape,
A side surface 25a inclined in all directions and a flat bottom surface 25
b. Then, the plurality of concave portions 2 of the tray D
5 is formed so that each of the chip components 26 is accommodated therein, and the size of the bottom surface 25b of the concave portion 25 is equal to or slightly smaller than the size of the upper surface of the chip component 26. It is formed large.

【0005】また、前記凹部25に収納されるチップ型
部品26は、所定の機能を備えており、図示されていな
い絶縁基板の回路パターンとの接続のための複数個のバ
ンプ(端子)26aが、上面に設けられている。またチ
ップ型部品26の下面は平坦である。
The chip-type component 26 housed in the recess 25 has a predetermined function, and has a plurality of bumps (terminals) 26a for connection with a circuit pattern (not shown) on an insulating substrate. , Provided on the upper surface. The lower surface of the chip component 26 is flat.

【0006】また、チップ型部品26が収納されたチッ
プ型部品収納用トレイDは、通常は図示してないが所定
の個数積層されて、IC製造メーカから納入される。こ
のときチップ型部品収納用トレイDの上面側の第一の面
22と下面側の第二の面23とは、平坦であることから
積層が容易である。
The chip-type component storage trays D in which the chip-type components 26 are stored are usually stacked in a predetermined number (not shown) and delivered from an IC manufacturer. At this time, since the first surface 22 on the upper surface side and the second surface 23 on the lower surface side of the chip-type component storage tray D are flat, lamination is easy.

【0007】ここで、表面実装型のチップ型部品26と
しては、抵抗やコンデンサは無論、集積回路(以下IC
と称する)も、自動実装機の普及とともに広く用いられ
るようになって来ている。このチップ型部品26(例え
ば、集積回路)は、所望の回路パターンが形成された絶
縁基板上に他のチップ型部品(例えば、抵抗やコンデン
サ)などとともに自動実装機によって載置され、所定の
機能を備えた回路基板が形成される。
Here, as the chip type component 26 of the surface mount type, resistors and capacitors are of course used, and integrated circuits (hereinafter referred to as ICs) are used.
) Are also widely used with the spread of automatic mounting machines. The chip-type component 26 (for example, an integrated circuit) is mounted on an insulating substrate on which a desired circuit pattern is formed together with other chip-type components (for example, a resistor and a capacitor) by an automatic mounting machine and has a predetermined function. Is formed.

【0008】図8に示すように、チップ型部品26(例
えば、集積回路)は、自動実装機にチップ型部品26が
収納されたチップ型部品収納用トレイEをセットし、自
動実装機のバキュームによる吸着腕30によって、チッ
プ型部品26の上面を吸着して回路基板上に搬送・載置
されるのである。
As shown in FIG. 8, a chip-type component 26 (for example, an integrated circuit) has a chip-type component storage tray E in which the chip-type component 26 is stored in an automatic mounting machine, and a vacuum of the automatic mounting machine. The upper surface of the chip-type component 26 is sucked by the suction arm 30 of the above-described manner, and is conveyed and placed on the circuit board.

【0009】しかしながら、チップ型部品収納用トレイ
Eに収納されたチップ型部品26は、図7に示すように
IC製造メーカから納品されてくるときは、回路基板の
回路パターンに接続するためのバンプ(端子)26a
が、上面に配置された形態で納品されてくる。これはチ
ップ型部品収納用トレイDを搬送するときに、チップ型
部品26のバンプ26aが下面を向き、トレイDの凹部
25の底部25bと当接していると擦れなどによって、
バンプ26aの表面に傷がつき、バンプ26aの半田付
け性が悪くなるという問題を回避するためである。
However, when the chip-type components 26 stored in the chip-type component storage tray E are delivered from an IC maker as shown in FIG. 7, bumps for connecting to a circuit pattern on a circuit board are provided. (Terminal) 26a
Are delivered in a form arranged on the upper surface. This is because when the chip-type component storage tray D is conveyed, the bumps 26a of the chip-type components 26 face the lower surface, and when the bumps 26a are in contact with the bottom 25b of the concave portion 25 of the tray D, they are rubbed or the like.
This is to avoid the problem that the surface of the bump 26a is scratched and the solderability of the bump 26a deteriorates.

【0010】このため、回路基板上にチップ型部品26
を搬送・載置するためには、図7に示すようにチップ型
部品26が収納されたチップ型部品収納用トレイDの上
面に、自動実装機セット用の空のチップ型部品トレイE
を裏返した形態で重ね合わせ、この後、重ね合わせたま
ま、トレイD、Eの天地(上下)をひっくり返すと、収
納されたチップ型部品26も、バンプ26aが下方を向
いた形態に配置される(図8参照)。
For this reason, the chip-type component 26 is mounted on the circuit board.
As shown in FIG. 7, an empty chip-type component tray E for an automatic mounting machine is set on the upper surface of the chip-type component storage tray D in which the chip-type component 26 is stored, as shown in FIG.
When the trays D and E are turned upside down (upside down) while the trays D and E are overlaid, the stored chip-type components 26 are also arranged in a form in which the bumps 26a face downward. (See FIG. 8).

【0011】上述の如くチップ型部品26のバンプ26
aが、下方を向いた形態であることから、このまま自動
実装機(図示せず)の吸着腕30によって、チップ型部
品26を吸着して、回路基板上に配置することができ
る。
As described above, the bump 26 of the chip-type component 26
Since a is downward, the chip-type component 26 can be sucked by the suction arm 30 of the automatic mounting machine (not shown) and placed on the circuit board.

【0012】[0012]

【発明が解決しようとする課題】しかしながら、従来の
チップ型部品収納用トレイDの第一の面22の凹部25
に収納されたチップ型部品26(例えば、集積回路)
は、納品時には、バンプ26aが形成された面が上方を
向いて収納されていることから、該チップ型部品26を
所定の回路パターンが形成されている絶縁基板に載置す
るとき、チップ型部品26の上下面を反転させることが
必要になる。
However, the concave portion 25 of the first surface 22 of the conventional chip-type component storage tray D is required.
Chip type component 26 (for example, integrated circuit)
When the chip-type component 26 is placed on an insulating substrate on which a predetermined circuit pattern is formed, the chip-type component 26 is stored at the time of delivery because the surface on which the bumps 26a are formed faces upward. It is necessary to invert the upper and lower surfaces of 26.

【0013】このことから、自動実装機にチップ型部品
収納用トレイDをセットするとき毎に、まず、一個のチ
ップ型部品収納用トレイDの凹部25に、自動実装機セ
ット用の空のチップ型部品収納用トレイEの凹部を重ね
合わせて上下面を反転させることによって、チップ型部
品26のバンプ26a面を下方に向けさせるという工数
が必要であり、手間が掛かるという問題点があった。
For this reason, every time the chip-type component storage tray D is set in the automatic mounting machine, first, an empty chip for the automatic mounting machine setting is set in the recess 25 of one chip-type component storage tray D. The man-hours for turning the bump 26a surface of the chip-type component 26 downward by overlapping the concave portions of the mold component storage tray E and inverting the upper and lower surfaces are required, and there is a problem that it takes time and effort.

【0014】[0014]

【課題を解決するための手段】本発明のチップ型部品収
納用トレイは、平板状の第一の面と第二の面とのそれぞ
れ対向する位置にチップ型部品を収納するための凹部を
形成したことである。また、本発明のチップ型部品は、
片面にバンプが形成され、該チップ型部品が前記第一の
面又は第二の面のいずれかの凹部に収納されていること
である。
According to the present invention, there is provided a tray for storing chip-type components, wherein recesses for storing chip-type components are formed at opposing positions of the first and second flat surfaces. It was done. In addition, the chip-type component of the present invention,
A bump is formed on one surface, and the chip-type component is housed in a concave portion on either the first surface or the second surface.

【0015】[0015]

【発明の実施の形態】本発明の実施の形態のチップ型部
品収納用トレイAは、図1〜図5に示すように、成形材
料からなり、方形に形成された基体1と、該基体1の上
面側の第一の面2と、下面側の第二の面3と、該基体1
の第一の面2、および第二の面3にそれぞれ設けられた
格子状の枠部4と、該枠部4に囲まれ、前記第一の面2
および第二の面3のそれぞれに複数行、複数列からなる
複数個の凹部5a、5b(例えば片面が4行*8列の3
2個で、両面に形成されて64個)とが対向した位置に
設けられている。なお、第一の面2の凹部5aと第二の
面3の凹部5bとは、面対称に設けられている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A chip-type component storage tray A according to an embodiment of the present invention, as shown in FIGS. The first surface 2 on the upper surface side, the second surface 3 on the lower surface side,
A grid-like frame portion 4 provided on each of the first surface 2 and the second surface 3 of the first surface 2 and the first surface 2 surrounded by the frame portion 4
And a plurality of recesses 5a, 5b each having a plurality of rows and a plurality of columns (for example, 3 rows each having 4 rows * 8 columns).
2 (64 formed on both sides) are provided at positions facing each other. Note that the concave portion 5a of the first surface 2 and the concave portion 5b of the second surface 3 are provided in plane symmetry.

【0016】また、チップ型部品収納用トレイAの該凹
部5a、5bが形成されている第一の面2と、第二の面
3とは、略平行であって平坦に形成されている。また、
前記凹部5a、5bは、台形状に形成されており、四方
に傾斜した側面5c、5dと、平坦に形成された底面5
e、5fとを備えている。そして、チップ型部品収納用
トレイAの第一の面2と第二の面3との複数個の凹部5
a、5bは、それぞれチップ型部品6が、それぞれ収納
されるために形成されており、凹部5a、5bの底面5
e、5fの大きさは、該チップ型部品6の大きさに対し
て同等であるか、僅かに大きく形成されている。
The first surface 2 on which the recesses 5a and 5b of the chip-type component storage tray A are formed and the second surface 3 are substantially parallel and flat. Also,
The recesses 5a and 5b are formed in a trapezoidal shape, and have side faces 5c and 5d inclined in four directions and a flat bottom face 5d.
e, 5f. Then, a plurality of recesses 5 on the first surface 2 and the second surface 3 of the chip-type component storage tray A are provided.
a, 5b are formed for accommodating the chip-type components 6, respectively, and the bottom surfaces 5 of the recesses 5a, 5b are formed.
The sizes of e and 5f are equal to or slightly larger than the size of the chip-type component 6.

【0017】該凹部5aの深さ寸法Hは、該凹部5aに
収納されるチップ型部品6の厚さ寸法hより僅かに深い
長さ寸法(H>h)に形成されている。また、凹部5a
の深さ寸法Hは、これに限定されず、チップ型部品6の
厚さ寸法と同等であっても、短い寸法に形成されていて
も良いが、短く形成されているときは、凹部5aに収納
されたチップ型部品6のバンプ6aが、上部に積層され
た別のトレイA2(図2参照)の下面側の第二の面3に
形成された凹部5bの底面5f(逆さに配置されてい
る)と当接することない寸法であれば良い。
The depth H of the recess 5a is formed to be slightly longer (H> h) than the thickness h of the chip-type component 6 housed in the recess 5a. Also, the recess 5a
Is not limited to this, and may be formed to be equal to or smaller than the thickness of the chip-type component 6. The bumps 6a of the stored chip-type component 6 are placed on the bottom surface 5f of the concave portion 5b formed on the second surface 3 on the lower surface side of another tray A2 (see FIG. ) As long as it does not come into contact with it.

【0018】上述の如き深さ寸法であれば、チップ型部
品6のバンプ6aが、トレイAの凹部5bの底面5fと
当接することがないため、積層された複数個のトレイA
1、A2、A3を搬送する際(図2参照)に、バンプ6
aに擦れによる傷が付くことはなく、よって傷によるバ
ンプ6aの半田付け性の悪化が生じることはない。
With the depth dimension as described above, the bumps 6a of the chip-type component 6 do not come into contact with the bottom surface 5f of the concave portion 5b of the tray A.
1, A2 and A3 are transported (see FIG. 2).
a is not scratched by rubbing, and therefore, the solderability of the bump 6a is not deteriorated by the scratch.

【0019】図2に示すように、上述の如きチップ型部
品収納用トレイA1、A2、A3にて納品されたチップ
型部品6(例えば、集積回路)を、自動実装機の吸着腕
30にて吸着させて回路基板に載置する際には、前記ト
レイA1、A2、A3と同形状の空のチップ型部品収納
用トレイBを、最上部のチップ型部品収納用トレイA3
に被せて配置し、全体の天地(上下)を一度に反転させ
る。この反転によって、各トレイA1、A2、A3の凹
部5aに収納されていたチップ型部品6は、各上部に配
置されていた各トレイA2、A3、Bの凹部5bに移動
する。
As shown in FIG. 2, the chip-type components 6 (for example, integrated circuits) delivered in the chip-type component storage trays A1, A2, A3 as described above are picked up by the suction arm 30 of the automatic mounting machine. When mounting on a circuit board by suction, the empty chip-type component storage tray B having the same shape as the trays A1, A2, A3 is replaced with the uppermost chip-type component storage tray A3.
And flip the entire top (up and down) at once. Due to this inversion, the chip-type components 6 stored in the concave portions 5a of the respective trays A1, A2, A3 move to the concave portions 5b of the respective trays A2, A3, B arranged on the respective upper portions.

【0020】このチップ型部品6の反転・移動によっ
て、図5に示すように、バンプ6aは、下方を向いて配
置され、この形態で、チップ型部品6を、自動実装機の
吸着腕30にて吸着させて回路基板に載置させることが
できる。
As shown in FIG. 5, the bumps 6a are arranged to face downward due to the reversal and movement of the chip-type component 6, and in this mode, the chip-type component 6 is attached to the suction arm 30 of the automatic mounting machine. To be mounted on a circuit board.

【0021】[0021]

【発明の効果】本発明によれば、片面にバンプ6aを備
えたチップ型部品6が、IC製造メーカなどからチップ
型部品収納用トレイAの上面側の第一の面2の凹部5a
に収納され、複数個の各トレイA1、A2、A3が積層
されて納品される際に、従来と同様にチップ型部品6の
バンプ6aが上方を向いた形態で納品できることから、
IC製造メーカでの作業工数の変更はない。
According to the present invention, the chip-type component 6 provided with the bump 6a on one side is provided with the concave portion 5a of the first surface 2 on the upper surface side of the chip-type component storage tray A from an IC maker or the like.
When the plurality of trays A1, A2, and A3 are stacked and delivered, the bumps 6a of the chip-type component 6 can be delivered in the same manner as in the related art, so that the trays A1, A2, and A3 can be delivered.
There is no change in man-hours at the IC manufacturer.

【0022】そして、チップ型部品収納用トレイAから
チップ型部品6を、図示しない絶縁基板上の回路パター
ンに載置するために、自動実装機にチップ型部品収納用
トレイAをセットする際に、積層されて納品された各ト
レイA1、A2、A3全体を一度に天地(上下)を反転
させるだけで、各トレイA1、A2、A3の第一の面2
の凹部5aに収納されていたチップ型部品6は、上部に
配置された別の各トレイA2、A3、Bの第二の面3の
凹部5bに反転・移動される。
In order to place the chip-type component 6 from the chip-type component storage tray A on a circuit pattern on an insulating substrate (not shown), the chip-type component storage tray A is set in an automatic mounting machine. The first surface 2 of each of the trays A1, A2, A3 is simply inverted upside down (up and down) at a time for all the trays A1, A2, A3 stacked and delivered.
The chip-type component 6 housed in the concave portion 5a is inverted and moved to the concave portion 5b of the second surface 3 of each of the other trays A2, A3, and B arranged on the upper side.

【0023】この別のチップ型部品収納用トレイA2、
A3、Bの凹部5bへの移動によって、チップ型部品6
の天地(上下)を反転させることが出来、バンプ6aが
下方を向いて、凹部5bに収納される。よって、このチ
ップ型部品6が反転されたチップ型部品収納用トレイA
2、A3、Bを自動実装機にセットするだけで、回路基
板へのチップ型部品6の自動実装を行うことができる。
これは、チップ型部品収納用トレイAを、ひとつずつ反
転させる前工程での作業に比較して容易・安価な工数で
あるという効果を奏する。また、本発明のチップ型部品
収納用トレイは、ICメーカから納品されるトレイと自
動実装機セット用のトレイとを兼用することができると
いう効果を奏する。
This another chip type component storage tray A2,
The movement of A3 and B to the concave portion 5b causes the chip-type component 6 to move.
Can be turned upside down, and the bump 6a faces downward and is stored in the recess 5b. Therefore, the chip-type component storage tray A in which the chip-type component 6 is inverted.
By simply setting 2, A3, and B in the automatic mounting machine, the chip-type component 6 can be automatically mounted on the circuit board.
This has the effect that the man-hour is easier and cheaper than the work in the previous step of inverting the chip-type component storage trays A one by one. Further, the chip-type component storage tray of the present invention has an effect that the tray delivered from the IC maker and the tray for setting the automatic mounting machine can be used.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態のチップ型部品収納用トレ
イを示す要部断面図である。
FIG. 1 is a sectional view of a main part showing a chip-type component storage tray according to an embodiment of the present invention.

【図2】本発明のチップ型部品収納用トレイを積層した
形態を示す要部断面図である。
FIG. 2 is a cross-sectional view of a main part showing a form in which chip-type component storage trays of the present invention are stacked.

【図3】本発明のチップ型部品収納用トレイを示す斜視
図である。
FIG. 3 is a perspective view showing a chip-type component storage tray of the present invention.

【図4】本発明のチップ型部品収納用トレイを示す要部
上面図である。
FIG. 4 is a main part top view showing the chip-type component storage tray of the present invention.

【図5】本発明のチップ型部品収納用トレイを反転した
形態を示す要部断面図である。
FIG. 5 is a cross-sectional view of a main part showing an inverted form of the chip-type component storage tray of the present invention.

【図6】従来のチップ型部品収納用トレイを示す要部断
面図である。
FIG. 6 is a sectional view of a main part showing a conventional chip-type component storage tray.

【図7】従来のチップ型部品収納用トレイを積層した形
態を示す要部断面図である。
FIG. 7 is a cross-sectional view of a main part showing a configuration in which conventional chip-type component storage trays are stacked.

【図8】従来のチップ型部品収納用トレイを反転した形
態を示す要部断面図である。
FIG. 8 is a cross-sectional view of a main part showing an inverted form of a conventional chip-type component storage tray.

【符号の説明】[Explanation of symbols]

A チップ型部品収納用トレイ 1 基体 2 第一の面 3 第二の面 5a、5b 凹部 6、60 チップ型部品(集積回路) 6a、26a バンプ A Tray for storing chip-type components 1 Base 2 First surface 3 Second surface 5a, 5b Recess 6, 60 Chip-type component (integrated circuit) 6a, 26a Bump

───────────────────────────────────────────────────── フロントページの続き (72)発明者 中川 泰蔵 東京都大田区雪谷大塚町1番7号 アルプ ス電気株式会社内 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Taizo Nakagawa 1-7 Yukitani Otsukacho, Ota-ku, Tokyo Alps Electric Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 平板状の第一の面と第二の面とのそれぞ
れ対向する位置にチップ型部品を収納するための凹部を
形成したことを特徴とするチップ型部品収納用トレイ。
1. A chip-type component storage tray, wherein a recess for storing a chip-type component is formed at a position facing each of a first plate-shaped surface and a second surface.
【請求項2】 前記チップ型部品は、片面にバンプが形
成され、該チップ型部品が前記第一の面又は第二の面の
いずれかの凹部に収納されていることを特徴とする請求
項1記載のチップ型部品収納用トレイ。
2. The chip-type component according to claim 1, wherein a bump is formed on one surface, and the chip-type component is housed in a concave portion on either the first surface or the second surface. 2. The tray for storing chip-type components according to 1.
JP9029782A 1997-01-29 1997-01-29 Tray for storing chip type parts Withdrawn JPH10211986A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9029782A JPH10211986A (en) 1997-01-29 1997-01-29 Tray for storing chip type parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9029782A JPH10211986A (en) 1997-01-29 1997-01-29 Tray for storing chip type parts

Publications (1)

Publication Number Publication Date
JPH10211986A true JPH10211986A (en) 1998-08-11

Family

ID=12285594

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9029782A Withdrawn JPH10211986A (en) 1997-01-29 1997-01-29 Tray for storing chip type parts

Country Status (1)

Country Link
JP (1) JPH10211986A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005116762A (en) * 2003-10-07 2005-04-28 Fujitsu Ltd Method for protecting semiconductor device, cover for semiconductor device, semiconductor device unit, and packaging structure of semiconductor device
US7757862B2 (en) 2007-08-20 2010-07-20 Seiko Epson Corporation Semiconductor chip housing tray
JP2012099631A (en) * 2010-11-02 2012-05-24 Fujitsu Semiconductor Ltd Semiconductor chip tray, and method of conveying semiconductor chip
KR101405124B1 (en) * 2013-01-07 2014-06-11 주식회사 고려반도체시스템 Apparatus and method of transferring chips between trays having different positional tolerance
JP2018064077A (en) * 2016-10-14 2018-04-19 株式会社ディスコ Device chip, housing tray, and housing method of device chip
JP2021034490A (en) * 2019-08-21 2021-03-01 三菱電機株式会社 Manufacturing method of storage tray and semiconductor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005116762A (en) * 2003-10-07 2005-04-28 Fujitsu Ltd Method for protecting semiconductor device, cover for semiconductor device, semiconductor device unit, and packaging structure of semiconductor device
US8164181B2 (en) 2003-10-07 2012-04-24 Fujitsu Semiconductor Limited Semiconductor device packaging structure
US8268670B2 (en) 2003-10-07 2012-09-18 Fujitsu Semiconductor Limited Method of semiconductor device protection
US7757862B2 (en) 2007-08-20 2010-07-20 Seiko Epson Corporation Semiconductor chip housing tray
JP2012099631A (en) * 2010-11-02 2012-05-24 Fujitsu Semiconductor Ltd Semiconductor chip tray, and method of conveying semiconductor chip
KR101405124B1 (en) * 2013-01-07 2014-06-11 주식회사 고려반도체시스템 Apparatus and method of transferring chips between trays having different positional tolerance
JP2018064077A (en) * 2016-10-14 2018-04-19 株式会社ディスコ Device chip, housing tray, and housing method of device chip
JP2021034490A (en) * 2019-08-21 2021-03-01 三菱電機株式会社 Manufacturing method of storage tray and semiconductor device

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