JPH08316268A - Semiconductor device and housing carrier therefor - Google Patents
Semiconductor device and housing carrier thereforInfo
- Publication number
- JPH08316268A JPH08316268A JP11698495A JP11698495A JPH08316268A JP H08316268 A JPH08316268 A JP H08316268A JP 11698495 A JP11698495 A JP 11698495A JP 11698495 A JP11698495 A JP 11698495A JP H08316268 A JPH08316268 A JP H08316268A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- spacer
- board
- printed circuit
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は半導体チップがボールグ
リッドアレイ型(以下BGAと称する)パッケージ内に
封入された半導体装置に係り、特に装置基板との間に適
切な間隙を形成可能な半導体装置とはんだボールを保護
可能な収納キャリアの構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a semiconductor chip is enclosed in a ball grid array type (hereinafter referred to as BGA) package, and particularly, a semiconductor device capable of forming an appropriate gap with a device substrate. And a structure of a storage carrier capable of protecting solder balls.
【0002】BGAパッケージは上面に半導体チップが
マウントされるプリント基板と半導体チップ封止用の樹
脂層とで構成され、プリント基板は下面に所定のピッチ
で配列された端子部とそれぞれの端子部に被着されたは
んだボールとを具えている。A BGA package is composed of a printed circuit board on which a semiconductor chip is mounted and a resin layer for sealing the semiconductor chip. The printed circuit board has terminal portions arranged at a predetermined pitch on the lower surface and respective terminal portions. With solder balls applied.
【0003】半導体チップがかかるBGAパッケージの
プリント基板にマウントされてなる半導体装置は装置基
板への実装に際し、プリント基板下面の端子部に被着さ
れたはんだボールを溶融することにより装置基板上の導
体パターンと接続している。A semiconductor device in which a semiconductor chip is mounted on a printed circuit board of such a BGA package is mounted on the device board by melting a solder ball attached to a terminal portion on the lower surface of the printed circuit board to form a conductor on the device board. Connected to the pattern.
【0004】しかし、実装時にプリント基板と装置基板
との間隙が小さいと溶融したはんだが広がり隣接する導
体間を短絡させる。また、保管中や運搬時の衝撃により
端子部に被着されたはんだボールが脱落すると接続不良
を生じるという問題がある。However, if the gap between the printed board and the device board is small during mounting, the molten solder spreads and short-circuits between adjacent conductors. Further, there is a problem that a connection failure occurs when the solder balls attached to the terminal portions fall off due to an impact during storage or transportation.
【0005】そこで、装置基板への実装に際してプリン
ト基板と装置基板との間に常に所定の間隙が形成される
BGAパッケージと、保管中や運搬時に印加される衝撃
によってはんだボールが脱落することのない収納キャリ
アの開発が要望されている。Therefore, the BGA package in which a predetermined gap is always formed between the printed circuit board and the device board at the time of mounting on the device board, and the solder balls do not drop off due to an impact applied during storage or transportation. The development of a storage carrier is desired.
【0006】[0006]
【従来の技術】図6は従来の半導体装置の一例を示す
図、図7は従来の収納キャリアを示す側断面図である。2. Description of the Related Art FIG. 6 is a view showing an example of a conventional semiconductor device, and FIG. 7 is a side sectional view showing a conventional storage carrier.
【0007】従来の半導体装置1は図6(a) に示す如く
プリント基板11と封止用の樹脂層12とで構成されたBG
Aパッケージを有し、プリント基板11にマウントされた
半導体チップ13はプリント基板11の上面に形成された樹
脂層12内に封止されている。A conventional semiconductor device 1 is a BG composed of a printed circuit board 11 and a sealing resin layer 12 as shown in FIG. 6 (a).
A semiconductor chip 13 having an A package and mounted on the printed board 11 is sealed in a resin layer 12 formed on the upper surface of the printed board 11.
【0008】プリント基板11は図6(a) 、および図6
(b) に示す如く下面に所定のピッチで配列形成された複
数の端子部14を有し、マウントされた半導体チップ13を
封止したあと所定の粒径を有するはんだボール15がそれ
ぞれの端子部14に被着される。The printed circuit board 11 is shown in FIG. 6 (a) and FIG.
As shown in (b), the lower surface has a plurality of terminal portions 14 arranged in an array at a predetermined pitch, and after the mounted semiconductor chip 13 is sealed, solder balls 15 having a predetermined particle diameter are provided in the respective terminal portions. It is attached to 14.
【0009】かかる半導体装置1の実装は図6(c) に示
す如く装置基板2が有する導体パターン21に端子部14を
位置決めした後、半導体装置1を装置基板2上に載置す
ると共に加熱し溶融したはんだボール15で端子部14と導
体パターン21とを接続する。As shown in FIG. 6C, the semiconductor device 1 is mounted by positioning the terminal portion 14 on the conductor pattern 21 of the device substrate 2 and then mounting the semiconductor device 1 on the device substrate 2 and heating it. The molten solder ball 15 connects the terminal portion 14 and the conductor pattern 21.
【0010】一方、保管や運搬に際し前記半導体装置1
を収納する収納キャリア3の一例は全体がプラスチック
等によって形成され、図7(a) に示す如く上面に開口し
底面がはんだボール15に当接して半導体装置1を支承す
るポケット31を具えている。On the other hand, the semiconductor device 1 is stored or transported.
An example of a storage carrier 3 for storing a semiconductor device 1 is made of plastic or the like, and has a pocket 31 for opening the upper surface and abutting the solder ball 15 for supporting the semiconductor device 1 as shown in FIG. 7A. .
【0011】また、半導体装置1を収納する収納キャリ
ア3の他の例は図7(b) に示す如く全体がプラスチック
等によって形成され、上面に開口するポケット31は内部
にプリント基板11の下面に当接して半導体装置1を支承
する受け台32を具えている。Another example of the storage carrier 3 for storing the semiconductor device 1 is formed entirely of plastic or the like as shown in FIG. 7 (b), and a pocket 31 opening on the upper surface is provided inside the lower surface of the printed circuit board 11. It comprises a pedestal 32 that abuts and supports the semiconductor device 1.
【0012】[0012]
【発明が解決しようとする課題】しかし、BGAパッケ
ージを用いた上記半導体装置を装置基板上に載置し加熱
したとき溶融したはんだが広がる範囲は、はんだボール
の大きさ、プリント基板と装置基板との間隙、装置基板
上の導体パターンの大きさ等により左右される。However, when the above semiconductor device using the BGA package is placed on the device substrate and heated, the range in which the molten solder spreads is the size of the solder ball, the printed circuit board and the device substrate. And the size of the conductor pattern on the device substrate.
【0013】例えば、半導体装置を装置基板上に載置し
加熱したときプリント基板と装置基板との間隙が所定値
より小さくなると、溶融したはんだが許容範囲を超えて
周囲に広がり隣接する導体との間を塞ぐため導体間が短
絡すると言う問題が生じる。For example, when the semiconductor device is placed on a device substrate and heated and the gap between the printed circuit board and the device substrate becomes smaller than a predetermined value, the molten solder spreads beyond the allowable range and spreads to the adjacent conductor. Since the gaps are closed, there is a problem that the conductors are short-circuited.
【0014】また、従来の収納キャリアは衝撃が加わる
と収納された半導体装置がポケット内において前後左右
に移動可能であり、例えば、底面がはんだボールに当接
する収納キャリアでは半導体装置が移動するとはんだボ
ールが脱落する場合がある。Further, in the conventional storage carrier, the semiconductor device stored therein can be moved back and forth, left and right in the pocket when an impact is applied. For example, in a storage carrier whose bottom surface is in contact with the solder balls, when the semiconductor device is moved, the solder balls are moved. May fall out.
【0015】更に、プリント基板の下面に当接する受け
台をポケット内部に有する収納キャリアの場合は半導体
装置が移動すると、受け台との摩擦によってプリント基
板上の導体パターンに断線が生じたりはんだボールが脱
落するという問題があった。Further, in the case of a storage carrier having a pedestal in the pocket that abuts against the lower surface of the printed circuit board, when the semiconductor device moves, the conductor pattern on the printed circuit board is broken due to friction with the pedestal, or solder balls are generated. There was a problem of falling out.
【0016】本発明の目的はプリント基板と装置基板と
の間に常に所定の間隙が形成されるBGAパッケージを
有する半導体装置と、保管中や運搬時に印加される衝撃
によりはんだボールが脱落する等のことのない収納キャ
リアを提供することにある。An object of the present invention is to provide a semiconductor device having a BGA package in which a predetermined gap is always formed between a printed circuit board and a device substrate, and a solder ball may drop off due to an impact applied during storage or transportation. It is to provide a storage carrier that does not exist.
【0017】[0017]
【課題を解決するための手段】図1は本発明になる半導
体装置を示す図、図2は本発明になる収納キャリアを示
す側断面図である。なお全図を通し同じ対象物は同一記
号で表している。FIG. 1 is a view showing a semiconductor device according to the present invention, and FIG. 2 is a side sectional view showing a storage carrier according to the present invention. Note that the same object is denoted by the same symbol throughout the drawings.
【0018】上記課題は下面に形成された複数の端子部
14にそれぞれはんだボール15を被着したプリント基板41
を有し、はんだボール15を溶融させることにより装置基
板2上に実装される半導体装置であって、はんだボール
15を溶融させたときプリント基板41と装置基板2との間
に所定の間隙を形成するスペーサ42が、プリント基板41
下面の端子部14が形成されていない領域に設けられた本
発明の半導体装置と、半導体装置を1個ずつ収納するポ
ケット31が上面に開口した収納キャリアであって、前記
スペーサ42に当接しプリント基板41下面のはんだボール
15が底面と接触しないよう半導体装置を支承する受け台
33が、ポケット31内部のスペーサ42と対応する位置に設
けられた本発明の半導体装置の収納キャリアにより達成
される。The above problems are caused by a plurality of terminal portions formed on the lower surface.
Printed circuit board 41 with solder balls 15 on each 14
A semiconductor device mounted on the device substrate 2 by melting the solder balls 15
The spacer 42, which forms a predetermined gap between the printed board 41 and the device board 2 when the printed circuit board 41 is melted,
A semiconductor device of the present invention provided in a region where the terminal portion 14 is not formed on the lower surface and a pocket 31 for accommodating one semiconductor device at a time is a storage carrier which is opened on the upper surface and contacts the spacer 42 to print. Solder balls on the bottom of the board 41
A pedestal that supports the semiconductor device so that 15 does not contact the bottom surface.
33 is achieved by the storage carrier of the semiconductor device of the present invention provided at the position corresponding to the spacer 42 inside the pocket 31.
【0019】[0019]
【作用】図1においてプリント基板41下面の端子部14が
形成されていない領域に間隙形成のためのスペーサ42を
設けるにより、プリント基板と装置基板の間に所定の間
隙を形成可能なBGAパッケージを有する半導体装置を
実現することができる。A BGA package that can form a predetermined gap between the printed board and the device board by providing a spacer 42 for forming a gap in the area where the terminal portion 14 is not formed on the lower surface of the printed board 41 in FIG. A semiconductor device having the semiconductor device can be realized.
【0020】また、図2においてポケット31の内部に前
記スペーサ42に当接し半導体装置を支承する受け台33を
設けることにより、保管中や運搬時に印加される衝撃に
よりはんだボールが脱落する等のことのない収納キャリ
アを実現することができる。Further, by providing a pedestal 33 that abuts the spacer 42 and supports the semiconductor device inside the pocket 31 in FIG. 2, the solder balls may fall off due to an impact applied during storage or transportation. It is possible to realize a storage carrier that does not have.
【0021】即ち、本発明によりプリント基板と装置基
板の間に所定の間隙が形成されるBGAパッケージを有
する半導体装置と、保管中や運搬時に印加される衝撃に
よりはんだボールが脱落する等のことのない収納キャリ
アを実現することができる。That is, according to the present invention, a semiconductor device having a BGA package in which a predetermined gap is formed between a printed circuit board and a device substrate, and a solder ball falling off due to an impact applied during storage or transportation. No storage carrier can be realized.
【0022】[0022]
【実施例】以下添付図により本発明の実施例について説
明する。なお、図3は本発明の第1の変形例を示す斜視
図、図4は本発明の第2の変形例を示す斜視図、図5は
本発明の第3の変形例を示す斜視図である。Embodiments of the present invention will be described below with reference to the accompanying drawings. 3 is a perspective view showing a first modification of the present invention, FIG. 4 is a perspective view showing a second modification of the present invention, and FIG. 5 is a perspective view showing a third modification of the present invention. is there.
【0023】本発明の半導体装置4は図1(a) に示す如
くプリント基板41と樹脂層12とで構成されたBGAパッ
ケージを具えており、プリント基板41にマウントされた
半導体チップはプリント基板41の上面に形成された樹脂
層12により封止されている。The semiconductor device 4 of the present invention comprises a BGA package composed of a printed board 41 and a resin layer 12 as shown in FIG. 1A, and the semiconductor chip mounted on the printed board 41 is a printed board 41. It is sealed by a resin layer 12 formed on the upper surface of.
【0024】プリント基板41は図1(a) 、および図1
(b) に示す如く下面に所定のピッチで配列形成された複
数の端子部14を有し、マウントされた半導体チップ13を
封止したあと所定の粒径を有するはんだボール15がそれ
ぞれの端子部14に被着される。The printed circuit board 41 is shown in FIG.
As shown in (b), the lower surface has a plurality of terminal portions 14 arranged in an array at a predetermined pitch, and after the mounted semiconductor chip 13 is sealed, solder balls 15 having a predetermined particle diameter are provided in the respective terminal portions. It is attached to 14.
【0025】また、プリント基板41下面の端子部14が形
成されていない領域に少なくとも1個のスペーサ42が形
成されている。なお、図はプリント基板41の下面にスペ
ーサ42を形成しているがプリント基板41を貫通するピン
をスペーサ42としてもよい。Further, at least one spacer 42 is formed in a region of the lower surface of the printed board 41 where the terminal portion 14 is not formed. Although the spacer 42 is formed on the lower surface of the printed board 41 in the drawing, the spacer 42 may be a pin that penetrates the printed board 41.
【0026】かかる半導体装置4の実装は図1(c) に示
す如く装置基板2が有する導体パターン21に端子部14を
位置決めした後、半導体装置4を装置基板2上に載置す
ると共に加熱し溶融したはんだボール15で端子部14と導
体パターン21とを接続する。As shown in FIG. 1C, the semiconductor device 4 is mounted by positioning the terminal portion 14 on the conductor pattern 21 of the device substrate 2 and then mounting the semiconductor device 4 on the device substrate 2 and heating it. The molten solder ball 15 connects the terminal portion 14 and the conductor pattern 21.
【0027】半導体装置4を装置基板2上に載置したた
ときプリント基板41と装置基板2との間にスペーサ42に
より間隙が形成され、例えば溶融したはんだが許容範囲
を超えて周囲に広がり隣接する導体との間を短絡させる
等の問題を生じることはない。 一方、前記半導体装置
4を収納する本発明の収納キャリア5は図2(a) に示す
如く全体がプラスチック等からなり、上面に開口するポ
ケット31が内部の4隅にそれぞれスペーサ42に当接して
半導体装置4を支承する受け台33を具えている。 かか
る収納キャリア5のポケット31に収納された半導体装置
4はプリント基板41が受け台33と直接接触することがな
く、半導体装置4がポケット31内において前後左右に移
動しても摩擦によって導体パターンの断線等を生じるこ
とはない。 更に、それぞれスペーサ42に当接した受け
台33ははんだボール15が底板と接触しないよう半導体装
置4を支承しており、ポケット31の内部を半導体装置4
が前後左右に移動してもはんだボール15がプリント基板
41から脱落することはない。 また、前記半導体装置4
を収納する本発明の別の収納キャリア5は図2(b)に示
す如く全体がプラスチック等からなり、上面に開口する
ポケット31が内部4隅にそれぞれスペーサ42に当接し半
導体装置4を支承する受け台33を具えている。 前記収
納キャリアとは異なりポケット31内部の受け台33は上面
にスペーサ42の先端が嵌入可能な凹部34を具えており、
ポケット31に収納された半導体装置4はスペーサ42が凹
部34に嵌入しポケット31内部を前後左右に移動すること
はない。 本発明の半導体装置とその収納キャリアの第
1の変形例は図3に示す如くスペーサ42が半導体装置4
の中央に位置し、収納キャリア5はスペーサ42が嵌入可
能な凹部34を上面に具えた受け台33がポケット31の中央
部底板に形成されている。 図1(b) に示す如く端子部
14はプリント基板41の外縁沿いに配列され4隅にスペー
サ42を形成できない場合もあるが、プリント基板41の中
央部に端子部14が形成されない場合が多くかかる半導体
装置では第1の変形例は極めて有効である。 本発明に
なる半導体装置の第2の変形例は図4に示す如くプリン
ト基板41の4方側面に付加されたスペーサ43を有し、プ
リント基板41に付加された板状のスペーサ43を下面から
突出させプリント基板41と装置基板との間に間隙を形成
する。 かかる半導体装置を収納する収納キャリアは図
4に示す如く上面に開口するポケット31を取り囲む4方
の壁面に沿って、半導体装置4のスペーサ42が嵌入する
凹部34を上面に具えた受け台33がスペーサ43と対向する
位置に形成されている。 また、本発明の第3の変形例
における半導体装置は図5に示す如くプリント基板41の
側面に板状のスペーサ44を付加し、対向させた2枚のス
ペーサ44を下面から突出させることによってプリント基
板41と装置基板との間に間隙を形成する。 かかる半導
体装置を収納する収納キャリアは図5に示す如く上面に
開口するポケット31を挟み対向する2壁面に沿って、半
導体装置のスペーサ44が嵌入可能な凹部34を上面に具え
た受け台33がスペーサ44と対向する位置に形成されてい
る。 図1(b) に示す如く端子部14はプリント基板41の
外縁沿いに配列され4隅にスペーサ42を形成できない場
合もあるが、図4、図5に示す如く板状のスペーサをプ
リント基板の側面に付加することは可能でかかる変形例
は極めて有効である。 このようにプリント基板の下面
の端子部が形成されていない領域に間隙を形成するため
のスペーサを設けるによって、プリント基板と装置基板
の間に所定の間隙を形成可能なBGAパッケージを有す
る半導体装置を実現することができる。 また、上方に
開口するポケットの内部に前記スペーサに当接して半導
体装置を支承する受け台を設けることによって、保管中
や運搬時に印加される衝撃によりはんだボールが脱落す
る等のことのない収納キャリアを実現することができ
る。 即ち、本発明によりプリント基板と装置基板の間
に所定の間隙が形成されるBGAパッケージを有する半
導体装置と、保管中や運搬時に印加される衝撃によりは
んだボールが脱落する等のことのない収納キャリアを実
現することができるWhen the semiconductor device 4 is mounted on the device substrate 2, a gap is formed between the printed circuit board 41 and the device substrate 2 by the spacer 42, and, for example, molten solder spreads beyond the permissible range and is adjacent. There is no problem such as short-circuiting with the conductor. On the other hand, the storage carrier 5 of the present invention for storing the semiconductor device 4 is entirely made of plastic or the like as shown in FIG. 2 (a), and the pockets 31 opened on the upper surface are in contact with the spacers 42 at the four corners inside. It comprises a pedestal 33 for supporting the semiconductor device 4. In the semiconductor device 4 housed in the pocket 31 of the housing carrier 5, the printed circuit board 41 does not come into direct contact with the pedestal 33, and even if the semiconductor device 4 moves back and forth, left and right in the pocket 31, the conductor pattern of the conductor pattern 4 is generated by friction. There will be no disconnection. Further, the pedestals 33 which are in contact with the spacers 42 respectively support the semiconductor device 4 so that the solder balls 15 do not contact the bottom plate, and the inside of the pocket 31 is covered with the semiconductor device 4.
Solder balls 15 are not
It will never fall out of 41. In addition, the semiconductor device 4
As shown in FIG. 2 (b), another storage carrier 5 for storing the present invention is made entirely of plastic or the like, and pockets 31 opening at the top face support the semiconductor device 4 by abutting spacers 42 at the inner four corners. It has a cradle 33. Unlike the storage carrier, the cradle 33 inside the pocket 31 has a recess 34 into which the tip of the spacer 42 can be fitted on the upper surface,
In the semiconductor device 4 housed in the pocket 31, the spacer 42 is not fitted in the recess 34 and does not move back and forth and left and right inside the pocket 31. In the first modification of the semiconductor device and the storage carrier for the same according to the present invention, as shown in FIG.
At the center of the storage carrier 5, a pedestal 33 having a recess 34 into which the spacer 42 can be fitted is formed on the central bottom plate of the pocket 31. Terminal part as shown in Fig. 1 (b)
In some cases, 14 are arranged along the outer edge of the printed board 41 and the spacers 42 cannot be formed at the four corners, but in many cases the terminal portion 14 is not formed in the central portion of the printed board 41. It is extremely effective. A second modified example of the semiconductor device according to the present invention has spacers 43 added to the four side surfaces of the printed board 41 as shown in FIG. 4, and the plate-like spacers 43 added to the printed board 41 from the bottom surface. A space is formed between the printed circuit board 41 and the device board so as to project. As shown in FIG. 4, a storage carrier for storing such a semiconductor device has a pedestal 33 having on its upper surface a recess 34 into which a spacer 42 of the semiconductor device 4 is fitted, along four wall surfaces surrounding a pocket 31 opening on the upper surface. It is formed at a position facing the spacer 43. In the semiconductor device according to the third modification of the present invention, a plate-like spacer 44 is added to the side surface of the printed board 41 as shown in FIG. 5, and two spacers 44 facing each other are projected from the lower surface to print. A gap is formed between the substrate 41 and the device substrate. As shown in FIG. 5, a storage carrier for storing such a semiconductor device has a pedestal 33 having a recessed portion 34 on the upper surface thereof, into which a spacer 44 of the semiconductor device can be fitted, along two wall surfaces facing each other with a pocket 31 opened on the upper surface. It is formed at a position facing the spacer 44. As shown in FIG. 1 (b), the terminal portions 14 may be arranged along the outer edge of the printed circuit board 41 and the spacers 42 may not be formed at the four corners. However, as shown in FIGS. It can be added to the side surface, and such a modification is extremely effective. A semiconductor device having a BGA package capable of forming a predetermined gap between the printed board and the device board by providing a spacer for forming a gap in the area where the terminal portion is not formed on the lower surface of the printed board is provided. Can be realized. Further, by providing a pedestal for supporting the semiconductor device in contact with the spacer inside the pocket that opens upward, the storage carrier that does not drop the solder balls due to the impact applied during storage or transportation. Can be realized. That is, according to the present invention, a semiconductor device having a BGA package in which a predetermined gap is formed between a printed circuit board and a device substrate, and a storage carrier in which a solder ball is not dropped due to an impact applied during storage or transportation. Can be realized
【0028】。..
【発明の効果】上述の如く本発明によればプリント基板
と装置基板との間に所定の間隙が形成されるBGAパッ
ケージ型半導体装置と、保管中や運搬時に印加される衝
撃によりはんだボールが脱落することのない収納キャリ
アを提供することができる。As described above, according to the present invention, the BGA package type semiconductor device in which a predetermined gap is formed between the printed circuit board and the device substrate, and the solder balls drop off due to the impact applied during storage or transportation. It is possible to provide a storage carrier that does not operate.
【図1】 本発明になる半導体装置を示す図である。FIG. 1 is a diagram showing a semiconductor device according to the present invention.
【図2】 本発明になる収納キャリアを示す側断面図で
ある。FIG. 2 is a side sectional view showing a storage carrier according to the present invention.
【図3】 本発明の第1の変形例を示す斜視図である。FIG. 3 is a perspective view showing a first modified example of the present invention.
【図4】 本発明の第2の変形例を示す斜視図である。FIG. 4 is a perspective view showing a second modified example of the present invention.
【図5】 本発明の第3の変形例を示す斜視図である。FIG. 5 is a perspective view showing a third modified example of the present invention.
【図6】 従来の半導体装置の一例を示す図である。FIG. 6 is a diagram showing an example of a conventional semiconductor device.
【図7】 従来の収納キャリアを示す側断面図である。FIG. 7 is a side sectional view showing a conventional storage carrier.
2 装置基板 4 半導体装置 5 収納キャリア 12 樹脂層 13 半導体チップ 14 端子部 15 はんだボール 21 導体パターン 31 ポケット 33 受け台 34 凹部 41 プリント基板 42、43、44 スペーサ 2 Device board 4 Semiconductor device 5 Storage carrier 12 Resin layer 13 Semiconductor chip 14 Terminal part 15 Solder ball 21 Conductor pattern 31 Pocket 33 Receiving base 34 Recessed portion 41 Printed circuit board 42, 43, 44 Spacer
Claims (3)
れはんだボールを被着させたプリント基板を有し、該は
んだボールを溶融させることによって装置基板上に実装
される半導体装置であって、 はんだボールを溶融させたとき前記プリント基板と装置
基板との間に所定の間隙を形成するスペーサが、該プリ
ント基板下面の該端子部が形成されていない領域に設け
られてなることを特徴とする半導体装置。1. A semiconductor device, comprising: a printed circuit board having solder balls adhered to a plurality of terminal portions formed on a lower surface thereof; and a semiconductor device mounted on a device substrate by melting the solder balls. A spacer, which forms a predetermined gap between the printed board and the device board when the solder balls are melted, is provided in an area of the lower surface of the printed board where the terminal portion is not formed. Semiconductor device.
納するポケットが上面に開口してなる半導体装置の収納
キャリアであって、 前記スペーサに当接し前記プリント基板下面のはんだボ
ールが底面と接触しないよう前記半導体装置を支承する
受け台が、該ポケット内部の該スペーサと対応する位置
に設けられてなることを特徴とする半導体装置の収納キ
ャリア。2. A carrier for a semiconductor device, wherein a pocket for accommodating each of the semiconductor devices according to claim 1 is opened on the upper surface, wherein a solder ball on the lower surface of the printed circuit board is in contact with the spacer and a bottom surface is formed on the solder ball. A carrier for a semiconductor device, wherein a pedestal for supporting the semiconductor device so as not to come into contact is provided at a position corresponding to the spacer inside the pocket.
入可能な凹部を有する請求項2記載の半導体装置の収納
キャリア。3. The storage carrier for a semiconductor device according to claim 2, wherein the upper surface of said pedestal has a recess into which a tip of a spacer can be fitted.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11698495A JP3401990B2 (en) | 1995-05-16 | 1995-05-16 | Semiconductor device and its storage carrier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11698495A JP3401990B2 (en) | 1995-05-16 | 1995-05-16 | Semiconductor device and its storage carrier |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH08316268A true JPH08316268A (en) | 1996-11-29 |
JP3401990B2 JP3401990B2 (en) | 2003-04-28 |
Family
ID=14700615
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11698495A Expired - Lifetime JP3401990B2 (en) | 1995-05-16 | 1995-05-16 | Semiconductor device and its storage carrier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3401990B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09283554A (en) * | 1996-04-18 | 1997-10-31 | Nec Corp | Semiconductor device and manufacture thereof |
WO2001039564A1 (en) * | 1999-11-23 | 2001-05-31 | Telefonaktiebolaget Lm Ericsson (Publ) | A module cover element |
US8174116B2 (en) | 2007-08-24 | 2012-05-08 | Nec Corporation | Spacer, and its manufacturing method |
-
1995
- 1995-05-16 JP JP11698495A patent/JP3401990B2/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09283554A (en) * | 1996-04-18 | 1997-10-31 | Nec Corp | Semiconductor device and manufacture thereof |
WO2001039564A1 (en) * | 1999-11-23 | 2001-05-31 | Telefonaktiebolaget Lm Ericsson (Publ) | A module cover element |
US8174116B2 (en) | 2007-08-24 | 2012-05-08 | Nec Corporation | Spacer, and its manufacturing method |
Also Published As
Publication number | Publication date |
---|---|
JP3401990B2 (en) | 2003-04-28 |
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