JPH10209364A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make a semiconductor device thin and improve the radiating function, by electrically inner-lead bonding inner connection pads to electrode pads on integrated circuit elements, and exposing the opposite surface of the circuit elements to the main surface through resin seals. SOLUTION: An inner connection terminal pad 14 at a first flat part 18 is protrudent to the cavity side to facilitate connecting the inner connection terminal pad 14 of a conductor lead 16 to an electrode pad 24 of an integrated circuit element 25 by the inner lead bonding. This allows a semiconductor device to be made thin. The opposite surface of the electric 25 to its main surface is exposed through a resin seal 26 to easily diffuse the heat produced in the element 25 to a heat diffusion plate of a wiring board 22, by bonding to the heat diffusion plate of the board 22 through a heat conductive adhesive 23, thereby improving the radiation performance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a T.BGA type semiconductor device, and more particularly, to one side of a polyimide tape substrate as an interposer for electrically connecting a bonding pad of an integrated circuit element to an external wiring substrate. And a T / BGA type semiconductor device comprising an integrated circuit element mounting substrate having a two-layered conductor circuit pattern layer provided with a conductor circuit pattern layer and a conductive plane layer on the other surface.

[0002]

2. Description of the Related Art Semiconductor devices such as ICs and LSIs are connected to wiring pads on an external wiring board using solder or the like. In recent years, in response to miniaturization, high integration, and miniaturization of integrated circuit elements, a method of surface mounting a semiconductor device on a wiring pad on a wiring board using a solder ball or bump has been proposed, which is referred to as an SBC method. Have been. According to this method, after positioning and mounting the semiconductor device on the wiring board, the semiconductor device may be heated and fixed by reflowing the solder balls or bumps, and the surface mounting of the semiconductor device is easy. Have been.

However, in recent years, with the increase in the speed of information processing equipment, ultra-high frequencies have been used for the operation of semiconductor devices. Therefore, when an ultrahigh-frequency signal is transmitted through a plurality of conductor leads (transmission paths) of a conductor circuit pattern formed at fine intervals on the polyimide substrate, a crosstalk phenomenon occurs in which a signal leaks to the adjacent conductor lead. There was a problem. In order to solve such a problem, a conductive plane (support substrate) of a separately formed conductive member is fixed to the opposite surface of the polyimide tape substrate from the conductive circuit pattern, and a predetermined surface of the conductive circuit pattern is fixed. Connect the conductor lead and the conductive plane through a through hole,
A semiconductor device having a heat radiation and a ground function has been proposed.

In a semiconductor device of this type, a supporting substrate provided with a substantially quadrangular concave portion formed separately by press working and a terminal portion (wire bonding area) on one side thereof are provided with the integrated circuit element mounted thereon. An integrated circuit element mounting board composed of a polyimide tape substrate having a one-layer structure on which a conductor circuit pattern fixedly arranged along the periphery of the portion is formed, an integrated circuit element fixed thereto, and the conductor In general, a structure including a bonding wire for electrically connecting a wire bonding area of a circuit pattern to an electrode pad of an integrated circuit element and a resin sealing portion for covering and protecting the bonding wire is generally used.

[0005]

However, in the above-described semiconductor device, since the connection between the conductor circuit pattern and the electrode pad of the integrated circuit element is made using a wire bonding method, the semiconductor device is not used. However, there is a problem that the thickness of the semiconductor device becomes large, and there is a limit in meeting the demand for thinning of the semiconductor device.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a low-cost semiconductor device having high reliability which can meet the demands for thinning the semiconductor device and improving the heat radiation function. Aim.

[0007]

According to a first aspect of the present invention, there is provided a semiconductor device comprising a polyimide tape as an interposer for electrically connecting a bonding pad of an integrated circuit element to an external wiring board. A conductive circuit pattern layer is provided on one surface of the substrate, and a three-layer structure in which a conductive plane layer is provided on the other surface of the polyimide tape substrate. In a semiconductor device comprising an integrated circuit element mounting substrate provided with an external connection terminal for forming a circuit, the integrated circuit element mounting substrate includes a first flat portion, a second flat portion, and an inclined portion connecting the first flat portion and the second flat portion. The integrated circuit element mounting cavity formed on the conductive circuit pattern layer side and the first flat portion, wherein the cavity is formed. And a region of the internal connection pad of the conductor circuit pattern protruding toward the integrated circuit element, and the integrated circuit element is fixed in the cavity of the integrated circuit element mounting substrate via an elastic adhesive layer. A structure in which the internal connection pads and the electrode pads of the integrated circuit element are electrically connected by inner lead bonding, and at least a surface opposite to the main surface of the integrated circuit element is exposed from a resin sealing portion. Is achieved.

Therefore, in the semiconductor device according to the first aspect of the present invention, since the internal connection pad region of the first flat portion is protruded toward the cavity, the internal device can be easily formed. The connection pad and the electrode pad of the integrated circuit element can be connected by inner lead bonding. As a result, the thickness of the semiconductor device can be reduced.

Further, since the surface opposite to the main surface of the integrated circuit element is configured to be exposed from the resin sealing portion, the integrated circuit element is bonded to the heat diffusion plate of the wiring board via a heat conductive adhesive. Thereby, the heat generated by the integrated circuit element can be easily diffused to the thermal diffusion plate of the wiring board. As a result, the heat dissipation function can be improved.

Further, since the integrated circuit element is fixed by using an adhesive layer having elasticity, the integrated circuit element can have a function of buffering a bonding stress between the integrated circuit element and the substrate. As a result, damage and deformation such as cracks of the semiconductor device can be prevented.

According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the resin sealing portion is at least flush with the second flat surface by potting molding or injection molding. This is achieved by a configuration in which the sealing resin member is filled.

Therefore, in the semiconductor device according to the second aspect of the present invention, since the injection molding is used for filling the sealing resin member, the flatness of the sealing resin is improved and the post-process is performed. The workability of forming the above cover / resist layer can be significantly improved. As a result, manufacturing costs can be reduced.

According to a third aspect of the present invention, in the semiconductor device of the first and second aspects, the conductive circuit pattern layer formed on the second flat surface is arranged in an area array. A structure provided with a solder ball or bump which is covered with a dry film photoresist layer provided with a via hole or a cover resist layer formed by silk screen printing and protrudes from a terminal land exposed in the via hole. Is achieved by:

Therefore, in the semiconductor device according to the third aspect of the present invention, since the conductor circuit pattern layer is covered with the cover resist layer provided with the via hole, the conductor circuit pattern layer is covered with the external environment. Can be protected from
In addition, the positioning of the solder balls or bumps is facilitated, and the workability of forming the solder balls or bumps can be significantly improved.

[0015]

Next, an example of an embodiment of the present invention will be described in detail with reference to the accompanying drawings. Here, FIG. 1 is a schematic explanatory view showing a configuration of a semiconductor device according to an example of the embodiment of the present invention, and FIG. 1A is a side of the conductive plane layer of the semiconductor device according to the example of the embodiment of the present invention. FIG. 1B is a cross-sectional view illustrating a configuration of a semiconductor device according to an embodiment of the present invention, and FIG. 1C is a semiconductor device according to an embodiment of the present invention. 3 is a plan view showing the conductor circuit pattern layer side of FIG.

The semiconductor device 100 according to the first to third embodiments of the present invention is shown in FIGS. 1 (a), 1 (b) and 1 (c).
As shown in FIG. 2, the insulating layer 1 is etched from a polyimide tape substrate 12 having a three-layer structure in which a metal sheet layer 11 is pressed on both sides of an insulating layer 10 of a polyimide tape.
0, a conductive plane layer 13 having a heat dissipation / grounding function is provided on one surface, and an internal connection terminal pad 14 is provided on one end.
Circuit pattern 1 in which a plurality of conductor leads 16 having external connection terminal lands 15 at the other end are arranged.
Seven. In the center thereof, there is provided a first flat portion 18, a second flat portion 19, and an inclined portion 20 for connecting the first flat portion 18, the second flat portion 19, and at least the internal connection terminal pad 14 protruding toward the cavity. An integrated circuit element mounting substrate 22 having the integrated circuit element mounting cavity 21 of
It is fixed to this via an elastic adhesive layer 23, and the internal connection terminal pads 14 of the conductor leads 16 and the electrode pads 24 of the integrated circuit element are connected by inner lead bonding to form an electrical external conduction circuit. In the cavity 21, a sealing resin mainly composed of silicon, which is an example of a sealing resin, is injected into the cavity 21 so as to expose the opposite side of the main surface of the integrated circuit element 25. Resin sealing portion 26 filled by mold
And via hole 2 exposing external connection terminal land 29
Cover resist layer 2 covering the conductor circuit pattern 17 with a dry film photoresist provided with
7 and an external connection terminal 31 formed of a solder ball 30 which is an example of the external connection terminal 29 connected to the external connection terminal land 29 exposed in the via hole 28 and protruding toward the cover resist layer 27 side. It is configured to be.

Here, a protective coating layer of Au plating (not shown) may be formed on at least the surface of the conductor circuit layer. This improves the corrosion resistance of the conductive circuit layer and the conductive plane layer, and facilitates the connection between the internal connection terminal and the electrode pad of the integrated circuit element and the connection of the solder ball as the external connection terminal. Further, the polyimide-based tape substrate is made of Ni / polyimide-based tape / Ni, Al / polyimide-based tape / Al, Cu / polyimide-based tape /
3 made of a thin metal sheet made of electrical or thermal conductive material such as Cu
The above-mentioned substrate having a layer structure can also be used.

[0018]

As described above, according to the semiconductor device of the present invention, the integrated circuit element mounting substrate is formed from a polyimide-based tape substrate in which a conductive metal sheet material such as Cu or Al is press-bonded to both sides thereof, and a conductive plane layer / polyimide. The integrated circuit element is mounted on the integrated circuit element mounting substrate by inner lead bonding (wireless) because of a three-layer structure composed of a system tape / conductor circuit pattern layer. It is possible to meet the demands for improved performance and electrical characteristics (diffusion of parasitic current) and for reduction in size and thickness.

[Brief description of the drawings]

FIG. 1 is a plan view showing a conductive plane layer side of a semiconductor device according to an example of an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a configuration of a semiconductor device according to an example of an embodiment of the present invention.

FIG. 3 is a plan view showing a conductor circuit pattern layer side of a semiconductor device according to an example of an embodiment of the present invention;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 100 Semiconductor device 10 Insulator layer of polyimide tape 11 Thin metal plate layer 12 Polyimide tape substrate of three-layer structure 13 Conductive plane layer 14 Internal connection terminal pad 15 External connection terminal land 16 Conductor lead 17 Conductor circuit pattern 18 First flat Part 19 Second flat part 20 Inclined part 21 Integrated circuit element mounting cavity 22 Integrated circuit element mounting substrate 23 Elastic adhesive layer 24 Electrode pad of integrated circuit path element 25 Integrated circuit element 26 Resin sealing part 27 Cover / resist layer 28 Via hole 29 Solder ball 30 External connection terminal

Claims (3)

[Claims] A conductive circuit pattern layer on one surface of a polyimide tape substrate and a conductive circuit layer on another surface of the polyimide tape substrate as an interposer for electrically connecting a bonding pad of the integrated circuit element to an external wiring substrate. A semiconductor device comprising an integrated circuit element mounting board having a three-layer structure provided with a plane layer and further provided with external connection terminals for forming an electrically conductive circuit by connecting to the conductor circuit pattern and pads of an external wiring board. The integrated circuit device mounting substrate according to claim 1, wherein the integrated circuit device mounting substrate is depressed into a circular dish shape having a first flat portion, a second flat portion, and an inclined portion connecting the first flat portion and the second flat portion, and the integrated circuit device formed on the conductive circuit pattern layer side. A structure having a mounting cavity and a region of an internal connection pad of a conductive circuit pattern formed on the first flat portion and protruding toward the cavity. The integrated circuit element is fixed in the cavity of the integrated circuit element mounting substrate via an elastic adhesive layer, and the internal connection pads and the electrode pads of the integrated circuit element are connected by inner lead bonding. A semiconductor device electrically connected to the semiconductor device, wherein at least a surface opposite to a main surface of the integrated circuit element is exposed from a resin sealing portion. 2. The resin sealing portion is filled with a sealing resin member by potting molding or injection molding so as to be at least flush with the second flat surface. The semiconductor device according to claim 1, wherein: 3. The conductor circuit pattern layer formed on the second flat surface is a dry film photoresist layer provided with via holes arranged in an area array or a cover formed by silk screen printing. 3. The semiconductor device according to claim 1, further comprising a solder ball or a bump which is covered with a resist layer and protrudes from a terminal land exposed to the via hole.