JPH10200091A - Manufacture of semiconductor thin film device - Google Patents
Manufacture of semiconductor thin film deviceInfo
- Publication number
- JPH10200091A JPH10200091A JP35780396A JP35780396A JPH10200091A JP H10200091 A JPH10200091 A JP H10200091A JP 35780396 A JP35780396 A JP 35780396A JP 35780396 A JP35780396 A JP 35780396A JP H10200091 A JPH10200091 A JP H10200091A
- Authority
- JP
- Japan
- Prior art keywords
- atoms
- substrate
- temperature
- thin film
- bond
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Recrystallisation Techniques (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、Ｓｉ基板上に量
子効果素子を形成する半導体薄膜素子の製造方法に関す
る。The present invention relates to a method for manufacturing a semiconductor thin film device for forming a quantum effect device on a Si substrate.
【０００２】[0002]
【従来の技術】従来、Ｓｉ基板上にＳｂ等を用いて量子
効果素子を形成する方法として、δ−ｄｏｐｉｎｇ法が
ある。この方法により、不純物の局在によるバンド不連
続構造の形成や、チャネル構造へのキャリアの供給が可
能となる。この方法は分子線エピタキシー（ＭＢＥ）に
より薄膜を形成しするもので、不純物濃度のコントロー
ルは、主に、Ｓｂ−ＳｉとＳｂ−Ｓｂ結合の結合エネル
ギーの差を利用して行なっている。2. Description of the Related Art Conventionally, as a method of forming a quantum effect element using Sb or the like on a Si substrate, there is a δ-doping method. According to this method, formation of a band discontinuous structure due to localization of impurities and supply of carriers to a channel structure can be performed. In this method, a thin film is formed by molecular beam epitaxy (MBE), and the impurity concentration is controlled mainly by using the difference in the binding energy between Sb-Si and Sb-Sb bonds.
【０００３】[0003]
【発明が解決しようとする課題】上記従来のδ−ｄｏｐ
ｉｎｇ法の場合、薄膜におけるｄｏｐｉｎｇプロファイ
ルのコントロールが困難であり、任意の形状のｄｏｐｉ
ｎｇ部分を形成することはできないものでああった。従
って、電子素子への利用にも大きな制限があった。The above conventional δ-dop
In the case of the ing method, it is difficult to control the doping profile in the thin film, and the doping profile of an arbitrary shape
No ng portion could be formed. Accordingly, there is a great limitation on the use for electronic devices.
【０００４】この発明は、Ｓｉ等の基板上に容易且つ正
確に所望の素子形成が可能な半導体薄膜素子の製造方法
を提供することを目的とする。It is an object of the present invention to provide a method of manufacturing a semiconductor thin film device which can easily and accurately form a desired device on a substrate such as Si.
【０００５】[0005]
【課題を解決するための手段】この発明は、Ｓｉ基板
を、ＳｉとＳｂ原子の結合は切れずＳｂ同士の結合は容
易に切れる温度に加熱し、Ｓｂ原子を１原子の平面的な
層に分子線エピタキシー（ＭＢＥ）等により蒸着させ、
この後、上記Ｓｉ基板温度をＳｂ原子が蒸発ににくい温
度に降下させ、所定の位置に電子線またはレーザー光を
照射してエネルギーを加え、Ｓｂ原子とＳｉ原子の結合
を切り、Ｓｂを蒸発させる半導体薄膜素子の製造方法で
ある。According to the present invention, a Si substrate is heated to a temperature at which the bond between Si and Sb atoms is not broken and the bond between Sb atoms is easily broken, so that the Sb atoms are converted into a one-atom planar layer. Deposited by molecular beam epitaxy (MBE) or the like,
Thereafter, the temperature of the Si substrate is lowered to a temperature at which Sb atoms are difficult to evaporate, and a predetermined position is irradiated with an electron beam or a laser beam to apply energy, thereby breaking the bond between the Sb atoms and the Si atoms and evaporating Sb. This is a method for manufacturing a semiconductor thin film element.
【０００６】[0006]
【発明の実施の形態】以下、この発明の一実施の形態に
ついて図面を基にして説明する。この実施例の半導体薄
膜素子の製造方法は、図１（Ａ）に示すように、Ｓｉ基
板１０を６５０℃に加熱し、図１（Ｂ）に示すように、
Ｓｂ原子をＳｉ基板１０上に蒸着させる。蒸着方法は分
子線エピタキシーにより行なう。このときのＳｉ基板１
０の温度は、Ｓｉ−Ｓｂの結合によるＳｂが蒸発せず、
Ｓｂ−Ｓｂ結合は、この基板温度で容易に蒸発する温度
に設定する。これにより、図１（Ｃ）に示すように、Ｓ
ｉ基板１０上では、Ｓｉ基板１９の表面で結合したＳｂ
原子にさらにＳｂ原子が蒸着しても高い基板温度によ
り、Ｓｂ−Ｓｂ結合が切れてＳｂ原子は蒸発してしま
う。これにより、図１（Ｄ）に示すように、Ｓｂの１原
子の層が形成される。DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. In the method of manufacturing a semiconductor thin film element of this embodiment, as shown in FIG. 1A, the Si substrate 10 is heated to 650 ° C., and as shown in FIG.
Sb atoms are deposited on the Si substrate 10. The deposition is performed by molecular beam epitaxy. Si substrate 1 at this time
At a temperature of 0, Sb due to the bond of Si—Sb does not evaporate,
The Sb-Sb bond is set at a temperature at which the substrate temperature easily evaporates. As a result, as shown in FIG.
On the i-substrate 10, Sb bonded on the surface of the Si substrate 19
Even if Sb atoms are further vapor-deposited on the atoms, the Sb-Sb bond is broken due to the high substrate temperature, and the Sb atoms evaporate. Thus, as shown in FIG. 1D, a layer of one atom of Sb is formed.
【０００７】この後、Ｓｉ基板１０の温度をＳｂ原子が
蒸発しにくい温度、例えば室温に近い温度に降下させ、
図１（Ｄ）に示すように、所定の位置に電子線またはレ
ーザー光を照射して、その部分にエネルギーを与えＳｂ
原子とＳｉ原子の結合を切り、Ｓｂを蒸発させる。以上
により、Ｓｉ基板１０の表面に、所望形状のＳｂの１原
子の層を正確に形成することができる。After that, the temperature of the Si substrate 10 is reduced to a temperature at which Sb atoms hardly evaporate, for example, a temperature close to room temperature.
As shown in FIG. 1 (D), a predetermined position is irradiated with an electron beam or a laser beam, and energy is given to that portion to give Sb.
The bond between the atom and the Si atom is broken, and Sb is evaporated. As described above, a single-atom layer of Sb having a desired shape can be accurately formed on the surface of the Si substrate 10.
【０００８】なお、この発明の基板及び蒸着させる原子
は適宜組み合わせて選択可能なものである。この発明の
半導体薄膜素子は、半導体レーザー等の量子効果を利用
した発光素子やＨＥＭＴ等の超高速デバイス等に用いる
ことができる。The substrate of the present invention and the atoms to be vapor-deposited can be appropriately combined and selected. The semiconductor thin film element of the present invention can be used for a light emitting element utilizing a quantum effect such as a semiconductor laser, an ultra high speed device such as a HEMT, and the like.
【０００９】[0009]
【発明の効果】この発明の半導体薄膜素子は、Ｓｉ等の
半導体基板上にＳｂ等の１原子の層を所望の位置に正確
に形成することができ、各種の半導体素子の不純物ドー
ピング等に利用可能である。According to the semiconductor thin film device of the present invention, a single atomic layer of Sb or the like can be accurately formed at a desired position on a semiconductor substrate of Si or the like, and is used for impurity doping of various semiconductor devices. It is possible.
【図１】この発明の半導体薄膜素子の製造方法を示す概
念図である。FIG. 1 is a conceptual diagram showing a method for manufacturing a semiconductor thin film device of the present invention.
１０ Ｓｉ基板 10 Si substrate
Claims (3)
他の原子の結合は切れず上記他の原子同士の結合は容易
に切れる温度に加熱し、上記他の原子を１原子の層に蒸
着させ、この後、上記基板温度を上記他の原子が蒸発に
にくい温度に降下させ、所定の位置にエネルギーを与
え、上記他の原子と上記半導体基板の原子の結合を切
り、その部分の上記他の原子を蒸発させる半導体薄膜素
子の製造方法。A semiconductor substrate is heated to a temperature at which the bond between the substrate semiconductor atoms and other atoms is not broken and the bonds between the other atoms are easily broken, and the other atoms are deposited on a layer of one atom. Then, the substrate temperature is lowered to a temperature at which the other atoms are difficult to evaporate, energy is applied to a predetermined position, the bond between the other atoms and the atoms of the semiconductor substrate is cut, and the other Of manufacturing a semiconductor thin-film element for evaporating atoms.
れずＳｂ同士の結合は容易に切れる温度に加熱し、Ｓｂ
原子を１原子の層に蒸着させ、この後、上記Ｓｉ基板温
度をＳｂ原子が蒸発ににくい温度に降下させ、所定の位
置に電子線またはレーザー光を照射して、Ｓｂ原子とＳ
ｉ原子の結合を切り、Ｓｂを蒸発させる半導体薄膜素子
の製造方法。2. The Si substrate is heated to a temperature at which the bond between Si and Sb atoms is not broken and the bond between Sb is easily broken.
Atoms are vapor-deposited on a one-atom layer, and thereafter, the temperature of the Si substrate is reduced to a temperature at which Sb atoms are difficult to evaporate, and a predetermined position is irradiated with an electron beam or a laser beam.
A method of manufacturing a semiconductor thin film element in which a bond of an i atom is cut off and Sb is evaporated.
５０℃に加熱する請求項２記載の半導体薄膜素子の製造
方法。3. The temperature of the Si substrate during Sb deposition is 6
3. The method for manufacturing a semiconductor thin film device according to claim 2, wherein the heating is performed at 50.degree.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35780396A JPH10200091A (en) | 1996-12-28 | 1996-12-28 | Manufacture of semiconductor thin film device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35780396A JPH10200091A (en) | 1996-12-28 | 1996-12-28 | Manufacture of semiconductor thin film device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10200091A true JPH10200091A (en) | 1998-07-31 |
Family
ID=18456007
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP35780396A Pending JPH10200091A (en) | 1996-12-28 | 1996-12-28 | Manufacture of semiconductor thin film device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10200091A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7699932B2 (en) | 2004-06-02 | 2010-04-20 | Micron Technology, Inc. | Reactors, systems and methods for depositing thin films onto microfeature workpieces |
| US8133554B2 (en) * | 2004-05-06 | 2012-03-13 | Micron Technology, Inc. | Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces |
-
1996
- 1996-12-28 JP JP35780396A patent/JPH10200091A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8133554B2 (en) * | 2004-05-06 | 2012-03-13 | Micron Technology, Inc. | Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces |
| US20120171389A1 (en) * | 2004-05-06 | 2012-07-05 | Micron Technology, Inc. | Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces |
| US9023436B2 (en) * | 2004-05-06 | 2015-05-05 | Micron Technology, Inc. | Methods for depositing material onto microfeature workpieces in reaction chambers and systems for depositing materials onto microfeature workpieces |
| US7699932B2 (en) | 2004-06-02 | 2010-04-20 | Micron Technology, Inc. | Reactors, systems and methods for depositing thin films onto microfeature workpieces |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A131 | Notification of reasons for refusal |
Effective date: 20070620 Free format text: JAPANESE INTERMEDIATE CODE: A131 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20080409 |