JPH10163898A - Radio receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a radio receiver which always tunes with high accuracy and has a tuning circuit that is used for both AM reception and AF reception. SOLUTION: A sampling tuning circuit 5 which samples a receiving signal that is received by an antenna 3 with a reference clock that is outputted from a clock generating circuit 4 and extracts only the reference clock and the same frequency element is provided inside a radio receiver. At the time of receiving an FM broadcasting, an FM intermediate frequency signal that is outputted from a mixing circuit 102 is inputted to the circuit 5 and only 10.7MHz frequency element is extracted. At the time of receiving an AM broadcast, a receiving signal that is received by the antenna 3 is directly inputted to the circuit 5 and only a selected channel frequency element is extracted. Also, a tracking error is stopped by interlocking the frequency of a local oscillating signal which is used at the time of conversion into an AM intermediate frequency and the frequency of a reference clock and changing them.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radio receiver including a sampling and tuning circuit for extracting only the same frequency component as a reference clock.

[0002]

2. Description of the Related Art A tuning circuit is provided in a radio receiver so that only a desired frequency radio wave can be selected. However, if only one tuning circuit is provided, frequency selectivity is not good and noise cannot be completely removed. Therefore, a plurality of tuning circuits are often provided inside the receiver. For example,
In a superheterodyne AM receiver, a tuning circuit is provided in each of an antenna input circuit, a high frequency amplifier circuit, and an intermediate frequency amplifier circuit.

[0003]

By the way, when an antenna of an AM radio receiver is constituted by a rod antenna like a car radio, since this antenna is capacitive,
The capacitance changes depending on the length of the antenna, and even if a tuning circuit is provided in the antenna input circuit, tuning cannot be performed well. For this reason, without providing a tuning circuit in the first stage of the radio receiver, the high-frequency signal from the antenna is kept in untuned FET
There is also proposed a circuit in which the signal is amplified by the amplifier and is tuned at the subsequent stage of the FET. However, when tuning is not performed at the first stage of the radio receiver, various frequency radio waves are input to a tuning circuit provided at the subsequent stage, so that desired frequency components are obstructed and extraction cannot be performed accurately.

A conventional AM / FM dual-purpose radio receiver generally has separate tuning circuits for AM reception and FM reception, respectively, and the number of components is increased to reduce the size of the receiver. It was a hindrance factor.

Further, a conventional tuning circuit generally includes an LC resonance circuit, and Q is always kept constant even when the tuning frequency changes. For this reason, there has been a problem that the higher the tuning frequency, the wider the bandwidth, and the bandwidth changes according to the tuning frequency.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and a purpose thereof is to provide a tuning circuit which can perform high-precision tuning over a wide band and can be used for AM reception and FM reception. To provide a radio receiver provided with the radio receiver.

[0007]

According to a first aspect of the present invention, there is provided a radio receiver having a sampling tuning circuit provided inside a receiver, and receiving a signal received by an antenna and inputting the signal to the sampling tuning circuit. , And extracts only the same frequency component as the reference clock from the received signal. As a result, a tuning circuit can be formed without using a conventional LC resonance circuit, and is not affected by the capacitance of the antenna. Therefore, the antenna can be directly connected to the sampling tuning circuit.

According to a second aspect of the present invention, a plurality of capacitors are provided for each pulse signal output from the pulse generating circuit, and these capacitors are synchronized with each pulse signal in accordance with the signal level of the received signal. The accumulated charge is accumulated. By connecting one end of each of these capacitors to an output terminal, only the same frequency component as the pulse signal is extracted.

A radio receiver according to a third aspect of the present invention is a receiver capable of receiving an AM broadcast, wherein a sampling tuning circuit is directly connected to, for example, an antenna, and a frequency component desired to select a channel from a received signal received by the antenna. Extract only

A radio receiver according to a fourth aspect is a superheterodyne receiver capable of receiving FM broadcasts.
The output of the M front end unit is input to a sampling tuning circuit to extract only an intermediate frequency (for example, 10.7 MHz) component, and the output of the sampling tuning circuit is input to an FM detection unit.

[0011] The radio receiver according to claim 5 is characterized in that AM broadcasting and F
It is a receiver that can receive M broadcasts, and switches the input of the sampling tuning circuit depending on which one is received. Specifically, at the time of receiving an FM broadcast, an FM intermediate frequency signal, which is the result of frequency conversion performed by the FM front end unit, is input to a sampling tuning circuit, and the sampling tuning circuit is used as an intermediate frequency filter. On the other hand, when receiving an AM broadcast, a received signal received by an antenna is directly input to a sampling tuning circuit to tune to a desired frequency. In addition, the frequency of the reference clock is fixed when receiving FM broadcasting, and the frequency of the reference clock is changed in accordance with the desired frequency when receiving AM broadcasting.

A radio receiver according to a sixth aspect of the present invention is a superheterodyne receiver capable of receiving AM broadcasting, and has a local oscillation frequency used for converting the frequency of a reference clock input to a sampling tuning circuit to an intermediate frequency. Since the signal frequency is changed in conjunction with the signal frequency, the tracking error, which has been conventionally regarded as a problem, does not occur.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a radio receiver according to the present invention will be specifically described with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of a radio receiver. As shown in FIG. 1, the radio receiver according to the present embodiment includes an FM receiver 1 for receiving FM broadcasts and an AM receiver 2 for receiving AM broadcasts. FM receiver 1
Are a high frequency amplifier circuit 101, a mixing circuit 102, a local oscillation circuit 103, a tuning circuit 104, an intermediate frequency amplifier circuit 10
5, FM detection circuit 106, stereo demodulation circuit 107, de-emphasis circuits 108L and 108R, low frequency amplification circuits 109L and 109R, and speakers 110L and 11
It is configured to include 0R. On the other hand, the AM receiving unit 2
High frequency amplification circuit 201, mixing circuit 202, local oscillation circuit 203, tuning circuit 204, intermediate frequency amplification circuit 205, A
It is configured to include an M detection circuit 206, a low-frequency amplification circuit 207, and a speaker 208.

The radio receiver shown in FIG. 1 has an antenna 3, a clock generation circuit 4, a sampling tuning circuit 5,
And a tuning oscillation circuit 6, which are used in both the FM receiver 1 and the AM receiver 2.

Next, the configurations and operations of the FM receiver 1 and the AM receiver 2 will be described in detail.

(1) Configuration and Operation of FM Receiving Unit The high-frequency amplifier circuit 101 of the FM receiving unit 1 selectively amplifies a broadcast wave of a specific band among broadcast waves received by the antenna 3. The mixing circuit 102, the local oscillation circuit 103, and the tuning circuit 104 constitute a frequency converter. The carrier signal of the frequency fc output from the high-frequency amplification circuit 101 and the local oscillation of the frequency fL output from the local oscillation circuit 103. The signal is mixed with the signal, frequency conversion is performed without changing the modulation content, and an intermediate frequency signal of fL-fc is output. When receiving an FM broadcast, the frequency of the intermediate frequency signal is, for example, 1
It is set to 0.7 MHz. This frequency is always fixed when receiving FM broadcasts.

FIG. 2 shows the local oscillation circuit 103 and the tuning circuit 1.
FIG. 4 is a block diagram illustrating a detailed configuration of an electronic tuning unit using a PLL frequency synthesizer.
The reference oscillation signal output from the reference oscillator 301 is frequency-divided by, for example, 4 by the prescaler 302, and the local oscillation circuit 103
Is input to the phase comparator 303 in the above. A local oscillation signal output from a voltage controlled oscillation circuit (VCO) 304 in the local oscillation circuit 103 is input to a prescaler 305 and, for example, frequency-divided by four.
At 06, the frequency is divided by the frequency division ratio according to the selected frequency and input to the phase comparator 303. The phase comparator 303 calculates the phase of the output of the prescaler 302 and the programmable counter 30.
6, and a voltage corresponding to the phase difference is input to the voltage-controlled oscillation circuit 304 via the low-pass filter 307.

As described above, the local oscillation signal output from the voltage controlled oscillation circuit 304 is controlled so as to be synchronized with the reference oscillation signal. In addition, the control circuit 308 sets the frequency division ratio in the programmable counter 306 and causes the display unit 309 to display various information such as a tuning frequency.

The output of the mixing circuit 102 shown in FIG. 1 is input to a switch SW1. The switch SW1 is set to the contact p side when receiving FM broadcast, and is set to the contact q side when receiving AM broadcast. Therefore, when receiving the FM broadcast, the output of the mixing circuit 102 is
Is input to The sampling tuning circuit 5 includes the mixing circuit 1
02, only the intermediate frequency component is extracted from the output of F.02.

FIG. 3 is a circuit diagram showing a detailed configuration of the sampling tuning circuit 5. As shown in FIG. As shown in the figure, the sampling tuning circuit 5 includes a ring counter 40 having 16 outputs.
1 and the MO connected to each output of the ring counter 401
S transistor 402 and each MOS transistor 402
, And a resistor 404 and a capacitor 405 connected in parallel.

FIG. 4 is a waveform diagram showing a change in the output of the ring counter 401. As shown in the figure, the ring counter 401 outputs a pulse once every 16 periods of the reference clock output from the clock generation circuit 4 in FIG. More specifically, the ring counter 401 outputs a pulse having a period 16 times the reference clock from each output terminal. Also, the phase of the pulse output from each output terminal is shifted by one reference clock.

Each output of the ring counter 401 is input to the gate terminal of the corresponding MOS transistor 402, as shown in FIG. Since the phases of the pulses output from the respective output terminals of the ring counter 401 are shifted from each other, the timing at which the MOS transistor 402 is turned on is also different, and the capacitor 403 connected to the MOS transistor 402 turns on the MOS transistor 402. -Repeat charge / discharge according to turning off.

For example, when a signal Vin having the same frequency as the signal obtained by dividing the reference clock by 16 is input to the sampling tuning circuit 5, the voltage at the point a in FIG. 3 changes stepwise as shown in FIG. . On the other hand, when a signal having a frequency different from that of the signal obtained by dividing the reference clock by 16 is input to the sampling tuning circuit 5, the voltage at the point a in FIG. It converges to zero potential. Thus, by configuring the sampling tuning circuit as shown in FIG. 3, it is possible to extract only the frequency component equal to the output frequency of the ring counter 401, that is, 1/16 of the reference clock.

Since the line at point a in FIG. 3 has a high impedance, if it is directly connected to a subsequent circuit having a low input impedance, the output waveform cannot be taken out as it is. Therefore, the line at point a is changed to F as shown in FIG.
It is desirable that the signal be received once by the ET 406 and the source terminal of the FET 406 be connected to a subsequent circuit. Note that the capacitor 407 in FIG. 3 is for cutting the DC component included in the output Vin of the mixing circuit 102,
08 and 409 are for giving an appropriate bias to the FET 406.

As described above, the sampling tuning circuit 5
Since it is composed only of components that are easily converted to semiconductors, such as the ring counter 401 and the MOS transistor 402, the whole circuit can be easily formed into a chip. FIG.
In this circuit, the tuning accuracy can be easily increased by increasing the number of outputs of the ring counter 401 and increasing the number of samplings in one cycle. Conversely, when high-precision tuning is not required, the number of samples in one cycle may be reduced, and the circuit scale can be reduced by reducing the number of samples.

The sampling tuning circuit 5 shown in FIG.
Since tuning is performed digitally, tuning can always be performed with stable accuracy without being affected by the temperature characteristics and the like of the components. Further, since there is no amplifier circuit, there is no possibility of oscillation.

The reference clock input to the sampling tuning circuit 5 is generated by the clock generating circuit 4 shown in FIG. The clock generation circuit 4 includes a voltage-controlled oscillation circuit (VC
O) 451 and a programmable counter (PC) 452
, A reference oscillator 453, a phase comparator 454, and a low-pass filter (LPF) 455. The voltage control oscillation circuit 451 outputs a reference clock,
The programmable counter 452 divides the frequency of the reference clock by a preset division ratio. The phase comparator 454 outputs the output of the programmable counter 452 and the reference oscillator 453
, And a voltage corresponding to the phase difference is input to the voltage-controlled oscillation circuit 451 via the low-pass filter 455. The voltage-controlled oscillation circuit 451 changes the frequency of the reference clock according to the output voltage of the low-pass filter 455, and controls the reference clock so that it is synchronized with the reference oscillation signal.

As described above, the programmable counter 45
By combining the clock generation circuit 4 and the sampling tuning circuit 5 which can arbitrarily set the dividing ratio of 2, the tuning frequency can be easily changed and the desired tuning frequency can be set accurately. it can. Q of the sampling tuning circuit 5 shown in FIG.
(C is the capacitance of the capacitor 403, R is the resistance value of the resistor 404, and N is the number of samplings). Since Q increases as the frequency of the reference clock increases, the bandwidth Δf is changed even if the tuning frequency is changed. = F / Q can always be constant,
Tuning can be performed with the same accuracy over a wide range of frequencies.

10. After passing through the sampling tuning circuit 5
As shown in FIG. 1, the 7 MHz intermediate frequency signal is amplified by the intermediate frequency
Is input to The FM detection circuit 106 converts the intermediate frequency signal into a stereo composite signal before modulation. This stereo composite signal is obtained by synthesizing an L signal component, an R signal component, and a 19 kHz pilot signal. This stereo composite signal is input to a stereo demodulation circuit 107 and separated and reproduced into an L signal and an R signal.

FIG. 5 is a block diagram showing a detailed configuration of the stereo demodulation circuit 107. As shown in the figure, the stereo demodulation circuit 107 includes a preamplifier 501 and a phase comparator 5
02, a low-pass filter 503, and a DC amplifier 504
, Frequency dividers 505-508, and switching circuit 509
The output of the DC amplifier 504 is input to the tuning oscillation circuit 6. The tuning oscillation circuit 6 oscillates at a predetermined frequency, for example, 456 kHz, as described later, and its oscillation output is input to the frequency divider 505. The frequency dividers 505 to 507 divide the output of the tuning oscillation circuit 6 by 38
kHz sine wave signal, and the frequency divider 508 has two more
The frequency is divided to generate a 19 kHz sine wave signal. Phase comparator 502 compares the phase of the pilot signal included in the stereo composite signal with the output of frequency divider 508, and outputs a voltage according to the phase difference. This output is a low-pass filter 503
Is input to the DC amplifier 504 via the.

FIG. 6 is an example of a signal waveform diagram of each part in the stereo demodulation circuit 107, and FIG.
6 (b) is the waveform of the output of the frequency divider 507, and FIG. 6 (c) is the frequency of the frequency divider 507.
FIG. 6D shows the waveform of the signal obtained by shifting the phase of the output of FIG.
6E shows the waveform of the L signal output from the switching circuit 509, and FIG. 6E shows the waveform of the R signal output from the switching circuit 509.

As shown in FIG. 6A, the stereo composite signal input to the stereo demodulation circuit 107 is composed of an L signal and an R signal.
The signal is modulated by a 38 kHz subcarrier. For this reason, the frequency dividers 505 to 505 inside the stereo demodulation circuit 107
By generating a switching signal of 38 kHz at 507 and taking in the stereo composite signal in synchronization with the generated switching signal, an L signal and an R signal can be extracted as shown in FIGS. FIG.
In (d) and (e), the L signal is represented by a sine wave and the R signal is represented by a rectangular wave for simplicity of description.

FIG. 7 is a principle diagram for explaining the operation principle of a GIC (Generalized Inpedance Converter) included in the tuning oscillation circuit 6 shown in FIG. As shown in the figure,
The GIC 600 has two operational amplifiers 601 and 602
And five impedances Z1 to Z5, and the impedance Z between 1-1 'shown in the figure is expressed by equation (1).

Z = (Z 1 · Z 3 · Z 5) / (Z 2 · Z 4) (1) A capacitor is connected to one of the impedances Z 2 and Z 4.
By allocating resistors to other impedances, the circuit of FIG. 7 equivalently exhibits the same properties as inductance.

FIG. 8 is a circuit diagram showing a detailed configuration of the tuning oscillation circuit 6 of FIG. 1, and FIG. 9 is an equivalent circuit diagram of FIG. As shown in FIG. 8, an FET 606 is connected between the resistors 605 and 607. By controlling the gate voltage of the FET 606, the resistance value between the drain and source of the FET 606 is variably controlled. The switch SW2 shown in FIG. 1 is connected to the gate terminal of the FET 606. This switch SW2 is a contact r when receiving FM broadcast.
, And when receiving AM broadcast, the contact s is set. The line on the contact r side is connected to a DC amplifier 504 inside the stereo demodulation circuit 107 as shown in FIG.
The oscillation frequency is variably controlled according to the output of the amplifier 504.

The capacitor 6 is connected in parallel with the GIC 600.
08 is connected to form an equivalent parallel resonance circuit. Further, one end of the GIC 600 and one end of the capacitor 608 are connected to an input resistor 610 via an FET 609. A switch SW3 is connected to the gate terminal of the FET 609. The switch SW3 is set to the contact t when receiving FM broadcasting, and is set to the contact u when receiving AM broadcasting.

As the FET 609, for example, an n-channel
When an enhancement type MOSFET is used,
When the gate terminal is set to the low level, the FET 609 is cut off, and the resistance value of the input resistor 610 of the tuning oscillation circuit 6 shown in FIG. 8 becomes apparently infinite.

The Q of the tuning oscillation circuit 6 shown in FIG.
Is represented by equation (2).

Q = R / (ωL) (2) where R is the resistance value of the input resistor 610 and L is the GIC 60
0 indicates an inductance. If the tuning oscillation circuit 6 is to be oscillated, it is necessary to set Q shown in the equation (2) to a predetermined value or more. Therefore, when the switch SW3 shown in FIG. 8 is set to the contact t side to make the resistance value of the input resistor 610 infinity, Q also becomes infinity, and the tuning oscillation circuit 6 oscillates stably. Therefore, in this state, F
By controlling the gate voltage of the ET 606, the tuning oscillation circuit 6 functions as a voltage controlled oscillation circuit when receiving FM broadcast.

In the tuning oscillation circuit 5 shown in FIG.
By turning on / off the ET 609, the input resistance 61
Although the resistance value of 0 is apparently changed, FET609
, A resistance value may be adjusted by using a variable resistor as the input resistor 610.

The output Vout of the tuning oscillation circuit 6 includes:
As shown in FIG. 1, a switch SW4 is connected, and the switch SW4 is set to the contact v side when receiving the FM broadcast. Therefore, the output of the tuning oscillation circuit 6 is the switch SW
The stereo demodulation circuit 10 shown in FIG.
7 is input to a frequency dividing circuit 505 inside.

The L signal and the R signal separated and reproduced by the stereo demodulation circuit 107 are separately input to de-emphasis circuits 108L and 108R as shown in FIG. 1 to attenuate a high frequency portion to improve the SN ratio. After that, the speaker 110 passes through the low-frequency amplifier circuits 109L and 109R.
L and 110R.

(2) Configuration and Operation of AM Receiver When receiving an AM broadcast, the switch SW shown in FIG.
1 is set on the contact q side. Therefore, the received signal received by the antenna 3 is input to the sampling tuning circuit 5 via the switch SW1. As described above, the sampling tuning circuit 5 extracts only the same frequency component as the reference clock from the received signal. In the case of receiving FM broadcasting, the frequency of the reference clock output from the clock generation circuit 4 is always set to a fixed value. Needs to be changed. More specifically, AM
At the time of reception, the frequency of the reference clock is set to a frequency that is 16 times the frequency at which tuning is desired (when the sampling number N is “16”).

The output of the sampling tuning circuit 5 is input to a frequency converter comprising a mixing circuit 202, a local oscillation circuit 203 and a tuning circuit 204, and is converted into an intermediate frequency signal of, for example, 450 kHz. The local oscillation circuit 203
A process for synchronizing a local oscillation signal output from a voltage-controlled oscillation circuit (VCO) (not shown) with a reference oscillation signal output from a reference oscillator (not shown), which is configured similarly to the local oscillation circuit 103 of the M receiving unit 1 I do. Tuning circuit 204
Is the frequency range of AM broadcast (for example, 530 to 1700k
(Hz).

The tuning frequency of the sampling tuning circuit 5 and the oscillation frequency of the local oscillation signal change in conjunction with each other.
For example, when receiving a broadcast wave having a frequency f, the tuning frequency of the sampling tuning circuit 5 is set to f, and the oscillation frequency of the local oscillation signal is set to, for example, f + 450 kHz.

The intermediate frequency signal output from the mixing circuit 202 is input to the tuning oscillation circuit 6 shown in detail in FIG.
When an AM broadcast is received, the switch SW3 shown in FIG. 8 is set to the contact u side to turn on the FET 609, and the mixing circuit 2
02 is applied to one end of a resistor 603 via an input resistor 610. The switch SW2 is set on the contact s side, and a voltage determined by the voltage division ratio of the resistors 7 and 8 is applied to the gate terminal of the FET 606. Therefore, by adjusting the voltage division ratio of the resistors 7 and 8 in advance, the tuning oscillation circuit 6 shown in FIG. 8 extracts only the 450 kHz intermediate frequency signal from the signal input via the FET 609. Perform the operation.

When an AM broadcast is received, the switch SW4 shown in FIG.
Is input to the intermediate frequency amplifying circuit 205 via the contact w of the switch SW4, the gain is adjusted, and then input to the AM detection circuit 206. AM detection circuit 2
06 converts an intermediate frequency signal into a low frequency signal using a diode or the like, and converts the converted low frequency signal into a low frequency amplifier circuit 20.
The audio is amplified by the speaker 7 and output from the speaker 208.

As described above, in the present embodiment, the selective tuning of the AM broadcast wave is performed by using the sampling tuning circuit 5, and the tuning using the LC resonance circuit as in the related art is not performed. Not be affected by Therefore, a rod antenna such as a car radio can be directly connected to the sampling tuning circuit 5, and unnecessary interfering radio waves may be mixed into a circuit on the subsequent stage such as the frequency converter and the intermediate frequency amplifier circuit 205. Disappears. Also, when receiving an AM broadcast, the tuning frequency of the sampling tuning circuit 5, that is, the frequency of the reference clock, and the frequency of the local oscillation signal output from the local oscillation circuit 203 are interlocked and changed by PLL control. The frequency of the intermediate frequency signal output from the mixing circuit 202 can always be kept constant. Therefore, the tracking error, which has conventionally been a problem, does not occur.

In this embodiment, the sampling tuning circuit 5 is used as an intermediate frequency filter when receiving FM broadcasting, and is used as a first-stage selective tuning circuit when receiving AM broadcasting. There is no need to provide them separately. Similarly, the tuning oscillation circuit 6 is used as a voltage demodulation oscillation circuit for stereo demodulation when receiving FM broadcasting, and is used as an intermediate frequency filter when receiving AM broadcasting. Therefore, a voltage control oscillation circuit and an intermediate frequency filter are separately provided. This eliminates the necessity, so that the number of components can be reduced and the size of the receiver can be reduced.

In the above-described embodiment, the configuration of the AM / FM dual-purpose radio receiver has been described.
Alternatively, the present invention can be applied to the case of an FM dedicated radio receiver. For example, in the case of an AM-only radio receiver, the FM receiver 1 shown in FIG. 1 may be omitted, and one end of the resistor 10 and the capacitor 11 connected in parallel in FIG. On the other hand, in the case of the FM dedicated radio receiver, the AM receiver 2 shown in FIG. 1 may be omitted, and the output of the mixing circuit 102 in FIG. Also, at the time of FM reception, since the frequency of the reference clock output from the clock generation circuit 4 is always constant, instead of the programmable counter 452,
A frequency divider having a fixed frequency division ratio may be used.

Further, in the above-described embodiment, an example of the radio receiver of the superheterodyne system has been described. However, the present invention can be applied to radio receivers other than the superheterodyne system. For example, the FM broadcast wave received by the antenna 3 is input to the sampling tuning circuit 5 without converting it into an intermediate frequency signal, and a selective tuning process is performed.
After performing the detection processing based on the output of the sampling tuning circuit 5, when the stereo demodulated signal obtained by the detection is separated and reproduced into the L signal and the R signal, the tuning oscillation circuit 6 shown in FIG. Is also good. Alternatively, A received by antenna 3
After selecting and tuning the M broadcast wave by the sampling tuning circuit 5,
The signal may be inputted to the tuning oscillation circuit 6 shown in FIG. 1 without being converted into an intermediate frequency signal.

In the sampling tuning circuit 5 shown in FIG. 3, instead of the MOS transistor 402, as shown in FIG.
May be used. CMOS transistor 402 '
Is less likely to be affected by the parasitic capacitance.
Further, all elements constituting the sampling tuning circuit 5 are CM
Since it can be formed by the OS process, the process for forming a chip can be simplified.

[0054]

As described above in detail, according to the present invention, a received signal received by an antenna is sampled by a reference clock and only the same frequency component as the reference clock is extracted from the received signal. As described above, a tuning circuit can be configured without using an LC resonance circuit. Therefore, the antenna can be directly connected to the tuning circuit and tuned to a desired frequency without being affected by the antenna capacity. In addition, since the digital tuning process is performed, there is no influence from the temperature characteristics of the components. further,
Since the tuning frequency can be changed only by changing the frequency of the reference clock, and the Q changes according to the tuning frequency, tuning can be performed with the same accuracy over a wide band.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of a radio receiver.

FIG. 2 is a block diagram showing a detailed configuration of a local oscillation circuit and a tuning circuit.

FIG. 3 is a circuit diagram showing a detailed configuration of an intermediate frequency filter.

FIG. 4 is a waveform diagram showing a change in output of a ring counter.

FIG. 5 is a block diagram illustrating a detailed configuration of a stereo demodulation circuit.

FIGS. 6 (a) to 6 (e) are signal waveform diagrams of respective sections in a stereo demodulation circuit.

FIG. 7 is a principle diagram illustrating an operation principle of a GIC included in a tuning oscillation circuit.

FIG. 8 is a circuit diagram showing a detailed configuration of a tuning oscillation circuit.

9 is an equivalent circuit diagram of FIG.

FIG. 10 shows C used inside a sampling tuning circuit.
FIG. 4 is a diagram illustrating an example of a MOS transistor.

[Explanation of symbols]

 Reference Signs List 1 FM receiving unit 2 AM receiving unit 3 Antenna 4 Clock generation circuit 5 Sampling tuning circuit 6 Tuning oscillation circuit 101 High frequency amplification circuit 102 Mixing circuit 103 Local oscillation circuit 104 Tuning circuit 105 Intermediate frequency amplification circuit 106 FM detection circuit 107 Stereo demodulation circuit 108L, 108R De-emphasis circuit 109L, 109R Low frequency amplifier circuit 110L, 110R Speaker 201 Tuning circuit 202 Mixing circuit 203 Local oscillator circuit 204 Tuning circuit 205 Intermediate frequency amplifier circuit 206 AM detection circuit 207 Low frequency amplifier circuit 208 Speaker

Claims (6)

[Claims] 1. A radio receiver for performing a detection process by extracting only a frequency component desired to be tuned from a received signal received by an antenna, comprising: A pulse generation circuit that outputs a plurality of shifted pulse signals; and a frequency component equal to the pulse signal from the reception signal based on a result of sampling the reception signal with the pulse signal output from the pulse generation circuit. A sampling tuning circuit for extracting only the signal, and performing a detection process based on an output of the sampling tuning circuit. 2. The charge pump according to claim 1, wherein the sampling tuning circuit is provided in correspondence with each pulse signal output from the pulse generation circuit and synchronizes with each pulse signal according to a signal level of the reception signal. A radio receiver comprising a plurality of capacitors for accumulating a signal. 3. The sampling tuning circuit according to claim 1, wherein:
A radio receiver which extracts only a frequency component desired to be tuned from the received signal. 4. The F according to claim 1, wherein the received signal is converted into a low frequency FM intermediate frequency signal.
An FM detector for performing detection processing on the FM intermediate frequency signal, wherein the sampling tuning circuit extracts only a predetermined intermediate frequency component from the output of the FM front end. A radio receiver for supplying the signal to the FM detector. 5. The sampling tuning circuit according to claim 4, wherein an output of the FM front end section is guided to the sampling tuning circuit when receiving FM broadcasting, and the sampling tuning is performed without selectively tuning or frequency converting the received signal when receiving AM broadcasting. A reception switching means for guiding to a circuit; a reference clock for outputting the reference clock having a predetermined constant frequency when receiving FM broadcasting, and outputting the reference clock having a frequency corresponding to a frequency desired to be selected when receiving AM broadcasting. A radio receiver comprising: a generation circuit. 6. The local oscillation circuit according to claim 1, which outputs a local oscillation signal having a frequency corresponding to a frequency desired to be tuned when receiving an AM broadcast. A frequency converter for converting the output of the sampling tuning circuit to a low-frequency AM intermediate frequency based on the local oscillation signal, and interlocking the frequency of the reference clock with the frequency of the local oscillation signal when receiving an AM broadcast A radio receiver characterized in that it is changed by changing.