KR20010022059A - Radio receiver - Google Patents

Abstract

The purpose of the present invention is to reduce the number of externally attached components when the circuit of the radio receiver is integrated on a semiconductor substrate and to reduce component costs. The radio receiver 100 includes an antenna 19, an FM tuner unit 1, an FM PLL circuit 2, an FM detection circuit 3, an FM stereo demodulation circuit 4, and a low frequency wave in order to receive an FM broadcast. Amplifying circuits 101 and 102 and speakers 103 and 104 are provided. In addition, the radio receiver 100 includes an antenna 59, an AM tuner unit 5, an AM PLL circuit 6, an AM detector circuit 7, a low frequency amplifier circuit 105, in order to receive AM broadcasts. A speaker 106 is provided. The FM PLL circuit 2 and the AM PLL circuit 6 output a local oscillation signal based on a reference signal synchronized with a pilot signal output from the FM stereo demodulation circuit 4.

Description

Radio receiver {RADIO RECEIVER}

The reception method of the radio receiver currently commercially available is the super heterodyne system. The super heterodyne system extracts only this broadcast wave signal by frequency converting the frequency of the broadcast wave desired to be received into the center frequency of the band pass filter without changing the center frequency and band characteristics of the band pass filter. The frequency conversion is performed by mixing the received signal with high frequency amplification and the local oscillation signal according to the tuning instruction. If the frequency of this local oscillation signal is not correct, the frequency of the frequency converted signal deviates from the center frequency of the band pass filter. Therefore, the local oscillation signal is required to have high accuracy and low frequency variation. In recent years, an electronic tuning circuit of a PLL frequency synthesizing method, which can be easily controlled by a microcomputer, has been used as a circuit for generating this local oscillation signal. As the oscillator used in this circuit, a crystal oscillator with high precision and low frequency fluctuation is generally used.

In addition, many radio receivers currently on the market can receive FM stereo broadcasting. When FM stereo broadcasting is received, a stereo composite signal is obtained as an output after FM detection, and the left audio signal (L signal) and the right audio signal (R signal) are demodulated from this composite signal in the stereo demodulation circuit.

The demodulation process in the stereo demodulation circuit is performed by extracting the L and R signals included in the stereo composite signal based on the gate pulse signal generated in synchronization with the pilot signal included in the stereo composite signal. In this stereo demodulation circuit, for example, a ceramic vibrator is known to obtain stable demodulation characteristics.

By the way, since the crystal vibrator and the ceramic vibrator used for the above-mentioned electronic tuning circuit and stereo demodulation circuit utilize the characteristic of the material, they cannot be integrated and formed on a semiconductor substrate. As a result, the number of externally attached components that cannot be formed on a semiconductor substrate increases when attempting to integrate the entire radio receiver.

As described above, since the local oscillation signal output from the PLL frequency synthesizing type electronic tuning circuit is required to have high precision and low frequency oscillation, the crystal oscillator used to generate the local oscillation signal has high frequency accuracy. Only the higher ones need to be selected and used, which hinders the reduction of component cost.

The present invention relates to a radio receiver having an electronic tuning system and an FM stereo demodulation circuit.

1 is a view showing the overall configuration of a radio receiver of an embodiment to which the present invention is applied.

2 shows a detailed configuration of an FM stereo demodulation circuit.

3 is a signal waveform diagram for explaining the operation of the stereo separation circuit.

4 is a diagram showing a detailed configuration of an FM PLL circuit.

The present invention has been made in view of such a point, and its object is that when the circuit of the radio receiver is integrated and formed on a semiconductor substrate, the number of externally attached components can be reduced, and the component cost can be reduced. To provide a radio receiver.

In the radio receiver of the present invention, the first oscillator causes the oscillation operation to synchronize with the pilot signal included in the FM stereo composite signal, and based on the oscillation signal output from the first oscillator, FM reception is performed. The second oscillator causes the oscillation operation to output a local oscillation signal necessary for frequency conversion of the signal. Therefore, when a local oscillation signal with high precision and low frequency variation required for frequency conversion of an FM received signal is to be generated by a phase locked loop (PLL) circuit, a pilot necessary for demodulating the FM stereo composite signal is required. Since the predetermined signal synchronized with the signal is generated by the first oscillator and the divided signal of the oscillation signal output from the first oscillator can be used as the reference frequency signal of the above-described PLL circuit, a reference frequency signal is generated. It is not necessary to have a dedicated oscillator necessary for this purpose, and the number of parts can be reduced. In particular, when considering a circuit formed of a radio receiver integrated on a semiconductor substrate, the number of externally attached components such as a crystal oscillator used in an oscillator can be reduced.

By constructing the first PLL circuit as a voltage controlled oscillator using the first oscillator as a crystal oscillator, it is possible to generate a gate pulse signal synchronized with only the pilot signal accurately and to realize a demodulation process of stereo audio without being affected by noise. Can be. In addition, since the oscillation signal output from such a first oscillator has high accuracy and little frequency fluctuation, the signal divided by this oscillation signal can be used as a reference frequency signal necessary for generating a local oscillation signal. In addition, the oscillation signal output from the first oscillator is controlled to synchronize with the pilot signal, and since the crystal oscillator used for this does not need to be selected and used only in particular with high frequency accuracy, Part cost can be reduced.

In addition, a second PLL circuit is configured by including a first divider whose frequency division ratio can be changed and the second oscillator described above, and the oscillation signal output from the first oscillator is divided as a reference frequency signal of the second PLL circuit. By using one signal, a local oscillation signal with high precision and low frequency variation, which is synchronized with the pilot signal included in the FM stereo composite signal, can be easily generated by the second oscillator, and further, the division of the first divider. By changing the ratio, the frequency of the FM received signal can be arbitrarily changed.

In particular, it is preferable to set the oscillation frequency of the first oscillator based on the frequency of the pilot signal and the frequency of the local oscillation signal output from the second oscillator. Specifically, the frequency of the signal obtained by dividing the oscillation signal output from the first oscillator at the first division ratio is equal to the frequency of the pilot signal, and the signal of the oscillation signal output from the first oscillator is divided at the second division ratio. The oscillation frequency of the first oscillator is set so that the frequency coincides with a value obtained by dividing the frequency of the frequency allocation interval of the FM broadcast by a predetermined predetermined integer value. Alternatively, the oscillation frequency of the first oscillator is set to an integer multiple of the least common multiple of the frequency of the pilot signal and the frequency of the FM broadcast frequency allocation interval. By setting the oscillation frequency of the first oscillator in this manner, a signal divided by the signal output from the first oscillator can be used as a reference frequency signal, and a local oscillation signal necessary for frequency conversion of the FM received signal based on this reference frequency signal. May be output from the second oscillator.

The radio receiver described above has been conceived in the case of receiving an FM broadcast, but may be configured to receive both an FM broadcast and an AM broadcast. In such a radio receiver, the oscillation operation is performed on the third oscillator so that a local oscillation signal necessary for frequency conversion of the AM reception signal is output based on the oscillation signal output from the first oscillator. Therefore, as in the case of receiving only the FM broadcast, a signal divided by the oscillation signal output from the first oscillator can be used as a reference frequency signal, and therefore, a dedicated oscillator necessary for generating an AM broadcast reference frequency signal is required. And the number of parts can be reduced.

In addition, a third PLL circuit for AM broadcasting is included, including a second divider whose frequency division ratio can be changed, and the third oscillator described above, and an oscillation signal output from the first oscillator as a reference frequency signal of the third PLL circuit. By using the divided signal, the third oscillator can easily generate an AM broadcasting local oscillation signal having high accuracy and low frequency variation synchronized with the pilot signal included in the FM composite signal. By changing the division ratio of, the frequency of the AM received signal can be arbitrarily changed.

In particular, in a radio receiver capable of receiving FM broadcast and AM broadcast, the oscillation frequency of the first oscillator is set based on the frequency of the pilot signal and the frequency of each local oscillation signal output from the second and third oscillators. It is preferable. Specifically, the frequency of the signal obtained by dividing the oscillation signal output from the first oscillator at the first division ratio matches the frequency of the pilot signal, and the frequency of the signal which divides the oscillation signal output from the first oscillator at the second division ratio is The frequency of the frequency allocation interval of the FM broadcast is divided by a predetermined integer value, and the frequency of the signal obtained by dividing the oscillation signal output from the first oscillator by the third division ratio is the frequency of the frequency allocation interval of the AM broadcast. The oscillation frequency of the first oscillator is set to match the division by the integer value. Alternatively, the oscillation frequency of the first oscillator is set to an integer value of the least common multiple of the frequency of the pilot signal, the frequency of the frequency allocation interval of FM broadcasting, and the frequency of the frequency allocation interval of AM broadcasting. By setting the oscillation frequency of the first oscillator in this manner, a signal obtained by dividing the signal output from the first oscillator can be used as a reference frequency signal of the second and third PLL circuits, and based on this reference frequency signal, AM reception is performed. A local oscillation signal necessary for frequency conversion of the signal and the FM reception signal can be output from the second oscillator and the third oscillator, respectively.

The radio receiver of the present invention generates a gate pulse signal necessary for stereo demodulation processing by performing an oscillation operation synchronized with a pilot signal included in the FM stereo composite signal, and based on the oscillation signal obtained by this oscillation operation. It generates a reference frequency signal necessary for the PLL circuit outputting the local oscillation signal. EMBODIMENT OF THE INVENTION Hereinafter, the radio receiver of one Embodiment which applied this invention is demonstrated concretely, referring drawings.

(1) the overall configuration of the radio receiver

FIG. 1 is a diagram showing the overall configuration of a radio receiver according to an embodiment, in which a configuration capable of receiving both an FM broadcast and an AM broadcast is shown. The radio receiver 100 shown in the figure includes an FM tuner unit 1 and an FM tuner unit 1 as front ends that perform frequency conversion on the FM signal received through the antenna 19 to receive an FM broadcast. FM PLL circuit (2) for generating a local oscillation signal used for frequency conversion of a signal, FM detector circuit (3) for detecting a signal output from the FM tuner section (1), and outputting an FM stereo composite signal, and an FM stereo composite signal And an FM stereo demodulation circuit 4 for demodulating the L and R signals, a low frequency amplifier circuit 101 and 102 and a speaker 103 and 104 for amplifying each of the L and R signals as audio.

In addition, the radio receiver 100 converts the frequency of the AM tuner unit 5 and the AM tuner unit 5 as a front end for performing frequency conversion on the AM signal received through the antenna 59 in order to receive the AM broadcast. AM PLL circuit 6 for generating a local oscillation signal for use, AM detector circuit 7 for detecting the signal output from the AM tuner section 5, and outputting an AM audio signal, and amplifying the AM audio signal as voice. A low frequency amplifying circuit 105 and a speaker 106 for outputting are provided.

In addition, the radio receiver 100 inputs three frequency dividers 22 for inputting a reference frequency signal and a predetermined tuning instruction to the FM PLL circuit 2 and the AM PLL circuit 6 described above for PLL operation. And 23, 24, tuning control unit 9, and operation unit 10 are configured.

(2) the operation of the radio receiver

In the radio receiver 100 having the above-described configuration, an operation when receiving an FM broadcast and an AM broadcast will be described. First, an operation in the case of receiving an FM broadcast will be described.

The FM signal received through the antenna 19 is converted into an FM intermediate frequency signal by the FM tuner unit 1. As shown in FIG. 1, the FM tuner unit 1 includes a high frequency amplifier circuit 11, a mixing circuit 13, a band pass filter 15, and an intermediate frequency amplifier circuit 17. The high frequency amplifying circuit 11 outputs a signal obtained by amplifying the FM signal input through the antenna 19. The mixing circuit 13 mixes the signal output from the high frequency amplifying circuit 11 and the local oscillation signal output from the FM PLL circuit 2 and outputs a difference value signal of these two signals. The detailed configuration and operation of the FM PLL circuit 2 will be described later.

The band pass filter 15 has a predetermined passband, and extracts and outputs only a component near a predetermined frequency (for example, 10.7 MHz) from the signal output from the mixing circuit 13. The intermediate frequency amplifier circuit 17 outputs an FM intermediate frequency signal obtained by amplifying the signal output from the band pass filter 15.

The FM intermediate frequency signal is FM detected by the FM detection circuit 3 and demodulated into an FM stereo composite signal. The FM stereo composite signal includes a main channel signal of an L signal + R signal, a subchannel signal in which a carrier suppression AM modulates a 38 kHz subcarrier with an L signal-R signal, and a pilot signal of 19 kHz. The orthogonal detection method is used for the FM detection circuit 3, for example.

The FM stereo demodulation circuit 4 demodulates and outputs the L and R signals from the FM stereo composite signal. The L signal and the R signal are amplified by the low frequency amplifier circuits 101 and 102, respectively, and output from the speakers 103 and 104. The detailed configuration and operation of the FM stereo demodulation circuit 4 will be described later.

Next, the reception operation in the case of receiving AM broadcast will be described. The AM signal received through the antenna 59 is converted into an AM intermediate frequency signal by the AM tuner unit 5. The AM tuner section 5 is provided with a high frequency amplifier circuit 51, a mixing circuit 53, a band pass filter 55 and an intermediate frequency amplifier circuit 57 as shown in FIG. The AM tuner unit 5 outputs an AM intermediate frequency signal in the same manner as the FM tuner unit 1 described above. The AM intermediate frequency signal is AM detected by the AM detection circuit 7 and demodulated into an AM audio signal. As the AM detection circuit 7, an envelope detection method is used, for example. The AM audio signal is amplified by the low frequency amplifier circuit 105 and output from the speaker 106. In addition, although the AM broadcasting speaker 106 is provided separately from the FM broadcasting speakers 103 and 104 for the sake of simplicity, the signal output from the low frequency amplifying circuit 105 at the time of AM broadcasting reception is output to the speaker 103 ,. The speaker 106 may be omitted by inputting to 104.

(3) Configuration and operation of FM stereo demodulation circuit

Next, the detailed configuration and operation of the above-described FM stereo demodulation circuit 4 will be described. 2 is a diagram illustrating a detailed configuration of the FM stereo demodulation circuit 4. As shown in the figure, the FM stereo demodulation circuit 4 includes a reference signal generator 41 for generating a predetermined reference signal, and a gate pulse generation circuit for generating a gate pulse signal used for separating the FM stereo composite signal. (42), a pilot signal detection circuit 44 for detecting a pilot signal included in the FM stereo composite signal, and a stereo separation circuit 43 for separating the L and R signals from the FM stereo composite signal.

The reference signal generator 41 is provided with four dividers 81 to 84, a preamplifier 85, a phase comparator 86, a low pass filter (LPF) 87 and a voltage controlled oscillator (VCO) 88. And a predetermined signal is output to the gate pulse generation circuit 42, the pilot signal detection circuit 44, and the divider 24 shown in FIG.

The VCO 88 included in the reference signal generator 41 includes an oscillation circuit 91, a crystal oscillator 92, and a variable capacitor diode 93. The frequency of the oscillation signal output from the oscillation circuit 91 varies depending on the load capacity for the crystal oscillator 92 connected to the oscillation circuit 91. In the present embodiment, the variable capacitance diode 93 corresponds to the load capacitance of the crystal oscillator 92, and the oscillation frequency of the oscillation circuit 91 is varied by changing the reverse bias voltage applied to the variable capacitance diode 93. You can.

The oscillation signal output from this VCO 88 is divided by two dividers 81 and 82 having a predetermined division ratio. For example, the division ratio of the front frequency divider 81 is set to "15", and the division ratio of the rear frequency divider 82 is set to "30", respectively. In addition, the rear frequency divider 82 outputs two divided signals having different phases from each other by 180 degrees, and these two divided signals are input to the gate pulse generation circuit 42. One of the two divided signals output from the divider 82 (the signal shown by a in FIG. 2) is divided once more via the divider 84 and input to the pilot signal detection circuit 44. , The other side (signal shown by b in FIG. 2) is divided once more via the divider 83 and input to the phase comparator 86.

The above-described frequency divider 83 has a predetermined frequency division ratio (for example, "2"), and outputs two frequency division signals (signals shown by c and d in FIG. 2) different in phase from each other, These two divided signals are input to the phase comparator 86. The frequency divider 84 has the same frequency division ratio (for example, "2") as the frequency divider 83, and has two phases different from each other by 90 ° with respect to two frequency divider signals output from the frequency divider 83. A divided signal (signals shown by e and f in Fig. 2) is output, and these two divided signals are input to the pilot signal detection circuit 44.

The phase comparator 86 performs a phase comparison between the pilot signal included in the FM stereo composite signal input through the preamplifier 85 and the divided signal output from the divider 83, and has a duty ratio according to the comparison result. Output the signal.

The PLL circuit of the VCO 88, the dividers 81, 82, and 83, the phase comparator 86, and the low pass filter 87 described above is configured to synchronize with the pilot signal included in the FM stereo composite signal. The oscillation operation of the VCO 88 is controlled so that a reference signal of a predetermined frequency is obtained.

When the frequency division ratios of the dividers 81, 82, and 83 are set to "15", "30", and "2", the oscillation signal output from the VCO 88 is set to 900 (= 15 x 30 x 2). The divided signal is input to the phase comparator 86, and since the oscillation operation of the VCO 88 is controlled so that the frequency of this divided signal is equal to the frequency of the pilot signal (19 kHz), the 19 kHz is output from the VCO 88. A 17.1 MHz reference signal with 900 times is output.

In addition, the phase comparator 86 outputs a signal having a duty ratio of 50% when the signal having the same frequency as the pilot signal and the phase different from 90 ° is output from the divider 83, and outputs from the divider 83. Since the duty ratio of the signal output from the phase comparator 86 deviates from 50% when the phase and frequency of the signal to be out of these predetermined values deviate, the voltage applied to the VCO 88 through the low pass filter 87 changes. The phase and frequency of the signal output from the divider 83 can be matched to the above-described predetermined values.

In the gate pulse generation circuit 42, two divided signals output from the divider 81 and two divided signals output from the divider 82 are input, and two gate pulse signals (synchronized to the pilot signal from these signals) 2 and a signal shown by g and h are outputted to the stereo separation circuit 43. FIG. These two gate pulse signals are set so that their phases are 180 degrees different from each other at the same frequency as the subcarrier 38 kHz of the subchannel signal.

The pilot signal detection circuit 44 receives two divided signals and an FM stereo composite signal output from the divider 84, and detects pilot signals included in the FM stereo composite signal based on these signals. When the pilot signal is detected, a high level signal is output from the pilot signal detection circuit 44, and the light emitting diode 45 is turned on at the same time as the notification to the stereo separation circuit 43.

The stereo separation circuit 43 receives two gate pulse signals output from the gate pulse generation circuit 42, a signal representing the reception state of the stereo broadcast output from the pilot signal detection circuit 44, and an FM stereo composite signal. The L and R signals are extracted from the FM stereo composite signal based on the two gate pulse signals.

3 is a signal waveform diagram for explaining the operation of the stereo separation circuit 43. FIG. 3A shows the waveform of the FM stereo composite signal input to the stereo separation circuit 43, and FIG. 3B shows the waveform of one gate pulse signal output from the gate pulse generation circuit 42. FIG. 3 (c) shows the waveform of the other gate pulse signal output from the gate pulse generation circuit 42, and FIG. 3 (d) shows the waveform of the L signal output from the stereo separation circuit 43. 3E shows waveforms of the R signal output from the stereo separation circuit 43, respectively. In addition, for the sake of simplicity, it is assumed that the L signal has a sinusoidal waveform and the R signal has a square wave waveform.

As shown in FIG. 3A, the stereo composite signal includes an L signal and an R signal. In Fig. 3A, the ". &Quot; mark corresponds to the L signal, and the " x " mark corresponds to the R signal. Based on the two gate pulse signals shown in FIGS. 3B and 3C, the L and R signals shown in FIGS. 3D and 3E are extracted.

For example, the stereo separation circuit 43 has two switches (not shown) in which an on / off state is switched in association with each of the two gate pulse signals, and one side at a timing at which one gate pulse signal is input. The L signal can be taken out from the FM stereo composite signal by turning on the switch, and the R signal can be taken out from the FM stereo composite signal by turning on the other switch at the timing at which the other gate pulse signal is input.

As described above, in the reference signal generator 41, by configuring the PLL circuit including the VCO 88 using the crystal oscillator 92, the gate pulse signal synchronized with the pilot signal can be generated accurately. In particular, the VCO 88 using the crystal oscillator 92 has a narrow frequency range, so that even when the pilot signal included in the FM stereo composite signal is weak or the noise contained in the FM stereo composite signal is large, The oscillation operation synchronized with the pilot signal can be performed accurately, and the demodulation processing of the stereo audio can be realized without being affected by noise or the like.

In addition, since the reference signal output from the VCO 88 is controlled to be synchronized with the pilot signal, the accuracy is high and the frequency fluctuation is small. For this reason, the signal which divided this reference signal can be used as a reference frequency signal of the FM PLL circuit 2 and the AM PLL circuit 6. As shown in FIG. In addition, since the crystal oscillator 92 used for the VCO 88 does not need to select and use only those with particularly high frequency accuracy, it is possible to reduce component costs by using an inexpensive crystal oscillator.

In addition, the above-described VCO 88 includes, in the first oscillator, a circuit composed of the dividers 81 to 83, the phase comparator 86, the low pass filter 87, and the VCO 88 in a first phase locked loop circuit. Is multiplied by the division ratio of each of the three dividers 81, 82, and 83 and corresponds to the first division ratio.

(4) Configuration and operation of FM PLL circuit

Next, the operation of the above-described FM PLL circuit 2 will be described. The FM PLL circuit 2 shown in Fig. 1 performs a PLL operation using a signal obtained by dividing a reference signal output from the FM stereo composite circuit 4 by two dividers 24 and 22 as a reference frequency signal. By changing the division ratio of the internal variable divider (to be described later) in accordance with the tuning signal output from the tuning control unit 9, a local oscillation signal having a desired frequency is output toward the FM tuner unit 1.

The divider 24 at the front end has a predetermined division ratio (for example, "38"), divides the 17.1 MHz signal output from the FM stereo demodulation circuit 4 by 38, and outputs a signal of 450 kHz. The frequency divider 22 at the rear stage has a predetermined frequency division ratio (for example, " 9 "), and divides the 450 kHz signal output from the front frequency divider 24 once again by 9 to divide the 50 kHz signal. Output A 50 kHz signal output from this divider 22 at the next stage is input to the FM PLL circuit 2 as a reference frequency signal necessary for the PLL operation.

In each of the above-described frequency dividers 24 and 22, the frequency of the reference frequency signal input to the FM PLL circuit 2 from the frequency divider 22 at the rear stage is the frequency of the frequency allocation interval of the FM broadcast. Is set to coincide with a value divided by a predetermined integer value. In the present specification, in the FM broadcast frequency, those having a predetermined frequency interval to which the broadcast frequency is allocated are referred to as "frequency of the frequency allocation interval of FM broadcast", and in the case of FM broadcast in Japan, 100 kHz.

4 is a diagram showing a detailed configuration of the above-described FM PLL circuit 2. As shown in the figure, the FM PLL circuit 2 includes a voltage controlled oscillator (VCO) 21, a low pass filter 29, a phase comparator 25, and a variable divider 27. A local oscillation signal synchronized with the reference frequency signal output from the period 22 is output.

The local oscillation signal output from the VCO 21 is not only output from the FM PLL circuit 2 but also divided by the variable divider 27 and input to the phase comparator 25. The signal input from the variable divider 27 and the reference frequency signal input from the divider 22 shown in FIG. 1 are input to the phase comparator 25, and the VCO 21 is made to reduce the phase difference between these two signals. Oscillation frequency is controlled. Therefore, considering the case where the frequency of the reference frequency signal input to the phase comparator 25 is 50 kHz as described above, the frequency obtained by multiplying the frequency division ratio of the variable frequency divider 27 by this 50 kHz frequency is the oscillation of the VCO 21. Frequency. For example, when the division ratio of the variable frequency divider 27 is "1680", the frequency of the local oscillation signal output from the VCO 21 is set to 84 MHz (= 50 kHz x 1680).

The tuning control unit 9 outputs a tuning signal for setting the division ratio of the variable divider 27 in the FM PLL circuit 2 based on the tuning instruction from the operation unit 10 having various operation keys. .

Incidentally, the AM PLL circuit 6 shown in FIG. 1 also has the same configuration as the FM PLL circuit 2 described above, and provides two dividers 24 and a reference signal output from the FM stereo demodulation circuit 4. A PLL operation is performed by using the signal divided by 23) as a reference frequency signal, and the local oscillation signal having a desired frequency is changed by changing the division ratio of the internal variable frequency divider according to the tuning signal output from the tuning control unit 9. Output toward the tuner part 5.

The rear frequency divider 23 has a predetermined frequency division ratio (for example, "50"), and further divides the 450 kHz signal output from the front frequency divider 24 by 50 to output a 9 kHz signal. A 9 kHz signal output from the subsequent divider 23 is input to the AM PLL circuit 6 as a reference frequency signal necessary for the PLL operation.

Each of the above-described frequency dividers of the two frequency dividers 24 and 23 is characterized in that the frequency of the reference frequency signal inputted from the rear frequency divider 23 to the AM PLL circuit 6 is the frequency of the frequency allocation interval of the AM broadcast. Is set to match a value obtained by dividing by a predetermined integer value. In the present specification, in the AM broadcast, those having a predetermined frequency interval to which a broadcast frequency is allocated are referred to as "frequency of the frequency allocation interval of AM broadcast", which is 9 kHz in Japan.

In the above-described configuration of the radio receiver 100, a value obtained by multiplying the division ratios of each of the two dividers 22 and 24 is obtained by subtracting the respective division ratios of the two dividers 23 and 24 from the second division ratio. The multiplied values correspond to the third division ratios, respectively.

In the configuration of the above-described FM PLL circuit 2, the VCO 21 is used as the second oscillator, the variable divider 27 is used as the first divider, and the VCO 21 and the variable divider 27 are used. , The circuit constituted by the phase comparator 25 and the low pass filter 29 respectively correspond to the second phase locked loop circuit.

Moreover, when the structure of the FM PLL circuit 2 shown in FIG. 4 is set as the structure of the AM PLL circuit 6 as it is, the VCO 21 contained in the AM PLL circuit 6 is a 3rd oscillator. In the second divider, the circuit composed of the VCO 21, the variable divider 27, the phase comparator 25, and the low pass filter 29 is a third phase-locked loop circuit. Corresponds to each.

As described above, in the radio receiver 100 of the present embodiment, a reference frequency signal input to the FM PLL circuit 2 and the AM PLL circuit 6 for generating a local oscillation signal is a reference including a dedicated crystal oscillator. Since the reference signal generated in the FM stereo demodulation circuit 4 is used separately without using the signal output from the oscillator, it is not necessary to separately provide a dedicated reference oscillator, and the number of parts can be reduced. In particular, when the components of the radio receiver 100 are integrated and formed on a semiconductor substrate, it is possible to reduce the number of externally attached components such as a crystal oscillator that cannot be integrated.

In addition, in the above-described FM PLL circuit 2, the reference signal output from the FM stereo demodulation circuit 4 is divided and used as a reference frequency signal, so that the synchronization is synchronized with the pilot signal included in the FM stereo composite signal. It is possible to easily generate a local oscillation signal having a high frequency and low frequency variation, and furthermore, the frequency of the FM reception signal can be arbitrarily changed by changing the division ratio of the variable frequency divider 27. Similarly, in the AM PLL circuit 6, a local oscillation signal with high precision and small frequency variation can be output, and the frequency of the AM reception signal can be arbitrarily changed.

As described above, the frequency of the reference signal output from the FM stereo demodulation circuit 4 is the frequency of the pilot signal and the local oscillation signal output from each of the FM PLL circuit 2 and the AM PLL circuit 6. Based on the frequency of the description.

Specifically, the frequency of the signal divided by the three dividers 81, 82, and 83 from the reference signal output from the VCO 88 in the FM stereo demodulation circuit 4 coincides with the frequency of the pilot signal. The frequency of the signal obtained by dividing the reference signal output from the demodulation circuit 4 by the two dividers 24 and 22 coincides with the value obtained by dividing the frequency of the frequency allocation interval of the FM broadcast by a predetermined integer value. The VCO 88 so that the frequency of the signal divided by the two dividers 24 and 23 from the reference signal output from the circuit 4 matches the value obtained by dividing the frequency of the frequency allocation interval of the AM broadcast by a predetermined integer value. Sets the frequency of the reference signal output from. Alternatively, the oscillation frequency of the reference signal output from the FM stereo demodulation circuit 4 may be an integer multiple of the minimum common multiple of the frequency of the pilot signal, the frequency of the frequency allocation interval of the FM broadcast, and the frequency of the frequency allocation interval of the AM broadcast. Set it.

By setting the oscillation frequency of the reference signal output from the FM stereo demodulation circuit 4 in this way, the reference signal can be divided to generate the gate pulse necessary for FM demodulation, and the same reference signal is divided to divide the signal for FM. It can be used as a reference frequency signal of the PLL circuit 2 and the AM PLL circuit 6, and local oscillation signals necessary for frequency conversion of the FM reception signal and the AM reception signal can be used for the FM PLL circuit 2 and the AM PLL circuit. It can output from (6).

In addition, this invention is not limited to the said Example, A various deformation | transformation is possible within the scope of the summary of this invention. For example, in the above-described embodiment, the FM broadcast and the AM broadcast can be received, but only the FM broadcast may be received. In this case, the antenna 59, the AM tuner unit 5, the AM detection circuit 7, the low frequency amplifier circuit 105, the speaker 106, the AM PLL circuit 6 and the divider 23 are provided. You don't have to.

When the AM broadcast is not received, it is not necessary to consider the local oscillation signal related to the AM broadcast and the frequency allocation interval of the AM broadcast, so that the frequency of the reference signal output from the FM stereo demodulation circuit 4 is used as a pilot signal. The frequency of the oscillation and the frequency of the local oscillation signal output from the FM PLL circuit 2 may be set. Specifically, the frequency of the signal obtained by dividing the frequency of the reference signal output from the FM stereo demodulation circuit 4 and the reference signal output from the VCO 88 by three frequency dividers 81, 82, and 83 is determined by the pilot signal. In addition to matching the frequency, the frequency of the signal obtained by dividing the reference signal output from the FM stereo demodulation circuit 4 by two frequency dividers 24 and 22 is obtained by dividing the frequency of the frequency allocation interval of the FM broadcast by a predetermined integer value. To match the value, the frequency of the reference signal output from the VCO 88 is set. Alternatively, the oscillation frequency of the reference signal output from the FM stereo demodulation circuit 4 is set to a value of an integer multiple of the least common multiple of the frequency of the pilot signal and the frequency allocation interval of the FM broadcast.

In addition, the division ratios of the seven frequency dividers 22, 23, 24, 81, 82, 83, and 84 described above are "9", "50", "38", "15", "30", and "2", respectively. Although " " and " 2 ", these division ratios are set based on the frequency of the pilot signal, the frequency of the local oscillation signal output from the FM PLL circuit 2, and the frequency of the local oscillation signal of the AM PLL circuit 6; If it is, you may change suitably.

As described above, according to the present invention, the oscillation operation is performed on the first oscillator so as to be synchronized with the pilot signal included in the FM stereo composite signal, and the frequency conversion is performed based on the oscillation signal output from the first oscillator. The oscillation operation is performed to the second oscillator so as to output a local oscillation signal required for the second oscillator. For this reason, it is not necessary to provide a dedicated oscillator necessary for separately outputting a local oscillation signal, and the number of components can be reduced. In particular, when considering a circuit formed of a radio receiver integrated on a semiconductor substrate, the number of externally attached components such as a crystal oscillator used in an oscillator can be reduced.

Moreover, by constructing the first PLL circuit as the voltage controlled oscillator using the crystal oscillator, the first oscillator can generate a gate pulse signal precisely synchronized with only the pilot signal.

Further, by configuring the first PLL circuit as the voltage controlled oscillator using the crystal oscillator, the first oscillator can output an oscillation signal with high precision and low frequency variation from the first oscillator. As a result, since the crystal oscillator used for this does not need to select only the one with a particularly high frequency precision, it can reduce component cost using an inexpensive crystal oscillator.

Claims (11)

In a radio receiver, A first oscillator for performing a predetermined oscillation operation in synchronization with a pilot signal included in the FM stereo composite signal after FM detection; And a second oscillator for generating a local oscillation signal necessary for frequency conversion of the FM reception signal based on the oscillation signal output from the first oscillator. The oscillator of claim 1, wherein the first oscillator is a voltage controlled oscillator using a crystal oscillator, And a first phase locked loop circuit comprising said voltage controlled oscillator to generate a predetermined gate pulse signal for demodulating said FM stereo composite signal. 2. The second phase locked loop circuit according to claim 1, further comprising a first divider and a second oscillator of which a division ratio can be changed, as well as using a signal obtained by dividing an oscillation signal output from the first oscillator as a reference frequency signal. And And varying the frequency of the local oscillation signal output from the second oscillator by changing the division ratio of the first divider. The radio receiver of claim 1, wherein an oscillation frequency of the first oscillator is set based on a frequency of the pilot signal and a frequency of a local oscillation signal output from the second oscillator. The oscillation frequency of the first oscillator is characterized in that the frequency of the signal obtained by dividing the oscillation signal output from the first oscillator by the first division ratio is equal to the frequency of the pilot signal, and from the first oscillator. And a frequency obtained by dividing the output oscillation signal by the second division ratio so that the frequency of the frequency allocation interval of the FM broadcast is divided by a predetermined integer value. The radio receiver of claim 1, wherein the oscillation frequency of the first oscillator is set to an integer multiple of a minimum common multiple of the frequency of the pilot signal and the frequency of the frequency allocation interval of the FM broadcast. The radio receiver of claim 1, further comprising a third oscillator for generating a local oscillation signal for frequency conversion of an AM received signal based on an oscillation signal output from the first oscillator. 8. The third phase synchronization loop circuit according to claim 7, further comprising a second frequency divider and a third oscillator in which the division ratio is changeable, while using a signal obtained by dividing the oscillation signal output from the first oscillator as a reference frequency signal. And varying the frequency of the local oscillation signal output from the third oscillator by changing the division ratio of the second divider. 8. The radio receiver of claim 7, wherein an oscillation frequency of the first oscillator is set based on a frequency of the pilot signal and a frequency of each local oscillation signal output from the second and third oscillators. The oscillation frequency of the first oscillator, wherein the frequency of the signal obtained by dividing the oscillation signal output from the first oscillator by the first division ratio coincides with the frequency of the pilot signal, and is output from the first oscillator. The frequency obtained by dividing the oscillation signal by the second division ratio is equal to the value obtained by dividing the frequency of the frequency broadcasting interval of the FM broadcasting by the first integer value, and the frequency where the oscillation signal output from the first oscillator is divided by the third division ratio is AM broadcast. And set the frequency of the frequency allocation interval of to match a value obtained by dividing the frequency by a second integer value. 8. The oscillation frequency of the first oscillator is set to an integer multiple of the minimum common multiple of the frequency of the pilot signal, the frequency of the frequency allocation interval of FM broadcasting, and the frequency of the frequency allocation interval of AM broadcasting. Radio receiver, characterized in that.