JPH10150203A - Manufacture of thin film semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a semiconductor thin film to be doped with impurities low but uniform in concentration in a low-temperature process. SOLUTION: A chemical vapor deposition is carried out using a mixed material gas of semiconductor film forming gas and dopant gas, whereby a non-single crystal semiconductor thin film 2 is deposited on an insulating substrate 1 to serve as an active layer. Dopant contained in the semiconductor thin film 2 is activated by irradiation with an energy beam 3 so as to previously control a semiconductor transistor in threshold voltage. The semiconductor thin film 2 is processed into a transistor by integration. When B2 H6 diluted with hydrogen or helium and SiH4 are used as dopant gas and semiconductor film forming gas respectively, the mixing ratio of B2 H6 to SiH4 is set at 30ppm or less. When a non-single crystal silicon semiconductor thin film is turned polycrystalline at the same time with the activation of impurities, the energy beam 3 is optimized in energy density so as to make the crystal silicon semiconductor thin film have such a crystalline phase that a minimum crystal is 10nm or above in grain diameter and fine crystals below 10nm in grain diameter are not included.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a thin film semiconductor device in which thin film transistors are formed on an insulating substrate. More specifically, the present invention relates to a method for manufacturing a thin-film semiconductor device by a low-temperature process (for example, a process maximum temperature is 600 ° C. or less). More specifically, the present invention relates to a technique for forming a semiconductor thin film to be an active layer of a thin film transistor and a technique for doping impurities at a low concentration. Such a thin film semiconductor device is used, for example, as an active element substrate (drive substrate) of an active matrix type liquid crystal display.

[0002]

2. Description of the Related Art Thin film transistors are widely used as switching elements in active matrix type liquid crystal displays. In particular, polycrystalline silicon has been conventionally used as a semiconductor thin film serving as an active layer of a thin film transistor. Polycrystalline silicon thin film transistor (poly-Si
TFT) can be used not only as a switching element but also as a circuit element, and a peripheral driving circuit can be built in with the switching element on the same substrate. or,
Since the poly-Si TFT can be miniaturized, the area occupied by the switching element in the pixel structure can be reduced, and a high aperture ratio of the pixel can be achieved. By the way, conventionally, poly-
Si TFT has a maximum process temperature of 1000 due to the manufacturing process.
In this case, quartz glass or the like having a temperature of about ° C and having excellent heat resistance has been used as an insulating substrate. It has been difficult to use a glass substrate having a relatively low melting point due to the manufacturing process. However, in order to reduce the cost of the liquid crystal display, it is essential to use a low melting point glass plate material. Therefore, in recent years, the development of a so-called low-temperature process in which the maximum process temperature is 600 ° C. or lower has been promoted. In particular, the low-temperature process is extremely advantageous in terms of cost when manufacturing a large liquid crystal display. With the increase in the size of the liquid crystal display, attention has been paid to an ion doping method capable of injecting impurities into a large-area semiconductor thin film with high throughput in a poly-Si TFT processed at a low temperature. In this ion doping method, an impurity gas is ionized and then subjected to electric field acceleration without mass separation to irradiate a large area semiconductor thin film with impurity ions at once. In contrast, ion implantation involves irradiating a semiconductor thin film with an ion beam after mass separation of impurity ions.

[0003]

According to the ion doping method, impurities can be implanted into a semiconductor thin film in a short time with a high dose of about 10 ¹⁵ to 10 ¹⁶ / cm ² . However, it is difficult in principle to accurately control the dose of the impurity at 10 ¹⁴ / cm ² or less. A high dose of the impurity is used, for example, for forming the source region / drain region of the thin film transistor, while a low dose is used, for example, for controlling the threshold voltage of the thin film transistor. In order to adjust the threshold voltage, attempts have been made to dilute the dopant gas and perform ion doping to control the dose lower. However, even with this method, it has been difficult to accurately control a dose of about 10 ¹² / cm ² necessary for controlling the threshold voltage of the poly-Si TFT. On the other hand, conventional ion implantation can control a low dose, but cannot implant impurities into a large-area semiconductor thin film at a time, and the throughput deteriorates when manufacturing a liquid crystal display. there were.

[0004]

In order to solve the above-mentioned problems of the prior art, the present invention adjusts the threshold voltage of a thin film transistor by introducing impurities into a large-area semiconductor thin film at a low dose with high precision in a low-temperature process. It is an object of the present invention to provide a method of manufacturing a thin film semiconductor device which enables the method. The following measures were taken to achieve this purpose. That is, according to the present invention, a thin film semiconductor device is manufactured by the following steps.
First, a film formation process is performed, and a non-single-crystal semiconductor thin film to be an active layer of a transistor is deposited on an insulating substrate by chemical vapor deposition using a source gas in which a dopant gas is mixed with a semiconductor film formation gas. . Next, an irradiation step is performed, and an energy beam is irradiated to activate a dopant (impurity) contained in the semiconductor thin film, and a threshold voltage of the transistor is adjusted in advance. Finally, a processing step is performed to process the semiconductor thin film to integrally form transistors. As a feature,
In the film forming step, B ₂ H ₆ diluted with hydrogen or helium is used as a dopant gas, and Si 2
With use of the H _4, it is set the mixing ratio of B ₂ H ₆ against the SiH ₄ to less than 30 ppm. Preferably, in the irradiation step, the non-single-crystal semiconductor thin film is crystallized simultaneously with activation of the dopant. In the irradiation step, an excimer laser beam is used as an energy beam. As another characteristic feature of the present invention, the irradiating step polycrystallizes the semiconductor thin film made of the non-single-crystal silicon simultaneously with activation of the dopant, and has a minimum crystal grain size of 10 nm or more and a grain size of 10 nm or less. To a crystal phase not containing microcrystals. Preferably, in the film forming step, PH ₃ or B ₂ H ₆ diluted with hydrogen or helium is used as a dopant gas, and SiH ₄ or B ₂ H ₆ is used as a semiconductor film forming gas. Preferably, in the irradiation step, an excimer laser beam is used as an energy beam.

The present invention can be applied to a method for manufacturing a display device. In this case, the display device is manufactured by the following steps. First, a film formation process is performed, and a chemical vapor deposition is performed using a source gas in which a dopant gas is mixed with a semiconductor film formation gas, and a non-single-crystal semiconductor thin film to be an active layer of a transistor is formed on one insulating substrate. Deposited on Next, an irradiation step is performed, and an energy beam is irradiated to activate a dopant contained in the semiconductor thin film, and a threshold voltage of the transistor is adjusted in advance. Subsequently, a first processing step is performed, and the semiconductor thin film is processed to integrally form transistors. Further, a second processing step is performed, and a pixel electrode is integrally formed by connecting to the transistor. Finally, an assembling process is performed, and the other insulating substrate on which the counter electrode is formed in advance is bonded to the one insulating substrate via a predetermined gap, and the electro-optical material is arranged in the gap. Thus, an active matrix display device is completed. As a characteristic feature, the film forming step uses B ₂ H ₆ diluted with hydrogen or helium as a dopant gas, and uses SiH ₄ as a semiconductor film forming gas,
The mixing ratio of B ₂ H ₆ to SiH ₄ is set to less than 30 ppm. As another characteristic feature, the irradiation step simultaneously activates the dopant, polycrystallizes the semiconductor thin film made of the non-single-crystal silicon, and has a minimum crystal grain size of 10 nm.
The crystal phase is not less than 10 nm and does not contain microcrystals having a particle size of 10 nm or less.

According to the present invention, a semiconductor thin film is deposited on an insulating substrate by performing chemical vapor deposition using a source gas in which a dopant gas is mixed with a semiconductor film forming gas in advance. In particular, when B ₂ H ₆ diluted with hydrogen or helium is used as a dopant gas and SiH ₄ is used as a semiconductor deposition gas, the mixing ratio of B ₂ H ₆ to SiH ₄ is 30 ppm.
Adjusted to less than. Thus, by adjusting the mixing ratio of the dopant gas to the semiconductor film forming gas,
A dopant (impurity) can be contained in the semiconductor thin film at a desired low dose. In this state, the dopant is not activated and does not contribute to carrier conduction in the semiconductor thin film. Therefore, after the film formation process, an energy beam such as an excimer laser beam is irradiated to activate the dopant contained in the semiconductor thin film. In particular, when the non-single-crystal silicon semiconductor thin film is polycrystallized at the same time as the activation of the dopant, the crystal phase has a minimum crystal grain size of 10 nm or more and does not include microcrystals having a grain size of 10 nm or less. Thereby, the threshold voltage of the thin film transistor can be adjusted in advance. For example, when a p-type impurity (for example, boron B) is introduced into a semiconductor thin film made of silicon (Si), the threshold voltage of an n-channel thin film transistor can be adjusted in the enhancement direction according to the dose.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the drawings. 1 and 2 are process diagrams showing a first embodiment of a method for manufacturing a thin film semiconductor device according to the present invention. In the present embodiment, an N-channel thin film transistor is integrated on an insulating substrate to form a thin film semiconductor device used as an active element substrate of an active matrix display device. Note that the same applies to the case of forming a P-channel thin film transistor. First, in step (a) of FIG. 1, chemical vapor deposition (CVD) is performed using a source gas in which a semiconductor film forming gas is mixed with a dopant gas, and a non-single-crystal semiconductor thin film to be an active layer of a transistor is formed. 2 is deposited on the insulating substrate 1. In this example, the plasma CV
D, a semiconductor thin film 2 made of polycrystalline silicon is deposited to a thickness of about 20 to 100 nm by a method such as LPCVD. In this example, the film thickness is set particularly to 40 nm. If necessary, an SiO ₂ film, a SiN _x film, or the like, as a buffer layer is formed on the surface of the insulating substrate 1 made of transparent glass or the like for about 100 to ₂ times.
The film may be formed with a thickness of 00 nm. When the semiconductor thin film 2 is formed by CVD, a mixture of a semiconductor film forming gas and a dopant gas is used as a source gas. A semiconductor film forming gas uses a 100% concentration gas of SiH ₄ , while a dopant gas uses hydrogen diluted or helium diluted B ₂ H ₆ . The dilution concentration is set to about 10 to 100 ppm. In this example, SiH ₄ 100% gas 30 sccm and B ₂ H ₆ 20 ppm
A semiconductor thin film 2 was formed at a substrate temperature of 150 to 350 ° C. by a plasma CVD method using a source gas mixed with a hydrogen diluent gas of 1.0 sccm. In this case, B ₂ H _{6 with} respect to SiH ₄
Is 0.7 ppm. Generally, in the present invention, Si
The mixing ratio of B ₂ H ₆ to H ₄ is set to less than 30 ppm. In the obtained semiconductor thin film 2, a dose amount equivalent to 1 × 10 ¹² / cm ² when B + was doped by an ordinary ion implantation method was obtained. 3 for doping by CVD
Even if the film was formed over a large area of about 00 × 400 mm ² , there was almost no variation in the dose amount in the wafer surface. Generally, it is relatively easy to suppress the dose within the wafer surface to within ± 1%. The deposition method is plasma C
Not limited to VD method, for example, Si ₂ by LPCVD
Using H ₆ gas and B ₂ H ₆ 20 ppm diluent gas, 450
It is possible to obtain a semiconductor thin film made of amorphous silicon at a similar low dose by being decomposed at about ° C. In this example, in order to control the threshold voltage (Vth) of the N-channel thin film transistor in advance, B ₂ H ₆ is used as a p-type dopant gas.

Then, the dopant contained in the semiconductor thin film 2 is activated by irradiating the energy beam 3 to adjust the threshold voltage of the transistor in advance. Note that, for example, an excimer laser beam can be used as the energy beam 3. In this irradiation step, the non-single-crystal semiconductor thin film 2 is crystallized simultaneously with activation of the dopant. For example, when the semiconductor thin film 2 made of amorphous silicon is formed by the LPCVD method, the dopant is not activated as it is. Therefore, for the purpose of crystallization of amorphous silicon simultaneously with activation of the dopant, the wavelength is set to 150 to 35.
0-nm excimer laser beam from 320 to 400 mJ / cm ²
Irradiation at an energy density of 1 to convert amorphous silicon to polycrystalline silicon. Thus, the crystal grain size is 100 ~
P-type polycrystalline silicon of 500 nm is obtained. By irradiating an excimer laser pulse, the amorphous silicon is melted once and then crystallized to obtain polycrystalline silicon having a relatively large grain size. Since the excimer laser beam is a strong pulsed ultraviolet light, it is absorbed by the surface layer of the semiconductor thin film 2 made of silicon or the like, and the temperature of that portion is increased.
Never heat up. In this manner, a high-performance semiconductor thin film 2 can be formed on the insulating substrate 1 made of a glass material having a relatively low melting point by a low-temperature process. In the present invention, in particular, the energy density of the excimer laser beam is set to 32.
It is optimized in the range of 0 to 400 mJ / cm ² , and when the non-single-crystal silicon semiconductor thin film is polycrystallized at the same time as the activation of the dopant, the minimum crystal grain size is 10 nm or more and the fine grain size is 10 nm or less. Form a crystalline phase without crystals.
Thus, the threshold voltage of the transistor can be optimally adjusted in advance. In this example, the energy density of the laser beam was set to 380 mJ / cm ² , and the laser beam shaped into a line was repeatedly overlapped and irradiated while scanning the substrate. The laser beam shaped into a line has a longitudinal dimension of 150 mm and a width dimension of 0.5 mm. The laser beam is irradiated while partially overlapping along the width direction, and the overlapping amount (overlap amount) at this time was set to 99%.

Next, proceeding to the step (b) of FIG. 1, the semiconductor thin film 2 is patterned in an island shape. Thereby, an element region of the thin film transistor can be formed. Then the plasma CVD method, LPCVD method, to 50~200nm about a SiO ₂ film by APCVD method. Thus, a gate insulating film 4 covering the semiconductor thin film 2 is obtained. In some cases, the gate insulating film 4 may be formed by continuously forming SiN _x on this SiO ₂ .

In step (c), a gate electrode 5 is formed on the gate insulating film 4 by patterning. For example, Al, M
A metal film such as o, Ta, Ti, Cr, etc., a polycrystalline silicon film doped with impurities at a high concentration, a laminated film of highly doped polycrystalline silicon and a metal, or an alloy film of the above-described materials is formed. And processed into the gate electrode 5.

In step (d), after forming the gate electrode 5, an n-type impurity is implanted at a high concentration by ion doping 6 to form a source region 7 and a drain region 8 in the semiconductor thin film 2. This ion doping is performed by self-alignment using the gate electrode 5 as a mask. Thereby, a top gate type N-channel thin film transistor can be formed. Further, the source region 7 is subjected to laser annealing or the like.
And the drain region 8 is activated.

The process proceeds to step (e) of FIG.
SiO ₂ is formed to a thickness of about 400 to 600 nm by LPCVD, plasma CVD, or the like to form an interlayer insulating film 9.

Finally, in a step (f), a contact hole is opened in the interlayer insulating film 9 by etching. The contact hole communicates with the source region 7. Subsequently, a film of an alloy of Al and Si is formed to a thickness of about 600 nm, and is patterned into a predetermined shape to form the wiring electrode 10. As shown, the wiring electrode 10 is connected to the source region 7 of the thin film transistor via a contact hole. Then add about 4 SiO ₂
The passivation film 11 is formed with a thickness of 00 nm.
The passivation film 11 covers the thin film transistor and the wiring electrode 10. Thereafter, if necessary, the substrate is heated, hydrogen atoms contained in the interlayer insulating film 9 are diffused into the semiconductor thin film 2 using the passivation film 11 as a cap film, and a so-called hydrogenation process is performed. Finally, a transparent conductive film made of ITO or the like is formed on the surface of the passivation film 11, patterned into a predetermined shape, and processed into the pixel electrode 14. The pixel electrode 14 is connected to the drain region 8 of the thin film transistor via a contact hole opened in the passivation film 11 and the interlayer insulating film 9 in advance. Through the above steps, a thin film semiconductor device is completed. When assembling an active matrix display device using this thin film semiconductor device as an active element substrate, another insulating substrate on which a counter electrode is formed in advance is bonded to the insulating substrate 1 via a predetermined gap, and An electro-optical material such as a liquid crystal may be arranged in the gap.

Next, a second embodiment of the method for manufacturing a thin film semiconductor device according to the present invention will be described with reference to FIG. In this example, a bottom-gate thin film transistor is integrated and formed. The basic manufacturing process is the same as that of the first embodiment, and corresponding parts are denoted by corresponding reference numerals to facilitate understanding. First, in a step (a), a gate electrode 5 is formed on the insulating substrate 1. Specifically, Al, Mo, T
Metal films such as a, Ti, Cr, etc., polycrystalline silicon films doped with impurities at a high concentration, laminated films of high concentration doped polycrystalline silicon and metal, or alloy films of these materials are formed into a predetermined shape. The gate electrode 5 is processed by patterning. Next, by APCVD, LPCVD or plasma CVD, a SiN _x film 41 and a SiO ₂ film 42 are continuously formed,
The gate insulating film 4 is used. The thickness of this gate insulating film 4 is 1
It is set to 0 to 200 nm. Thereafter, a semiconductor thin film 2 made of amorphous silicon is formed in a thickness of 40 nm by the same method as in the first embodiment. Further, an energy beam 3 such as an excimer laser is irradiated by the same method as in the first embodiment. This laser annealing converts the amorphous silicon to polycrystalline silicon, and the semiconductor thin film 2
The dopant contained therein is activated. In some cases, in addition to SiH ₄ , Si
A 100% concentration gas of ₂ H ₆ can be used. or,
In order to control the threshold voltage (Vth) of an N-channel thin film transistor, B ₂ H ₆ is used as a p-type dopant gas. When doping an n-type impurity, for example, PH ₃ gas or the like may be used. .

In step (b), the SiO ₂ film is set to about 100 nm.
After forming a film with a thickness of 3 mm, the film is patterned into a predetermined shape and processed into an etching stopper 13. In this case, the etching stopper 13 is patterned so as to be aligned with the gate electrode 5 using the backside exposure technique. Ion doping 6
The impurity is injected into the semiconductor thin film 2 at a low concentration by a, and a low concentration impurity region is formed by self-alignment using the etching stopper 13 as a mask. This low-concentration impurity region is activated by laser annealing or the like.

In step (c), the etching stopper 1
The photoresist 15 is patterned in a region including the region 3.
Using the photoresist 15 as a mask, impurities are implanted at a high concentration into the semiconductor thin film 2 by ion doping 6 to form a source region 7 and a drain region 8. Note that low concentration impurity regions (LDD regions) 7a and 8a are left in portions covered with the photoresist 15. This allows
A bottom-gate thin film transistor having a so-called LDD structure is obtained. Thereafter, the used photoresist 15 is removed. Further, the source region 7 and the drain region 8 are activated by laser annealing or the like. At this stage, the semiconductor thin film 2 is etched to remove unnecessary portions from the substrate 1.
Remove from

Finally, in the step (d), SiO ₂ is coated at about 600 nm.
To form an interlayer insulating film 9. Furthermore, SiN _x
Is formed to a thickness of about 400 nm, and a passivation film 11 is provided. Thereafter, the interlayer insulating film 9 and the passivation film 1 are formed.
A contact hole is opened in 1 to expose a part of the source region 7 and a part of the drain region 8. Next, an alloy of Al and Si, Mo, or the like is formed to a thickness of about 600 nm, patterned into a predetermined shape, and processed into the wiring electrode 10. Subsequently, an acrylic resin or the like is applied to provide the flattening film 16. After opening a contact hole in the flattening film 16, a transparent conductive film such as ITO is deposited by sputtering or the like, patterned into a predetermined shape, and processed into the pixel electrode 14. If necessary, a hydrogenation process is performed before the formation of the flattening film 16, and hydrogen atoms are introduced into the semiconductor thin film 2 from the interlayer insulating film 9 or the passivation film 11.

FIG. 4 is a graph showing the relationship between the mixing ratio of B ₂ H ₆ to SiH ₄ and the threshold voltage Vth of the thin film transistor. The thin film transistor used for the measurement of this graph was manufactured by the process described in the second embodiment. That is, the thickness of the polycrystalline silicon constituting the thin film transistor is 40 nm. The horizontal axis of this graph indicates the ratio of the flow rate of B ₂ H _{6 to} the flow rate of SiH ₄ , and the vertical axis indicates the value of Vth. In the graph, white circles indicate measured values of the N-channel thin film transistor, and black triangles indicate measured values of the P-channel thin film transistor. FIG.
As is clear from FIG. ₅ , the mixing ratio of B ₂ H ₆ / SiH ₄ is 0.1.
In the case of 7 ppm, the threshold voltage Vth is +0.
It shifts about 8V. When the mixture ratio of B ₂ H ₆ / SiH ₄ is 3.0 ppm, Vth shifts by about +3.0 V.
On the other hand, when the mixing ratio of B ₂ H ₆ / SiH ₄ is 30 ppm, the Vth of the N-channel thin film transistor is +6.0.
V shift. In a P-channel type thin film transistor, Vth is largely shifted to the depletion side, and the transistor does not turn off. Therefore, it is necessary to control the mixing ratio (concentration) of B ₂ H ₆ / SiH ₄ to less than 30 ppm, preferably in the range of 0.5 to 5.0 ppm. As described above, the irradiation energy density of the laser beam at this time is set to 380 mJ / cm ² . The size of the laser beam shaped into a line is 150 × 0.5 mm ² , and the overlap amount of the laser beam is 99%.

The amount of change ΔVth of Vth also depends on the laser activation energy of the dopant performed simultaneously with the crystallization. FIG. 5 shows the dependence of ΔVth on the laser energy when B ₂ H ₆ / SiH ₄ = 0.7 ppm. When the laser energy density is 320 mJ / cm ² or less, the Vth shift hardly occurs. In particular, at 220 mJ / cm ² or less, ΔVth = 0, and no Vth shift occurs. On the other hand, the laser energy density is 320 mJ / cm
^When it exceeds ² , ΔVth rapidly increases, and reaches 380 to 400.
The maximum value reaches 0.8 V in the range of mJ / cm ² . However, when the energy density of the laser beam exceeds 400 mJ / cm ² , ΔVth starts to decrease again.

The behavior of ΔVth can be explained as follows. If the laser energy density is 220 mJ / cm ² or less, the dopant is not activated because the energy of the amorphous silicon has not reached the crystallization of polycrystalline silicon, so that the Vth shift does not occur. When the laser energy density is 320 mJ / cm ² or less, the polycrystalline silicon exhibits a microcrystalline phase and the maximum grain size is less than 10 nm, so that the Vth adjusting dopant segregates at the crystal grain boundaries. Alternatively, carriers are trapped in defect levels at the crystal grain boundaries and do not contribute to conduction. Therefore, also in this case, the Vth shift hardly occurs.
When the laser energy density exceeds 320 mJ / cm ² , the crystal grain size sharply increases and the minimum grain size becomes 10 nm or more.
With this, the activation rate of the Vth dopant increases, and Δ
Vth increases. Laser energy density of 380-4
At 00 mJ / cm ² , the crystal grain size reaches a maximum of 200 to 800 nm, and the ΔVth also increases accordingly. If the laser energy density exceeds 400 mJ / cm ² , a microcrystalline region with a grain size of 10 nm or less appears in polycrystalline silicon,
The activation rate of the h dopant decreases, and ΔVth also decreases.
As described above, the value of ΔVth is closely dependent on the crystal grain size of the polycrystalline silicon, and at least the minimum crystal grain size is 10 nm or more and at least 10 nm or less in order to enable Vth control. It is necessary to crystallize at a laser energy density that exhibits a crystal phase containing no crystals.
Note that the value of the laser energy density here is when the thickness of the polycrystalline silicon is 40 nm, and it goes without saying that the optimum range of the laser energy density changes depending on the thickness of the polycrystalline silicon. Further, the minimum crystal grain size referred to here is defined as the square root of the area of the minimum crystal grain included in a 10 × 10 μm ² field of view observed with a transmission electron microscope.

Referring to FIG. 6, an example of an active matrix type liquid crystal display device in which the thin film semiconductor device manufactured according to the first embodiment or the second embodiment is assembled as an active element substrate will be described. As shown in the drawing, the display device has a panel structure including an active element substrate 101, a counter substrate 102, and an electro-optical material 103 held therebetween.
As the electro-optical material 103, a liquid crystal material or the like is widely used. On the active element substrate 101, a pixel array section 104 and a drive circuit section are integrally formed. The drive circuit section is divided into a vertical drive circuit 105 and a horizontal drive circuit 106. A terminal 107 for external connection is formed at the upper end of the peripheral portion of the active element substrate 101. The terminal portion 107 is connected to a vertical drive circuit 105 and a horizontal drive circuit 106 via a wiring 108. A row-shaped gate wiring 109 and a column-shaped signal wiring 110 are formed in the pixel array unit 104. A pixel electrode 111 and a thin film transistor 112 for driving the pixel electrode 111 are formed at the intersection of the two wires. The gate electrode of the thin film transistor 112 corresponds to the gate line 1
09 and the drain region is connected to the corresponding pixel electrode 11.
1 and the source region is connected to the corresponding signal wiring 110. The gate wiring 109 is connected to the vertical drive circuit 105
While the signal wiring 110 is connected to the horizontal drive circuit 106.
Connected to The thin film transistor 112 for switching and driving the pixel electrode 111 and the thin film transistors included in the vertical drive circuit 105 and the horizontal drive circuit 106 are formed according to the present invention. That is, chemical vapor deposition is performed using a source gas in which a dopant is mixed with a semiconductor film-forming gas, and a non-single-crystal semiconductor thin film to be an active layer of a thin film transistor is first placed on an insulating substrate (active element substrate 10).
1) Deposit on top. The dopant contained in the semiconductor thin film is activated by irradiating an energy beam to adjust the threshold voltage of the thin film transistor in advance. Finally, the semiconductor thin film is processed to form a thin film transistor.

[0022]

As described above, according to the present invention,
Chemical vapor deposition is performed using a source gas obtained by mixing a semiconductor film formation gas with a dopant gas at a low concentration, and a non-single-crystal semiconductor thin film to be an active layer of a transistor is deposited on an insulating substrate. Further, the dopant contained in the semiconductor thin film is activated by irradiation with an energy beam to adjust the threshold voltage of the transistor in advance. This makes it possible to easily perform low-concentration impurity implantation (light doping) for controlling the threshold voltage in a low-temperature process. In addition, since impurities can be lightly doped over a large area with good uniformity, it can be applied to single-paneling of large-screen liquid crystal display devices or multi-paneling of small and medium-sized liquid crystal display devices, and the effect is enormous. There is. In particular, B ₂ as a dopant gas
When H ₆ is used and SiH ₄ is used as a semiconductor film forming gas,
By setting the mixing ratio of B ₂ H ₆ to SiH ₄ to less than 30 ppm, it is possible to precisely control the threshold voltage. In addition, when polycrystallizing a non-single-crystal silicon semiconductor thin film at the same time as activation of the dopant, the minimum crystal grain size becomes 10 nm or more by optimizing the laser energy density. No crystal phase and
This enables highly accurate threshold voltage control.

[Brief description of the drawings]

FIG. 1 shows a first example of a method of manufacturing a thin film semiconductor device according to the present invention.
It is a process drawing showing an embodiment.

FIG. 2 is a process chart of the first embodiment.

FIG. 3 shows a second example of the method of manufacturing a thin film semiconductor device according to the present invention.
It is a process drawing showing an embodiment.

FIG. 4 is a graph showing a relationship between a mixing ratio of B ₂ H ₆ to SiH ₄ and a threshold voltage Vth of the thin film transistor.

FIG. 5 is a graph showing a relationship between a laser energy density and a threshold voltage shift amount.

FIG. 6 is a schematic perspective view showing an example of an active matrix display device manufactured according to the present invention.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 insulating substrate 2 semiconductor thin film 3 energy beam 4 gate insulating film 5 gate electrode 6 ion doping 7 source region 8 drain region 9 interlayer insulating film 10 wiring Electrode, 11 ... passivation film,
13: etching stopper, 14: pixel electrode

Claims (8)

[Claims] 1. A film forming method in which a non-single-crystal semiconductor thin film to be an active layer of a transistor is deposited on an insulating substrate by performing chemical vapor deposition using a source gas in which a dopant gas is mixed with a semiconductor film forming gas. A step of irradiating an energy beam to activate a dopant contained in the semiconductor thin film to adjust a threshold voltage of the transistor in advance, and a processing step of processing the semiconductor thin film to integrally form a transistor A method of manufacturing a semiconductor device, wherein the film forming step uses B ₂ H ₆ diluted with hydrogen or helium as a dopant gas, and uses Si ₂ as a semiconductor film forming gas.
A method for manufacturing a thin film semiconductor device, comprising using H ₄ and setting a mixing ratio of B ₂ H ₆ to SiH ₄ to less than 30 ppm. 2. The method according to claim 1, wherein in the irradiating step, the non-single-crystal semiconductor thin film is crystallized simultaneously with activation of the dopant. 3. The method according to claim 1, wherein said irradiating step uses an excimer laser beam as an energy beam. 4. A non-single-crystal semiconductor thin film to be an active layer of a transistor is deposited on one insulating substrate by performing chemical vapor deposition using a source gas in which a dopant gas is mixed with a semiconductor deposition gas. A film forming step, an irradiation step of irradiating an energy beam to activate a dopant contained in the semiconductor thin film to adjust a threshold voltage of the transistor in advance, and a first processing step of processing the semiconductor thin film to form a transistor integratedly And a second step of integrally forming a pixel electrode by connecting to the transistor.
A method of manufacturing a display device, comprising: a processing step; and an assembling step of joining the other insulating substrate, on which a counter electrode is formed in advance, to the one insulating substrate via a predetermined gap, and disposing an electro-optical material in the gap. In the film forming step, B ₂ H ₆ diluted with hydrogen or helium is used as a dopant gas, and S ₂ is used as a semiconductor film forming gas.
A method of manufacturing a display device, comprising using iH ₄ and setting a mixing ratio of B ₂ H ₆ to SiH ₄ to less than 30 ppm. 5. A semiconductor thin film made of non-single-crystal silicon to be an active layer of a transistor is deposited on an insulating substrate by performing a chemical vapor deposition using a source gas in which a dopant gas is mixed with a semiconductor film forming gas. A film forming step of irradiating an energy beam to activate a dopant contained in the semiconductor thin film to adjust the threshold voltage of the transistor in advance; and a processing step of processing the semiconductor thin film to form an integrated transistor. Performing the irradiating step, while simultaneously activating the dopant, polycrystallizing the semiconductor thin film made of the non-single-crystal silicon, and having a minimum crystal grain size of 10 nm or more and a grain size. A method for manufacturing a thin-film semiconductor device, characterized in that the crystal phase does not include microcrystals having a diameter of 10 nm or less. 6. The film forming step uses PH ₃ or B ₂ H ₆ diluted with hydrogen or helium as a dopant gas, and uses SiH ₄ or Si ₂ H ₆ as a semiconductor film forming gas. Item 6. The method for manufacturing a thin film semiconductor device according to Item 5. 7. The method according to claim 5, wherein the irradiating step uses an excimer laser beam as an energy beam. 8. A semiconductor thin film made of non-single-crystal silicon to be an active layer of a transistor is formed by chemical vapor deposition using a source gas in which a dopant gas is mixed with a semiconductor film-forming gas. A step of irradiating an energy beam to activate a dopant contained in the semiconductor thin film to adjust a threshold voltage of the transistor in advance; and a step of processing the semiconductor thin film to form an integrated transistor. One processing step, and a second step of integrally forming a pixel electrode by connecting to the transistor.
A method of manufacturing a display device, comprising: a processing step; and an assembling step of joining the other insulating substrate, on which a counter electrode is formed in advance, to the one insulating substrate via a predetermined gap, and disposing an electro-optical material in the gap. In the irradiation step, the semiconductor thin film made of non-single-crystal silicon is polycrystallized at the same time as the activation of the dopant, and includes a microcrystal having a minimum crystal grain size of 10 nm or more and a grain size of 10 nm or less. A method for manufacturing a display device, comprising: