JPH10150147A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To assemble a capacity element easy in the pattern design capable of eliminating the wasteful capacity value by externally protruding a part of the second aperture part. SOLUTION: The first aperture part is formed in the first insulating film 27 on the lower electrode 26 and then a silicon nitride film 29 is formed on the first aperture part further to form the second insulating film 30 on the film 29. Next, the second aperture part 31 is formed on the second insulating film 30 further to form the upper electrode 32 on the second aperture part 31. Next, the silicon nitride film 29 and the second aperture part 31 are partly protruded outside from the connecting part 36 of a connecting electrode 33 drawing around the upper electrode 32 so as to form expansion parts 29a, 31a. In such a structure, the step on the connection part 36 can be relieved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit capable of preventing disconnection of a lead electrode of a capacitance element and facilitating the design of a capacitance value.

[0002]

2. Description of the Related Art Capacitors are incorporated in semiconductor integrated circuits (ICs, LSIs, etc.) as necessary. As the capacitive element, a material using a silicon nitride film is widely used in order to utilize its high dielectric constant.
Type (metal-insulater-semicondustor), MIM type (m
etal-insulater-metal) and the like are used.

In both the MIS type and the MOS type, there is no change in the basic configuration in which an electrode covers the silicon nitride film, and the electrode covers a plurality of insulating films. When covering a plurality of insulating films, the steps may be large in some cases, and the step coverage of the electrodes is deteriorated. Therefore, as proposed in Japanese Patent Application Laid-Open No. 02-135770, by providing a concave portion in the opening of the insulating film,
A structure for preventing deterioration of step coverage has been used.

FIG. 2 shows the structure. 2A is a plan view, and FIG. 2B is a sectional view taken along the line BB of FIG. 2A. In these figures, 1 is an N + type diffusion layer serving as a lower electrode, 2 is a first silicon oxide film covering the surface of the epitaxial layer 3, 4 is an opening of the first silicon oxide film 3, 5
Is a silicon nitride film, 6 is a second insulating film, 7 is an opening of the second insulating film 6, 8 is an upper electrode, and 9 is a connection electrode continuous from the upper electrode.

While the thickness of the silicon nitride film 4 is several hundred Å, the thickness of the first and second insulating films 3 and 6 is several thousand Å to several μ. Therefore, the connection portion 1 between the upper electrode 8 and the connection electrode 9
A recess 11 is formed by partially projecting the second insulating film 6 from the first insulating film. In this structure, the thickness of the insulating film covered by the upper electrode 8 at the connection portion 10 having the weakest strength is only the dielectric thin film 5, the sum of the dielectric thin film 5 and the second insulating film 6, Since the structure is such that the thickness gradually increases, for example, the sum of the thin film, the first insulating film 3 and the second insulating film 6, it is possible to prevent the disconnection accident of the connecting portion 10.

[0006]

Although such a structure is excellent in terms of improving the reliability of the capacitive element, a second insulating film is formed in an area for determining the capacitance value, that is, in the first opening 4. 6, the occupied area is partially wasted and the capacitance value is reduced, and the capacitance value cannot be calculated simply by the vertical × horizontal area when calculating the capacitance value. There was a drawback that a heavy load was applied.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of such a conventional problem, and has a structure in which a dielectric thin film and a second insulating film are partially retreated outward at a connection portion with a connection electrode.
An object of the present invention is to propose a structure of a capacitive element in which the shape of an area for determining a capacitance value can be designed to be square or rectangular while maintaining a structure in which the thickness of an insulating film covered by an upper electrode gradually increases.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. 1A and 1B show a capacitive element of a semiconductor integrated circuit according to the present invention. FIG. 1A is a plan view, and FIG. 1B is a sectional view taken along line AA of FIG. In FIG.
21 is a P-type single crystal silicon semiconductor substrate, 22 is a substrate 2
1, an N-type epitaxial layer 23 formed by vapor-phase growth on the substrate 1, an N + -type buried layer 23 buried between the substrate 21 and the epitaxial layer 22, and 24 an epitaxial layer 22 surrounding the buried layer 23. Penetrating island area 2
A P + type isolation region 5 for forming 5, and an N + type lower electrode 26 provided on the surface of the island region, may be a P type diffusion region. 27, a first insulating film made of a CVD or thermal oxide film formed on the surface of the epitaxial layer 22;
8, a first opening formed in the first insulating film 27; 29, a silicon nitride film covering the surface of the lower electrode 26 so as to cover the first opening 28; A second insulating film made of a CVD oxide film to be formed, 31 is a second opening formed in the second insulating film 30, and 32 covers the surface of the silicon nitride film 29 so as to cover the second opening. The upper electrode 33 is a connection electrode which is continuous from the upper electrode 32 and extends on the second insulating film 30 and is connected to another element or the like. Reference numeral 34 denotes an extraction electrode for electrically extracting the lower electrode 26, and reference numeral 35 denotes a contact hole where the extraction electrode 34 makes ohmic contact with the surface of the lower electrode 26.

The first opening 28 is formed in a square or rectangular shape. The silicon nitride film 29 is formed to be larger than the first opening, extends over the first insulating film 27, and further has a connection portion 3 between the upper electrode 32 and the connection electrode 33.
6 is partially expanded outwardly in the vicinity of FIG.
a). The second opening 31 is located slightly outside the first opening 28, and is further extended outward in the vicinity of a connection portion 36 between the upper electrode 32 and the connection electrode 33 (see FIG. 3).
1a). If the connection electrode 33 is led out with a line width of, for example, 10 μ, the extended portion 29 a of the silicon nitride film protrudes by approximately 10 μ with a line width of approximately 15 μ, and the extended portion 31 a of the second opening also has a line of approximately 5 μ. Project about 10 μ in width. The interval between the first and second openings 28 and 31 in other portions is 2 to 4 μ. The silicon nitride film 29 has a thickness of several hundred Å, and the first and second insulating films 27 and 30 each have a thickness of several thousand Å.
It has a thickness of to several μm.

With this configuration, in the mechanically weakest part of the upper electrode 32, that is, in the connecting part 36, the thickness of the insulating film located thereunder is limited to the dielectric thin film 5 only, And the sum of the second insulating film 6 and the sum of the dielectric thin film, the first insulating film 3 and the second insulating film 6, and the first and second openings. The interval between 28 and 31 can be partially larger than other peripheral portions. Specifically, while the peripheral portion has an interval of 2 to 4 μ, the connecting portion 36
In this case, an interval of 12 to 14 μ can be provided. Therefore, similarly to the conventional structure shown in FIG. 2, a step difference at the connecting portion 36 is reduced, and a disconnection accident at the connecting portion 36 of the upper electrode 32 can be prevented.

In addition, since the area for determining the capacitance value of the capacitive element, that is, the area of the first opening 28 is not consumed by expanding the second opening 31 to the outside, the capacitance value corresponding to the occupied area is reduced. The first opening 28 can be designed in a shape suitable for calculating the capacitance value, such as a square or a rectangle, without wasting. Further, the first opening 31a and the silicon nitride film 29a expanded by the connecting portion 36 can be extended on the isolation region 24, so that the area of the island region 25 is not expanded. Therefore, since a useless portion is not formed, it is more advantageous in terms of the degree of integration than before.

Although the above embodiment has been described with reference to the MIS type device, the present invention can be similarly applied to a case where the lower electrode 26 is formed by electrode wiring.

[0013]

As described above, according to the present invention, the step difference at the connecting portion 36 of the upper electrode 32 can be reduced to prevent a disconnection accident, and the shape of the first opening 28 can be reduced. Since it can be designed in a square or rectangular shape, most of the occupied area can be used for forming the capacitor, and there is no waste of area, and the capacitance can be easily calculated, so that the capacitor can be easily designed in pattern. is there.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining a semiconductor integrated circuit device of the present invention.

FIG. 2 is a cross-sectional view for explaining a conventional example.

Claims (3)

[Claims] 1. An integrated circuit in which a capacitance element is formed by sandwiching a dielectric thin film, comprising: a lower electrode of the capacitance element; a first insulating film covering a surface of the lower electrode; A first surface of the first insulating film exposing a surface;
An opening, a dielectric thin film covering the surface of the lower electrode so as to cover the first opening, and extending over the first insulating film; and covering the dielectric thin film. A second insulating film to be formed; a second opening of the second insulating film exposing a surface of the dielectric thin film; and covering the dielectric thin film so as to cover the second opening. An upper electrode of the capacitive element, and a lead electrode that is continuous from the upper electrode and extends on the second insulating film. In a connection portion between the lead electrode and the upper electrode, The body thin film and the second insulating film are partially receded, and the thickness of the insulating film located thereunder is gradually increased from the upper electrode to the connection electrode. Semiconductor integrated circuit. 2. The semiconductor integrated circuit according to claim 1, wherein said first opening is square or rectangular. 3. The semiconductor integrated circuit according to claim 1, wherein said dielectric thin film is a silicon nitride film.