JPH10136309A - Image compression/storage device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the image compression/storage device with enhanced performance by storing a large quantity of image data in an excellent state even when the image data are stored while being compressed. SOLUTION: A compression rate control means 105 controls a compression rate of a compression means 106 by controlling the compression means 106 to compress a plurality of image frames received by a image reception means 104 while de-framing a prescribed image frame among other a plurality of image frames except an in-frame coding image frame among a plurality of the image frames based on a residual capacity of a storage means 108. Thus, the compression image data obtained by compressing the frames based on a compression rate resulting from the residual capacity of the storage means 108 are stored in the storage means 108. Furthermore, each means is inactivated for image frames not compressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to, for example, an image compression / compression system for compressing and storing transmitted moving image data.
It relates to a storage device.

[0002]

2. Description of the Related Art In recent years, with the development of network technology, it has become possible to transmit a large amount of data.

Therefore, for example, a technique is known in which moving image data is transmitted between a server and a client by real-time communication, and the transmitted moving image data is displayed on a screen by an image compression / storage device on the client side. ing. However, each client on the network only needs to display the transmitted moving image data on the screen as it is. However, when the moving image data is desired to be stored, there are the following problems. That is, since the client-side image compression / accumulation device is not usually provided with a large-capacity storage circuit capable of storing a large amount of data, a large amount of moving image data transmitted over a long period of time can be stored. Did not.

[0004] Therefore, for example, FIG.
By providing the image compression / accumulation device 900 shown in FIG. 0, the above-described problem is solved.

The image compression / accumulation device 900 has a central control circuit (CPU: Central Prism) for controlling the operation of the entire device.
Ocessing Unit) 901 and a ROM (Read Only Memory) 902 in which an execution program of the CPU 901 is stored.
And a RAM (Random Access Memory) 903 used as a work area when the CPU 901 executes a program.
A network interface circuit 904 for capturing the transmitted moving image data, a data compression circuit 905 for compressing the captured moving image data in real time, and a storage circuit for storing the data compressed by the data compression circuit 905. 906 are connected by a bus 907.

[0006] The moving image data transmitted from the server to the client side is compressed in real time by the image compression / storage device 900 and stored in the storage circuit 906.

[0007]

However, in the conventional image compression / accumulation device 900 as described above, the compression ratio in the data compression circuit 905 is fixedly set regardless of the remaining capacity of the storage circuit 906. Therefore, only the moving image data up to the point in time when the remaining capacity of the storage circuit 906 becomes “0” is stored in the storage circuit 906, and the moving image is interrupted.

Accordingly, the present invention has been made to eliminate the above-mentioned disadvantages. Even when image data is compressed and stored in real time, a large amount of image data can be stored in a good condition. It is an object of the present invention to provide an image compression / storage device with improved device performance.

[0009]

According to a first aspect of the present invention, input image data comprising a plurality of image frames is converted into at least one image data.
What is claimed is: 1. An image compression / accumulation device which employs a compression method for compressing a screen by treating it as a screen group including a plurality of intra-frame encoded images, comprising: an image capturing means for capturing input image data; Compression means for compressing the image data; storage means for storing the compressed image data obtained by the compression means; detection means for detecting the remaining capacity of the storage means; and And a compression ratio control unit for controlling the compression unit so as to perform compression by dropping a predetermined image frame out of a plurality of image frames other than the intra-coded image. In a second aspect based on the first aspect, the plurality of image frames other than the intra-frame coded image include an inter-frame forward prediction coded image and a bidirectional prediction coded image, The control means performs compression by dropping the inter-frame forward prediction coded image, or drops the bidirectional prediction coded image based on the remaining capacity of the storage means indicated by the detection result of the detection means. The compression means is controlled so as to perform compression or to perform compression by dropping both the inter-frame forward prediction coded image and the bidirectional prediction coded image. In a third aspect based on the second aspect, the compression ratio control means reduces the inter-frame forward prediction coded image or the bidirectional prediction coded image as the remaining capacity of the storage means decreases. The compression means is controlled so as to sequentially perform compression in which both the inter-frame forward prediction coded image and the bidirectional prediction coded image are dropped.
In a fourth aspect based on the first aspect, the compression means is provided with a quantization means for quantizing the image data with a predetermined quantization coefficient, and the compression ratio control means is provided based on a detection result of the detection means. The quantization coefficient is varied based on the remaining capacity of the storage unit shown. Fifth
According to a fourth aspect of the present invention, in the fourth aspect, the quantization coefficient is increased stepwise by the compression ratio control means as the remaining capacity of the storage means decreases. In a sixth aspect based on the first aspect, there is provided a transmission buffer means for reading out the compressed image data of the compression means at a predetermined bit rate, temporarily storing the data in a buffer, and outputting the data to the storage means, The compression ratio control means controls the compression means based on the buffer sufficiency of the transmission buffer means. According to a seventh aspect, in the fourth aspect, there is provided a transmission buffer means for reading out the compressed image data of the compression means at a predetermined bit rate, storing the data in a buffer, and outputting the data to the storage means, The rate control means varies the quantization coefficient based on the buffer sufficiency of the transmission buffer means. The eighth invention is directed to the first aspect.
In the invention, the compression method is an MPEG method. In a ninth aspect based on the first aspect, the image capturing means captures image data transmitted in real time by the image capturing means, and the compression means converts the image data captured in real time by the image capturing means. On the other hand, compression is performed in real time.

[0010]

According to the first aspect of the present invention, the compression ratio control means excludes the intra-frame coded image frame from the plurality of image frames fetched by the image fetching means based on the remaining capacity of the storage means. By controlling the compression means so as to perform compression by dropping a predetermined image frame from among the plurality of image frames, the compression ratio in the compression means is controlled. As a result, the storage unit stores the compressed image data obtained by performing the compression at the compression rate based on the remaining capacity of the storage unit. In addition, each unit does not operate for an image frame that is not compressed. According to a second aspect, in the first aspect, compression of all image frames or compression of only intra-frame coded image frames and bidirectional predictive coded image frames is performed based on the remaining capacity of the storage unit. Alternatively, only the intra-frame coded image frame and the inter-frame forward prediction coded image frame are compressed, or only the intra-frame coded image frame is compressed. Accordingly, the storage unit stores, based on the remaining capacity of the storage unit, the compressed image data of all the image frames, the compressed image data of only the intra-frame encoded image frame and the bidirectional predictive encoded image frame, or the intra-frame encoded image data. Compressed image data of only an encoded image frame and an inter-frame forward prediction encoded image frame, or compressed image data of only an intra-frame encoded image frame is stored. According to a third aspect, in the second aspect, as the remaining capacity of the storage unit decreases, the compression of all the image frames is performed, and the compression of only the intra-frame coded image frame and the bidirectional predictive coded image frame is performed. Alternatively, the compression is performed by sequentially switching to compression of only the intra-frame encoded image frame and the inter-frame forward prediction encoded image frame, and further to compression of only the intra-frame encoded image frame. Thus, the storage unit stores the compressed image data of all the image frames, the compressed image data of only the intra-frame encoded image frame and the bidirectional predictive encoded image frame, or the intra-frame encoded image frame and the inter-frame forward frame prediction. Compressed image data of encoded image frames only,
Compressed image data of only intra-coded image frames is stored in order. According to a fourth aspect, in the first aspect, the compression ratio control means varies a quantization coefficient used when performing quantization by the compression means based on the remaining capacity of the storage means. The compression ratio in the compression means is controlled. As a result, the storage unit stores the compressed image data obtained by performing the compression at the compression rate based on the remaining capacity of the storage unit. According to a fifth aspect, in the fourth aspect, as the remaining capacity of the storage means decreases,
The quantization coefficient used for quantization increases stepwise. Then, the quantization is performed with the quantization coefficient that is increased stepwise, and compressed image data is obtained. This allows
As the remaining capacity of the storage unit decreases, the storage unit sequentially stores the compressed image data obtained by performing the compression at the compression ratio set in a stepwise manner. According to a sixth aspect, in the first aspect, the transmission buffer means reads out the compressed image data from the data compression means at a predetermined bit rate, temporarily accumulates the data in the buffer, and stores the data in the storage means. In addition, the compression ratio control unit is configured to determine, based on the buffer sufficiency, a predetermined one of a plurality of image frames other than the intra-coded image frame among the plurality of image frames captured by the image capturing unit. By controlling the compression means so as to perform compression by dropping image frames, the compression rate of the compression means is controlled.
As a result, the storage unit stores the compressed image data obtained by performing the compression at the compression rate based on the sufficiency of the buffer. According to a seventh aspect, in the fourth aspect,
The compression rate control means controls the compression rate in the compression means by changing a quantization coefficient used when performing quantization in the compression means based on the buffer sufficiency of the transmission buffer means. Thereby, the storage means has
Compressed image data obtained by compressing at a compression rate based on the remaining capacity of the storage means is stored. According to an eighth aspect, in the first aspect, the compression is performed by the MPEG method. Thus, the storage means stores the image data compressed by the MPEG method. According to the ninth invention,
In the first aspect, the transmitted image data is stored in the storage unit while being compressed in real time.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

First, a first embodiment will be described.

The image compression / storage device according to the present invention is applied to, for example, an image compression / storage device 100 as shown in FIG.

The image compression / accumulation device 100 is provided on the client side for receiving moving image data transmitted from a server by real-time communication, and controls the operation of the entire device as shown in FIG. CPU 10 to perform
1, a ROM 102 in which a program to be executed by the CPU 101 is stored, a RAM 103 used as a work area when the program is executed, and a network interface circuit (hereinafter, referred to as a network I / O) for capturing moving image data transmitted from a server. F) 10
4 and a data compression circuit 106 for compressing the moving image data.
A compression ratio setting circuit 105 for setting a compression ratio of a data compression circuit 106, a storage circuit 108 for storing compressed data, and a remaining amount detection circuit 107 for detecting a remaining capacity of the storage circuit 108 via a bus 109. It has a connected configuration. Further, in the image compression / accumulation device 100, the information on the compression ratio output from the compression ratio setting circuit 105 is supplied to the data compression circuit 106, and the information on the remaining capacity output from the remaining amount detection circuit 107 is output from the compression ratio setting circuit 105.

Here, for example, FIG.
A program for executing the processing shown in the flowchart of FIG. 1 is stored, and the CPU 101 controls the operation of the entire apparatus according to this program, so that the image compression / accumulation apparatus 100 performs the operation described below. Has been made to do.

That is, first, the CPU 101 determines whether or not moving image data has been transmitted from the server via the network I / F 104, and performs this determination processing until the moving image data is transmitted (step S101). S20
1).

When moving image data is transmitted, the CPU
101 resets a timer (not shown) provided in the remaining amount detection circuit 107 (step S20).
2). Note that a timeout value of the timer is preset in the CPU 101 by the user.

Next, the remaining amount detection circuit 107
In accordance with the control from 1, the remaining capacity of the storage circuit 108 is detected by a predetermined detection method, and the detection result is supplied to the compression ratio setting circuit 105 (step S203).

Next, the compression ratio setting circuit 105
According to the control from 01, a compression rate based on the detection result of the remaining amount detection circuit 107 is set in the data compression circuit 106 (step S204).

Next, the data compression circuit 106
According to the control from 01, the moving image data transmitted at the compression ratio set by the compression ratio setting circuit 105 is compressed, and the compressed data is transferred to the storage circuit 108 (step S205).

The details of the compression ratio setting circuit 105 and the data compression circuit 106 will be described later.

Therefore, the data compressed at the compression rate based on the remaining capacity is stored in the storage circuit 108 (step S206).

Next, the CPU 101 determines whether or not the transmission of the moving image data from the server has been completed, and terminates this processing if the transmission has been completed (step S207).

If it is determined in step S207 that the transmission has not been completed, the CPU 101 determines whether the value of the timer of the remaining amount detection circuit 107 has exceeded a timeout value preset by the user. to decide. When the timeout value is exceeded, the CPU 101 returns to the timer reset process of step S202 and controls the entire apparatus so that the processes after that step are performed again. In step S208, the entire apparatus is controlled so that the processing returns to the image data compression processing in step S205 and the processing in and after that step is performed again.

As described above, the image compression / accumulation device 100 detects the remaining capacity of the storage circuit 108, compresses the moving image data transmitted at a compression rate based on the detection result, and stores the compressed image data in the storage circuit 108. 108.

The compression ratio set by the compression ratio setting circuit 105 and the data compression circuit 106 for compressing moving picture data at the set compression ratio will be specifically described below.

First, the data compression circuit 106, for example,
As shown in FIG. 3, an RGB-YUV conversion circuit 301 to which transmitted moving image data is supplied, and an RGB-YU
Discrete Cosine Transform (DCT) circuit 302 to which the output of V conversion circuit 301 is supplied
And the quantization circuit 3 to which the output of the DCT circuit 302 is supplied
1, a zigzag scan circuit 304 to which the output of the quantization circuit 303 is supplied, and an encoding circuit 305 to which the output of the zigzag scan circuit 304 is supplied. The output of the encoding circuit 305 shown in FIG. The data is stored in the storage circuit 108. Also, the data compression circuit 1
Reference numeral 06 denotes a quantization table 306 to which information on the compression ratio set by the compression ratio setting circuit 105 in FIG. 1 is supplied.
And a Huffman encoding table 307 output to the encoding circuit 305.
Is supplied to the quantization circuit 303.

In the data compression circuit 106 as described above, the RGB-YUV conversion circuit 301 converts the transmitted moving image data in the chromaticity coordinate system of the image. That is, a normal image is recorded in RGB (red, green, blue) chromaticity coordinates, and is recorded in YUV (Y: luminance, U,
V: color difference) Convert to chromaticity coordinates.

The DCT circuit 302 divides the image data converted into the YUV chromaticity coordinates by the RGB-YUV conversion circuit 301 into 8 × 8 pixel square pixel blocks, and performs DCT conversion processing for each pixel block. By this DCT transform processing, 8 × 8 (64) pixel data is converted into 8 × 8 (6
(4) DCT coefficients.

FIG. 4A shows a DCT circuit 3 as described above.
FIG. 2 shows an example of a pixel block 401 converted into DCT coefficients at 02.

In FIG. 4A, the pixel block 4
The numerical value in each cell of 01 is the DCT coefficient. Also, one coefficient in one row and one column represents a DC (DC: Direct Current DC) coefficient, the spatial frequency is the lowest, and the following 63 coefficients represent AC (Alternate Current AC) coefficients.
Furthermore, the column direction represents the spatial frequency in the horizontal direction, the row direction represents the spatial frequency in the vertical direction, and the spatial frequency increases in each direction as the row or column number increases. The range of such DCT coefficients is, for example, -12.
It is an integer value in the range of 7 to 127.

The pixel blocks after DCT transformation, such as the pixel block 401 in FIG. 4A, are sequentially supplied to the quantization circuit 303 in block units.

The quantization circuit 303 uses the quantization table 306 which defines the quantization step size (divisor) for each coefficient of the pixel block to divide each coefficient of the pixel block from the DCT circuit 302 for each coefficient position. Quantize at different step sizes.

FIGS. 5A to 5C show the quantization circuit 303.
4 shows a pattern of the quantization step size for each coefficient written in the quantization table 306 used in FIG.

The details of the three patterns shown in FIGS. 5A to 5C will be described later, and one of the patterns is written in the quantization table 306. As shown in FIGS. 5A to 5C,
Each pattern is set so that the table value (quantization step) is small in the low frequency range and large in the high frequency range. This is because large image compression is performed by reducing the data of high frequency components in a high frequency range by utilizing the fact that human visual characteristics are insensitive to high frequencies.

Therefore, in the quantization circuit 303,
Any one of the three patterns shown in FIGS. 5A to 5C is written in the quantization table 306, and the quantization step defined in the quantization table 306 determines the pixel block from the DCT circuit 302. The quantization is performed by dividing each coefficient and rounding the remainder. Such quantization is performed on a pixel block basis.

The zigzag scan circuit 304 arranges the coefficients of the pixel block quantized by the quantization circuit 303 in a one-dimensional array, for example, in the order shown in FIG. That is, the coefficients are arranged in the order of the numbers written in the cells in FIG. 4B.

FIG. 4C is a diagram in which rearrangement in the zigzag scan circuit 304 is further illustrated. In FIG. 4C, the instruction line 403 indicates the order of rearrangement.

Therefore, as shown in FIG. 4C, in the zigzag scan circuit 304, from the DC coefficient having the lowest spatial frequency in one row and one column to the AC coefficient having the lowest spatial frequency in eight rows and eight columns. Are performed in a zigzag manner.

The encoding circuit 305 encodes a one-dimensional array which is an output of the zigzag scan circuit 304. For example, as shown in FIG. 6, a determination circuit 601 to which the output of the zigzag scan circuit 304 is supplied. And a run-length encoding circuit 602 and a coefficient grouping circuit 603 to which outputs of the determination circuit 601 are respectively supplied, and a Huffman encoding circuit 604 to which respective outputs of the run-length encoding circuit 602 and the coefficient grouping circuit 603 are supplied The output of the Huffman encoding circuit 604 is stored in the storage circuit 108 of FIG.

In the encoding circuit 305 as described above,
The determination circuit 601 determines that the DCT coefficient sequentially supplied as a one-dimensional array from the zigzag scan circuit 304 is “0”.
Is determined, and the determination result is affirmative (DCT coefficient =
If 0), the DCT coefficient having the value “0” is output to the run-length encoding circuit 602, and if the determination result is negative (DCT coefficient ≠ 0), the value is not “0”. The DCT coefficient is output to the grouping circuit 603.

The run-length encoding circuit 602 counts continuous DCT coefficients (= 0) from the decision circuit 601 and uses the count value, that is, the number of consecutive DCT coefficients having the value "0" as a run length as Huffman code. It is supplied to the encoding circuit 604.

On the other hand, the grouping circuit 603 performs grouping according to the range of the value of the DCT coefficient (範 囲 0) from the judgment circuit 601 and supplies the grouped DCT coefficients to the Huffman encoding circuit 604 together with the group number.

The Huffman coding circuit 604 performs Huffman coding on the run length from the run length coding circuit 602 and the group number from the grouping circuit 603 using the Huffman coding table shown in FIG. .

Therefore, the encoding circuit 305 allocates a short code length to a symbol having a high occurrence probability, and further compresses a redundant code.

As described above, when information on the remaining capacity of the storage circuit 108 is supplied from the remaining amount detection circuit 107 to the compression ratio setting circuit 105, the compression ratio setting circuit 105
The compression ratio is set in the data compression circuit 106 (steps S203 to S205 in FIGS. 1 and 2).

Hereinafter, the setting of the compression ratio by the compression ratio setting circuit 105 (step S204 in FIG. 2) will be specifically described.

The compression ratio setting circuit 105 includes, for example, FIG.
The setting table shown in FIG. In this setting table, the table numbers a, b, and c are the three patterns shown in FIGS. 5A, 5B, and 5C, that is, the quantization table 306 used when the data compression circuit 106 performs quantization. , Respectively, corresponding to the pattern of the quantization step size for each coefficient. In the three patterns of FIGS. 5A, 5B, and 5C, the quantization step size is set so that the quantization coefficient increases in the order of (a) → (b) → (c). Have been.

Therefore, the compression ratio setting circuit 105 uses the above-described setting table to determine the remaining capacity of the storage circuit 108 from the remaining capacity detection circuit 107 if the remaining capacity is 10% or more of the total capacity. If the remaining capacity is 10% or less of the total capacity, the pattern of FIG. 5B corresponding to table number b is selected. Alternatively, if the remaining capacity is 5% or less of the total capacity, the above-described FIG.
The pattern of (c) is selected, and the selected pattern is written in the quantization table 306.

Therefore, the quantization table 306 includes
As the remaining capacity of the storage circuit 108 decreases, a pattern with a higher quantization coefficient is written.

As described above, in the first embodiment, the data compression ratio is controlled by variably setting the quantization coefficient used for quantization in accordance with the remaining capacity of the storage circuit 108. Thus, as the remaining capacity of the storage circuit 108 decreases, the data compression rate can be gradually increased by gradually increasing the quantization coefficient. As a result, even when the moving image data is stored in the storage circuit 108 while being compressed in real time, it is possible to prevent the capacity of the storage circuit 108 from being lost in the middle of the processing, and more moving image data can be stored in a favorable state. Can be memorized.

In the first embodiment described above, the control of data compression according to the remaining capacity of the storage circuit 108 is performed by controlling the quantization coefficient. However, the present invention is not limited to this. It may be performed.

Therefore, as an example, the second embodiment will be described below.

That is, in the second embodiment, for example, the storage circuit 1 is controlled by controlling the B and P frames in the MPEG (Moving Picture Experts Group) compression method.
Data compression is controlled in accordance with the remaining capacity of data 08.

First, the MPEG compression method will be described. In the MPEG compression method, a plurality of image frames are collectively handled as a GOP (Group of Pictures).

One GOP includes an intra-frame coded image (hereinafter, referred to as an I-picture (Intra-Picture)) and an inter-frame forward-predicted coded image (hereinafter, a P-picture (Predictive-Picture: hereinafter)). Predictive coded image), bidirectional predictive coded image (hereinafter, B-picture (Bidirectionally predictive: Bidirectionall)
ypredictive coded image)). The number of pictures in a GOP is 1
The number of pictures in the GOP is "IBB".
PBBPBBPBB ".

There is only one I picture in a GOP, and compression is performed in the same procedure as in the first embodiment. That is, compression is performed in the order of DCT transform, quantization, zigzag scan, and Huffman coding.
08 is stored. Three P pictures exist in a GOP, are compressed by performing inter-frame predictive coding from an I picture and a P picture that are temporally earlier, and are stored in the storage circuit 108. The B picture is inserted between the I picture and the P picture, compressed by performing inter-frame prediction coding from the I picture and the P picture that are temporally preceding and succeeding, and stored in the storage circuit 108.

Data compression employing the above-described MPEG compression method is performed by a data compression circuit 800 as shown in FIG.
It is performed by

This data compression circuit 800 is provided, for example, in place of the data compression circuit 106 in the image compression / accumulation device 100 shown in FIG. 1, and as shown in FIG. An image rearrangement circuit 801 to which image data is supplied, a prediction error calculation circuit 809 and a switch 811 to which outputs of the image rearrangement circuit 801 are respectively supplied; a prediction determination circuit 813 to output to the switch 811; DCT supplied with the output of
Circuit 302, a quantization circuit 303 to which the output of the DCT circuit 302 is supplied, a zigzag scan circuit 304 and an inverse quantization circuit 8 to which the output of the quantization circuit 303 is respectively supplied.
05, an Huffman encoding circuit 305 to which the output of the zigzag scanning circuit 304 is supplied, and a Huffman encoding circuit 3
And a transmission buffer 808 to which the output of the Huffman encoding circuit 305 is supplied. The output of the transmission buffer 808 is stored in the storage circuit 108 of FIG. It has been done. Further, the data compression circuit 800 includes a transmission buffer 8
Rate control circuit 807 to which the output 08 is supplied
And an inverse DCT supplied with the output of the inverse quantization circuit 805
(IDCT) circuit 806, adder 810 supplied with the output of IDCT circuit 806, image memory 804 supplied with the output of adder 810, and motion compensation prediction circuit 803 supplied with the output of image memory 804, respectively. And a switch 812 to which the output of the motion compensation prediction circuit 803 is supplied.
2 is also supplied with the output of the image rearrangement circuit 801, and the motion detection circuit 802 outputs the output to the motion compensation prediction circuit 803. Further, the motion compensation prediction circuit 8
03 is also output to the switch 811, and the rate control circuit 807 is output to the quantization table 806 and the image rearrangement circuit 801. Further, the image rearrangement circuit 801 is supplied with information on the compression ratio from the compression ratio setting circuit 105 in FIG.

In the data compression circuit 800 shown in FIG. 8, the parts operating in the same manner as the data compression circuit 106 shown in FIG. 3 are denoted by the same reference numerals, and detailed description thereof will be omitted.

First, the image rearranging circuit 801 rearranges the I, B, and P frames in the GOPs as described above in the transmitted moving image data, and calculates a prediction error calculating circuit 809 and a motion detecting circuit. 802 and switch 811
Output to

Here, the image rearranging circuit 801 is provided with a setting table as shown in FIG. 9. When outputting each frame as described above, the image rearranging circuit 801 operates as shown in FIG. 9, the output of each of the B and P frames is controlled based on the information on the compression ratio from the compression ratio setting circuit 105 in FIG. 1 and the output signal from the transmission buffer 808 described later. Note that the image rearranging circuit 801
The details of the B and P frame output control will be described later.

The prediction error calculation circuit 809 calculates a difference between the data of each frame output from the image rearrangement circuit 801 (hereinafter referred to as input image data) and a prediction signal from the motion compensation prediction circuit 803 to be described later. And supplies it to the switch 811.

At this time, the prediction judgment circuit 813 compares the input image data output from the image rearrangement circuit 801 with the difference data output from the prediction error calculation circuit 809, for example, the energy component of the signal level fluctuation. And the switching operation of the switches 811 and 812 is controlled according to the comparison result.

The switch 811 switches between the input image data from the image rearrangement circuit 801 and the difference data from the prediction error calculation circuit 809 and outputs them to the DCT circuit 302 under the control of the prediction judgment circuit 813.

Accordingly, the input image data or difference data output from the switch 811 is processed by the DCT circuit 302, the quantization circuit 303, the zigzag scan circuit 304, and the Huffman encoding circuit 305 as described above. Then, it is supplied to the transmission buffer 808.

On the other hand, the inverse quantization circuit 805 has a characteristic opposite to that of the quantization circuit 303, and
The DCT coefficient data quantized in step 3 is inversely quantized and supplied to the IDCT circuit 806 as decoded coefficient data.

The IDCT circuit 806 includes an inverse quantization circuit 80
DCT transform of the decoded coefficient data from
Supply 0.

At this time, the switch 812 is supplied with a later-described prediction signal from the motion compensation prediction circuit 803 and “0”. Therefore, the switch 812 is controlled by the switch 811 under the control of the prediction determination circuit 813 described above.
In conjunction with the switching operation of the adder 810, the prediction signal from the motion compensation prediction circuit 803 and “0” are switched.
To supply.

The adder 810 receives the data from the IDCT circuit 806 and the prediction signal from the switch 812 or “0”
And the result of the addition is stored in the image memory 804 as decoded image data.

The decoded image data stored in the image memory 804 is stored in the motion compensation prediction circuit 803 and the motion detection circuit 80.
2 respectively.

The motion detecting circuit 802 includes, for example, the decoded image data from the image memory 804 and the image rearranging circuit 801.
The motion detection is performed by calculating the sum of the differences from the input image data from the input image data.

The motion compensation prediction circuit 803 obtains a difference between the motion vector from the motion detection circuit 802 and the decoded image data from the image memory 804, and uses the difference result as a prediction signal to the switch 812 and the prediction error calculation circuit 809. Supply each.

On the other hand, the transmission buffer 808 outputs the data (compressed data) encoded by the Huffman encoding circuit 305 to the bus 907 in FIG. 1 at a predetermined encoding bit rate. Therefore, the compressed data output from the transmission buffer 808 in this manner is stored in the storage circuit 906 via the bus 907 in FIG. Further, the transmission buffer 808 supplies information on the buffer sufficiency to the rate control circuit 807.

The rate control circuit 807 appropriately updates the contents of the quantization table 306 used in the quantization circuit 303 according to the information on the degree of sufficiency from the transmission buffer 808 and supplies the information to the image rearrangement circuit 801. I do.

Therefore, the image rearrangement circuit 801 uses the information on the degree of sufficiency from the rate control circuit 807 and the information on the compression ratio from the compression ratio setting circuit 105 in FIG. 1 according to the setting table in FIG. 9 described above. , I,
The output of each frame of B and P is controlled. That is, when the remaining capacity of the storage circuit 108 in FIG. 1 is 10% or more of the total capacity, the image rearranging circuit 801 outputs each frame of I, B, and P, and the remaining capacity is 10% of the total capacity. In the following case, I,
Each frame of P is output, and when the remaining capacity is 5% or less of the total capacity, a frame of only I is output. Therefore, as the remaining capacity of the storage circuit 108 decreases, the B frame is dropped or the P frame is dropped, and the B and P frames are dropped and output from the image rearranging circuit 801. Become.

As described above, according to the second embodiment, when an MPEG compression method or the like is employed in which a plurality of image frames are collectively handled as a GOP and compression is performed, according to the remaining capacity of the storage circuit 108, Since the frames to be compressed are all frames of I, B, and P, each frame of I and P, or a frame of only I,
When the frame is not compressed, the motion detection circuit 802, the motion compensation prediction circuit 803, and the like do not operate.
In this manner, depending on the remaining capacity of the storage circuit 108, the frames dropped during compression are B frames, P frames,
Alternatively, by using B and P frames, the storage circuit 108
Since the data compression is controlled in accordance with the remaining capacity of the moving image data, even when the moving image data is stored in the storage circuit 108 while compressing the moving image data in real time, as in the above-described first embodiment, during the processing, It is possible to prevent the capacity of the storage circuit 108 from being lost, to store more moving image data, and to reduce the power consumption of the device.

[0078]

As described above, according to the present invention, M
In an image compression / storage device that adopts the PEG method, etc.,
As the capacity of the storage means decreases, all image frames, intra-frame coded image frames and bidirectional predictive coded image frames or inter-frame forward predictive coded image frames, only intra-frame coded image frames, etc. Since the compression ratio is gradually increased by gradually reducing the number of image frames to be compressed and stored, even when the image data is stored while being compressed in real time, the storage means is not required. It is possible to prevent the moving image from being interrupted due to lack of capacity, and it is possible to store a large amount of image data in a good state without deterioration. In addition, since each unit does not need to operate on an uncompressed image frame, power consumption can be reduced. Furthermore, since the intra-coded image frame is always compressed, high-quality image data can be stored. Therefore, the performance of the device can be improved. Also, when the compression rate is gradually increased by gradually increasing the quantization coefficient as the capacity of the storage means decreases, the image data is stored while being compressed in real time. But
It is possible to reliably prevent the moving image from being interrupted due to the loss of the capacity of the storage means on the way, and it is possible to store a large amount of image data in a good state without deterioration. Therefore, the performance of the device can be further improved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an image compression / accumulation device according to the present invention in a first embodiment.

FIG. 2 is a flowchart illustrating a control operation of the image compression / storage device.

FIG. 3 is a block diagram showing a configuration of a data compression circuit of the image compression / accumulation device.

FIG. 4 is a diagram for explaining processing in a zigzag scan circuit and a quantization circuit of the image compression / accumulation device.

FIG. 5 is a diagram illustrating a quantization table of the image compression / accumulation device.

FIG. 6 is a block diagram showing a configuration of an encoding circuit of the data compression circuit.

FIG. 7 is a diagram for explaining a setting table provided in a compression ratio setting circuit of the image compression / accumulation device.

FIG. 8 is a block diagram showing a configuration of a data compression circuit of an image compression / accumulation device according to the present invention in the second embodiment.

FIG. 9 is a diagram for explaining a setting table provided in the data compression circuit.

FIG. 10 is a block diagram showing a configuration of a conventional image compression / storage device.

[Explanation of symbols]

 101 CPU 102 ROM 103 RAM 104 Network I / F 105 Compression ratio setting circuit 106 Data compression circuit 107 Remaining amount detection circuit 108 Storage circuit 109 Bus 100 Image compression / accumulation device

Claims (9)

[Claims] 1. An image compression / accumulation device adopting a compression method for compressing input image data composed of a plurality of image frames by treating it as a screen group including at least one intra-frame encoded image. Image capturing means for capturing image data; compression means for compressing image data captured by the image capturing means; storage means for storing compressed image data obtained by the compression means; Detecting means for detecting a capacity, based on a detection result of the detecting means, the compressing means to drop a predetermined image frame out of a plurality of image frames other than the intra-coded image and to perform compression; An image compression / accumulation device, comprising: a compression ratio control unit for controlling. 2. A plurality of image frames other than the intra-coded image include an inter-frame forward predicted coded image and a bidirectional predicted coded image; Based on the remaining capacity of the storage means indicated by the detection result, to perform compression by dropping the inter-frame forward prediction coded image, or to perform compression by dropping the bidirectional prediction coded image,
2. The image compression / compression system according to claim 1, wherein said compression means is controlled so as to perform compression by dropping both the inter-frame forward prediction coded image and the bidirectional prediction coded image.
Storage device. 3. The compression ratio control means includes: a compression unit that drops an inter-frame forward prediction coded image or a bidirectional prediction coded image as the remaining capacity of the storage unit decreases.
3. The image compression / accumulation device according to claim 2, wherein said compression means is controlled so as to perform compression in which both the inter-frame forward prediction coded image and the bidirectional prediction coded image are dropped. 4. The compression unit includes a quantization unit that quantizes image data with a predetermined quantization coefficient, and the compression ratio control unit includes a remaining capacity of the storage unit indicated by a detection result of the detection unit. 2. The image compression / accumulation device according to claim 1, wherein said quantization coefficient is varied based on the following. 5. The image compression / accumulation device according to claim 4, wherein said compression ratio control means increases said quantization coefficient stepwise as the remaining capacity of said storage means decreases. 6. A transmission buffer means for reading out the compressed image data of said compression means at a predetermined bit rate, temporarily storing it in a buffer, and outputting it to said storage means, wherein said compression ratio control means 2. The image compression / accumulation device according to claim 1, wherein said compression means is controlled based on a buffer sufficiency of said buffer means. 7. Transmission buffer means for reading out the compressed image data of said compression means at a predetermined bit rate, accumulating it in a buffer, and outputting it to said storage means, wherein said compression ratio control means comprises: 5. The image compression / accumulation apparatus according to claim 4, wherein said quantization coefficient is varied based on a degree of buffer filling of said means. 8. The image compression / accumulation device according to claim 1, wherein said compression system is an MPEG system. 9. The image capturing means captures image data transmitted in real time, and the compression means compresses image data captured in real time by the image capturing means in real time. 2. The image compression / accumulation device according to claim 1, wherein: