JPH10133046A - Optical element packaging substrate and hybrid optical integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To lower the floating capacity of optical element mounting sections, to assure fixing strength and to facilitate the mounting of plural optical elements by setting the height of first solder pattern surfaces on the surfaces of terrace parts higher than the height of the surfaces of second solder patterns on electrode parts. SOLUTION: The optical element mounting section 23 parts have the terrace parts (silicon terrace parts) 1a provided with projecting parts having flat front surfaces and recessed parts (electrode parts) 1b formed to be made lower than the front surfaces of the terrace parts 1a. Further, first ground surface metallic patterns and the first solder patterns 14 are successively laminated atop the terrace parts 1a. The surfaces of the electrode parts 1b include insulating film layers partly formed with apertures and these apertures and are formed with the electrode patterns successively laminated with such second ground surface metallic patterns to cover the wider regions and such solder patterns as to cover the wider regions. The height of the surfaces of the first solder patterns 14 on the terrace parts 1a is set higher than the height of the second solder pattern surfaces on the electrode parts 1b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical element mounting substrate and a hybrid optical integrated circuit in which one or a plurality of optical elements are mounted on a substrate having an optical waveguide via solder bumps.

[0002]

2. Description of the Related Art FIGS. 14 and 15 show an optical element mounting substrate and an example of a hybrid optical integrated circuit using the same, which is disclosed in Japanese Patent Application Laid-Open No. 8-78657. FIG. 14 is a perspective view of the optical element mounting board, FIG. 15 is a cross-sectional view of the optical element mounting board, and FIG. 16 is a side view of a hybrid optical integrated circuit on which the optical element is mounted.

As shown in FIG. 14, an optical element mounting board is
It has a rectangular silicon substrate 1. On one surface of the substrate 1, two convex portions (silicon terrace portions) 1a facing each other in the width direction are provided. Further, an optical waveguide portion 21 provided on one end side of the surface of the substrate 1 so as to sandwich these convex portions, a dielectric layer 3 laminated on the other end side of the surface of the silicon substrate 1, And an electric wiring pattern 4 laminated on the dielectric layer 3. On one surface of the silicon substrate 1, two convex portions 1a having a flat upper end and two silicon terrace portions 1a are sandwiched therebetween.
And two concave portions (consisting of a flat surface other than the silicon terrace portion 1a) 1b. An optical waveguide portion 21 having an optical waveguide 2 is provided on the first concave portion 1b, and a region (functioning as the electric wiring portion 22) in which the dielectric layer 3 and the electric wiring pattern 4 are sequentially laminated on the other concave portion 1b. ) Is provided. The optical element mounting portion 23 is composed of two silicon terraces 1a and a dielectric layer 3 interposed therebetween, and furthermore, an electrode 5 is formed on an electric wiring pattern on the dielectric layer 3.

As shown in FIG. 15, the structure of the electrode 5 of the element mounting portion includes an insulating film layer 6 having an opening on a part of the electric wiring pattern 4 and an opening of the insulating film layer 6. A base metal pattern 7 formed so as to cover a wider area,
And a solder pattern 8 formed so as to cover a wider area including the base metal pattern 7.

As shown in FIG. 16, the silicon terrace 1a, which is a convex portion of the silicon substrate 1, has a height up to the center of the half-waveguide core 2a and a core 9 of an optical element to be mounted.
Since high-precision processing is possible so that the height up to a coincides with the height a, it functions as a reference plane in the height direction when the optical element is mounted. Further, it functions as a good heat sink for the mounted optical element 9.

In the step of forming the optical element mounting substrate, as shown in FIGS. 14 and 15, first, a part of the silicon substrate 1 is removed to form a silicon terrace 1a. Next, the optical waveguide 2 is formed, and unnecessary portions thereof are removed by etching to form the dielectric layer 3. Further, after an electric wiring pattern 4 is formed on the dielectric layer 3, an insulating film layer 6 is formed thereon.
Cover with. Then, a contact hole is formed in a portion where the electrode 5 is to be formed. Furthermore, in order to prevent the solder pattern 8 from diffusing toward the electric wiring pattern 4 at the time of solder reflow, it is covered with the base metal pattern 7 so as to cover a wider area including the contact hole. Finally, a solder pattern 8 is laminated so as to cover a wider area including the base metal pattern 7.

Next, a method for mounting an optical element on the optical element mounting board will be described with reference to FIGS. FIG. 14 is a cross-sectional view showing a state when the optical element 9 is aligned on the optical element mounting board.

In this optical device mounting substrate, the height from the surface of the silicon terrace portion 1a to the center of the optical waveguide core 2a is manufactured so as to match the height from the surface of the optical device 9 to be mounted to the core 9a of the optical device. I have. Therefore, the optical element 9
The alignment of the optical waveguide 9 with the optical waveguide 2 is completed only by placing the optical element 9 on the surface of the silicon terrace 1a. On the other hand, the lateral alignment between the optical element 9 and the optical waveguide 2 is as follows.
As shown in FIG. 14, the silicon terrace 1a is
It can be easily achieved only by aligning the alignment mark 10 formed on the surface with the alignment mark 13 formed on the optical element 9 side. At the time of alignment, as shown in FIG. 14, there is a gap g between the upper surface of the solder pattern 8 formed on the substrate-side electrode 5 and the optical element-side electrodes 1 and 2, so that they are in electrical contact. Absent.

After the alignment is completed, when the solder pattern 8 is reflowed, the solder pattern 8 on the insulating film layer 6 is repelled and gathers on the base metal pattern 7 as shown in FIG. Further, the molten solder rises as solder bumps 11 on the underlying metal pattern 7 due to surface tension. If the height h of the solder bump 11 at this time is sufficiently high to fill the gap g, as shown in FIG. 25, the space between the substrate-side electrode 5 and the optical element-side electrode 12 becomes The optical elements 9 are electrically connected by the bumps 11 and are simultaneously fixed on the optical element mounting substrate, thereby forming a hybrid optical integrated circuit.

In the hybrid optical integrated circuit composed of such an optical element mounting substrate and the optical element 9, the optical element 9
Since the electrode 5 formed on the dielectric layer 3 of the optical element mounting portion 23 is electrically connected to the electrode 5 via the solder bump 11, the stray capacitance parasitic between the silicon substrate 1 and the electrode 5 is significantly reduced. can do. For this purpose, 10 Ggit / s
High speed operation is possible.

[0011]

However, in the above-mentioned conventional configuration, as shown in FIG. 25, the optical element 9 is in direct contact with the silicon terrace 1a while the solder bump 11
And was fixedly mounted on the optical element mounting substrate via the.

However, in this structure, since the optical element 9 and the optical element mounting board are fixed by only the small solder bumps 11, there is a problem in reliability in terms of fixing strength. Therefore, in order to further secure the fixing strength, the portion where the optical element 9 contacts the silicon terrace portion 1a after mounting the optical element needs to be reinforced by an adhesive or the like.

Further, when a plurality of optical elements are mounted, if there is an optical element already fixed with an adhesive, solder reflow is repeated over the number of optical elements mounted thereafter, so that the function of the adhesive deteriorates due to heat. There was a problem. In particular, when silicon is used as the substrate, it is difficult to locally reflow the solder for each mounted optical element because of its high thermal conductivity.

If the optical element mounting substrate or the optical element is warped when the array optical element is mounted, the individual cores 9a of the array optical element can be obtained simply by bringing the optical element into contact with the surface of the silicon terrace. Not only is it difficult to align the optical axis with the silicon terrace portion, but also there is a portion where the contact with the silicon terrace portion is not sufficient, so that there is a problem to be solved in that the portion does not function uniformly as a heat sink.

The present invention solves the above-mentioned problems, and provides an optical element mounting board which sufficiently reduces stray capacitance of an optical element mounting portion, secures fixed strength, and facilitates mounting of a plurality of optical elements. The purpose is to: It is another object of the present invention to provide a hybrid optical integrated circuit that satisfies all of the requirements for low stray capacitance, reliability of fixing an optical element, and a heat sink.

[0016]

Therefore, in order to solve the above-mentioned problems, an optical element mounting board according to the present invention of claim 1 comprises an optical waveguide section, an optical element mounting section and an electric wiring section on the same substrate. In the optical element mounting substrate provided with, the optical element mounting portion, a terrace portion provided with a convex portion having a flat upper surface,
An electrode portion formed so that the surface thereof is lower than the upper surface of the terrace portion. Further, a first base metal pattern and a first solder pattern are sequentially laminated on the upper surface of the terrace portion, and On the surface, an insulating film layer having an opening formed in part on an electric wiring pattern connected to the electric wiring portion, and including an opening of the insulating film layer and covering an area wider than the opening. A second base metal pattern formed by
An electrode pattern is formed by sequentially laminating a second solder pattern formed so as to cover an area wider than the second base metal pattern including the base metal pattern of The height of the surface of the first solder pattern is set higher than the height of the surface of the second solder pattern on the electrode portion.

Preferably, in the optical device mounting board according to the first aspect, the same board is provided as described in the second aspect.
A silicon substrate having irregularities on the surface, the terrace portion may be formed of a convex portion of the silicon substrate, and the electrode portion may have a concave portion of the silicon substrate and a dielectric layer formed thereon. .

Preferably, as described in claim 3, in the optical element mounting board according to claim 1 or 2, the thickness of the first solder pattern and the thickness of the second solder pattern are different from each other. May be set to equal values.

Preferably, as set forth in claim 4, in the optical element mounting substrate according to any one of claims 1 to 3, the optical waveguide portion is formed on the same substrate. It may be constituted by a fiber alignment groove.

Preferably, as described in claim 5, in the optical element mounting substrate according to any one of claims 1 to 3, the optical waveguide is formed on a concave portion of the same substrate. It may be constituted by a silica glass optical waveguide comprising a lower clad layer, a core layer, and an upper clad layer.

A hybrid optical integrated circuit according to a sixth aspect of the present invention includes an optical element mounting substrate provided with an optical waveguide section, an optical element mounting section, and an electric wiring section, and a hybrid optical integrated circuit mounted on the optical element mounting section. In the hybrid optical integrated circuit including the optical element, the optical element mounting portion includes a terrace portion having a convex portion having a flat upper surface, and an electrode portion formed so that the surface is lower than the surface of the terrace portion. And on the electrode part,
An electrode pattern connected to the electric wiring pattern of the electric wiring portion is formed, and the optical element is connected and fixed to the terrace portion by a solder pattern having a thickness of d1, and connected and fixed to the electrode portion by a solder bump having a thickness of d2. And the relationship d1 <d2 is established between the thickness d1 and the thickness d2.

Preferably, as described in claim 7, the optical element mounting substrate of the hybrid optical integrated circuit based on the invention of claim 6 includes a silicon substrate having an uneven surface, and a terrace. The portion may be composed of a convex portion of the silicon substrate, and the electrode portion may be composed of a concave portion of the silicon substrate and a dielectric layer formed thereon.

Preferably, as described in claim 8, the optical waveguide of the hybrid optical integrated circuit according to the invention of claim 6 or 7 comprises an optical fiber alignment groove formed on the silicon substrate. It may be a thing.

Preferably, as set forth in claim 9, the optical waveguide of the hybrid optical integrated circuit according to the invention of claim 6 or 7 has a lower cladding layer and a core formed on a concave portion of the silicon substrate. And a quartz glass optical waveguide composed of an upper cladding layer.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION

<Embodiment 1> An example of an optical element mounting board according to the present invention will be described with reference to FIGS. 1 is a perspective view of the optical element mounting board, FIG. 2 is a cross-sectional view taken along line AA 'of FIG. 1, and FIG. 3 shows a state where the optical element is mounted on the optical element mounting board shown in FIGS. FIG.

The optical element mounting board of this embodiment includes an optical waveguide section 21, an optical element mounting section 23, and an electric wiring section 22 on the same substrate 1. The optical element mounting portion 23 has a terrace portion (silicon terrace portion) 1 provided with a convex portion having a flat upper surface.
a, and a concave portion (electrode portion) 1b whose surface is lower than the upper surface of the terrace portion 1a. Further, a first base metal pattern 16 and a first base metal pattern 16 are formed on the upper surface of the terrace portion 1a. On the surface of the electrode portion 1b, an insulating film layer 6 partially formed with an opening on an electric wiring pattern connected to the electric wiring portion 22 is formed.
A second base metal pattern 17 including an opening of the insulating film layer 6 and formed so as to cover a region wider than the opening; and a second base metal pattern 17 including the second base metal pattern 17. An electrode pattern is formed by sequentially laminating a second solder pattern 15 formed so as to cover an area wider than the second base metal pattern 17, and furthermore, the first solder on the terrace portion 1a is formed. The height of the surface of the pattern 14 is set higher than the height of the surface of the second solder pattern 15 on the electrode portion.

As described above, in the optical element mounting section 23,
The height of the surface of the first solder pattern 14 on the terrace 1a is
By setting the height to be higher than the height of the surface of the second solder pattern 15 on the electrode part 5, in fixing the optical element after mounting, as shown in FIG. 3, the optical element 9 is fixed on the terrace 1a. The first solder pattern 14 is formed, and the electrical connection with the optical element 9 is performed by the solder bumps 11 formed by reflowing the second solder pattern 15 so that the roles can be shared and mounted. The fixing strength of the element can be greatly increased.

That is, as shown in FIG. 2, when mounting the optical element 9 on this optical mounting substrate, the surface of the first solder pattern 14 on the surface of the terrace portion 1a is used as a reference surface in the height direction. Since it is possible, the optical axis alignment in the height direction can be performed with high accuracy only by placing the optical element 9 on the optical mounting substrate. Further, the optical axis alignment in the lateral direction of the optical element 9 is as follows.
As shown in FIG. 1, this can be easily achieved by aligning the alignment mark 10 formed on the surface of the terrace portion 1a in advance with the alignment mark 13 formed on the optical element 9 side. Further, since the optical element 9 is fixed by the first solder pattern 14 having a large area, sufficient fixing strength can be secured.

On the other hand, the electrical connection with the optical element 9
The second solder pattern 15 formed above becomes the solder bump 11 after reflow, and is realized by increasing its height. At this time, the height of the solder at the time of reflow required for the second solder pattern 15 only needs to fill the gap g between the electrode 12 of the optical element 9 and the surface of the second solder pattern 15 before reflow. . In addition, since the fixing strength between the optical element 9 and the optical element mounting board is ensured by the first solder pattern 14, the contact area between the second solder pattern 15 and the optical element 9 side electrode 12 is smaller than the electrical connection area. Can be reduced to the minimum necessary for realizing. As a result, the amount of solder required for forming the solder bumps 11 can be significantly reduced, and the thickness of the first solder pattern 14 on the surface of the terrace 1a is reduced by the second solder pattern 15
The thickness of the optical element 9 can be reduced as much as possible by the thickness required for the optical element 9, so that the displacement of the optical element 9 due to the solder reflow can be greatly reduced.

Further, in the optical element mounting portion 23 of the optical element mounting board of the present invention, the second solder pattern 1 on the electrode portion 5 is formed.
By setting the first solder pattern 14 on the terrace portion 1a at a position higher than the five surfaces, a plurality of optical elements can be mounted by solder bumps.

This will be described in more detail below. The inventors of the present invention have already made it possible to mount a plurality of optical elements by thin-film soldering (Y. Nakasuga et a).
l. 'Multi-chip Hybrid Inte
Gration on PLC Platform u
sing Passive AlignmentTec
hnikue '. Proc. 1996 Electr
Sonic Components and Techn
logic Conference, pp 20-25
reference). The optical element mounting board of the present invention enables a plurality of optical elements to be mounted by solder bumps by using this method. That is, in the method of mounting a plurality of optical elements, first, the optical elements 9 aligned in the optical element mounting section 23 are once subjected to pressure at a temperature lower than the reflow temperature on the first solder pattern 14 on the terrace 1a surface. Perform temporary fixing,
This is repeated as many times as the number of mounted optical elements. Then, after the temporary fixing of all the optical elements is completed, the solder is reflowed at once without applying pressure. At this time, the first solder pattern 14 for fixing the optical element and the second solder pattern 15 for electrical connection are simultaneously reflowed, so that a plurality of optical elements can be mounted.

Further, the first solder pattern 14 for temporarily fixing
The thinner the better, the better, because it is possible to reduce the displacement due to the deformation of the solder when reflowing the solder.

Here, the substrate 1 is a silicon substrate having irregularities on the surface, the terrace portion 1a is composed of a convex portion of the silicon substrate, and the electrode portion 1b is composed of a concave portion of the silicon substrate and a concave portion of the silicon substrate. And a formed dielectric layer.

As described above, when the substrate 1 is a silicon substrate, the terrace 1a is constituted by a convex portion of the silicon substrate. Therefore, the terrace 1a can function as a heat sink for the optical element 9. It becomes possible. When the optical element 9 is mounted on the optical element mounting board, as shown in FIG. 3, the optical element 9 and the silicon terrace 1a are also thermally connected via the first solder pattern 14. Therefore, the heat sink effect is further improved. Further, since the electric wiring pattern 4 and the electrode 5 are formed on the dielectric layer 3 on the silicon substrate concave portion 1b, it is possible to form electric wiring and electrodes with reduced capacitance, and to mount an optical element suitable for high-speed operation. A substrate can be realized.

In this embodiment, as shown in FIG. 2, the thickness of the first solder pattern 14 and the thickness of the second solder pattern 15 are set to the same value. However, even though the thickness is set to the same thickness h1, the solder thickness after the solder reflow is the same as the thickness h1 in the first solder pattern 14 as shown in FIG. In the pattern 15, since different solder thicknesses can be realized on the same optical element mounting board, such as a solder bump having a thickness h2, the first solder pattern 14 and the second solder pattern 15 Can be formed in the same process, and the manufacturing process of the optical element mounting substrate can be simplified.

This will be described in more detail below.
FIG. 4 shows the thickness h of the first formed Au / Sn solder pattern.
The height h2 of the solder bump 28 after the solder reflow with respect to the ratio ds / dm between the diameter dm of the circular base metal pattern 26 and the diameter ds of the circular solder pattern 27 when 1 is fixed to 4 μm. This shows the relationship. That is, FIG. 4A is a graph showing the relationship between the solder diameter / base metal diameter ds / dm and the solder height h2 after reflow, and FIG. 4B illustrates the change in the height of the solder pattern before and after solder reflow. FIG. 2 is a schematic cross-sectional view for performing FIG. 4 shows that the height h2 of the solder bump 28 after the solder reflow can be determined by the area ratio between the base metal pattern 26 and the solder pattern 27. Therefore, the first solder pattern 14 formed on the surface of the silicon terrace portion 1a shown in FIGS.
Means ds / d where the solder height does not change after solder reflow
What is necessary is just to pattern it so that m = 1. On the other hand, after the solder reflow, the second solder pattern 15 on the electrode 5
It is only necessary to select ds / dm so that the height of the solder bump 28 is always higher than the gap g and pattern it. For example, when the gap g is 10 μm, the value of ds / dm may be set to 1.5 or more.

That is, the thickness h1 of the first solder from FIG.
And the underlying metal pattern 26 and the solder pattern 27
It can be understood that the height h2 of the solder bump 28 after the solder reflow can be controlled only by changing the area ratio of the solder bump 28.

Therefore, when the optical element mounting substrate shown in FIG. 2 is formed, the first solder pattern 14 on the silicon terrace 1a for fixing the optical element 9 and the solder bump 11 are electrically connected. Since the formation of each of the solder patterns having different functions, such as the second solder pattern 15 on the electrode 5 for obtaining the same, can be realized in a single process, the conventional optical element mounting substrate manufacturing process Can be reduced.

In this embodiment, the optical waveguide 21
Consists of optical fiber alignment grooves formed on the substrate 1. Therefore, in addition to the function of the optical element mounting board, the optical waveguide section 21 is constituted by the optical fiber alignment grooves formed on the silicon substrate 1, thereby realizing the optical element mounting board corresponding to the high-speed operation using the optical fibers. can do.

The optical waveguide section 21 is formed on the silicon substrate 1.
By using a silica glass optical waveguide consisting of a lower cladding layer, a core layer, and an upper cladding layer with a concave part, a low-loss optical waveguide is realized, and an optical element mounting board that supports high-speed operation is realized. can do.

Further, in this embodiment, as shown in FIG. 5, the fixing of the optical element 9 is performed by a thin-film soldering pattern 29 for fixing the optical element on the surface of the terrace portion 1a, and the electrical connection with the optical element is performed. Was carried out with a thick solder bump 30. As a result, the solder bumps for electrical connection can secure the fixing strength between the optical element and the optical element mounting board by the thin-film solder pattern while setting the area of the bonding portion small in order to reduce the capacitance. A hybrid optical integrated circuit that satisfies both the improvement in characteristics and the improvement in fixing strength can be realized.

Further, in the state before the hybrid optical integrated circuit is formed, the solder pattern 31 for fixing the optical element and the solder pattern 32 for the electrical connection are mounted on the optical element mounting board 33.
It can be formed on either the side or the optical element 9 side. That is, the following four cases are possible.

In the first case, as shown in FIG. 6, an optical element fixing solder pattern 31 and an electrical connection solder pattern 32 are used.
However, both may be formed on the optical element mounting substrate side.

In the second case, as shown in FIG. 7, a solder pattern 31 for fixing an optical element and a solder pattern 32 for electrical connection are used.
May be formed on the optical element side.

In the third case, as shown in FIG. 8, the optical element fixing solder pattern 31 may be formed on the optical element mounting board side, and the electrical connection solder pattern 32 may be formed on the optical element side.

In the fourth case, as shown in FIG. 9, the optical element fixing solder pattern 31 may be formed on the optical element side, and the electrical connection solder pattern 32 may be formed on the optical element mounting board side.

In other words, the structure of the hybrid optical integrated circuit shown in FIG. 5 allows the solder to be formed first to be formed on either the optical element mounting substrate side or the optical element side. The formation of the solder pattern suitable for the process can be selected with a high degree of freedom.

The configuration of the hybrid optical integrated circuit shown in FIG. 5 is roughly as follows.

This hybrid optical integrated circuit has an optical element mounting board (see FIGS. 1 to 3) provided with an optical waveguide section 21, an optical element mounting section 23, and an electric wiring section 22, and is mounted on the optical element mounting section. (See FIG. 5). Also, as described above, the optical element mounting portion is
It has a terrace portion 1a having a convex portion with a flat upper surface, and an electrode portion 1b formed so that the surface is lower than the surface of the terrace portion. An electrode pattern connected to the electric wiring pattern of the electric wiring part is formed on the electrode part 1b.
The optical element 9 is connected and fixed to the terrace portion 1a by a solder pattern 29 having a thickness d1, and is also fixed and connected to an electrode portion by a solder bump 30 having a thickness d2. A relation of d1 <d2 is established between them.

Further, in the present embodiment, the optical element mounting substrate includes the silicon substrate 1 having the unevenness on the surface.
The terrace portion 1a is composed of a convex portion of a silicon substrate, and the electrode portion 1b is composed of a concave portion of the silicon substrate and a dielectric layer formed thereon. In other words, when the optical element mounting substrate that constitutes the hybrid optical integrated circuit is a silicon substrate, the terrace is composed of a convex portion of the silicon substrate.
Can function as a heat sink. The optical element 9 constituting this hybrid optical integrated circuit is thermally connected to the silicon terrace portion 1a via the optical element fixing solder pattern 31, so that the heat sink effect is further improved. The electric wiring pattern 4 and the electrode 5
Is formed on the dielectric layer 3 on the silicon substrate concave portion 1b, it is possible to form low-capacity electric wiring and electrodes, and to realize a hybrid optical integrated circuit suitable for high-speed operation.

The optical waveguide section 21 is formed on the silicon substrate 1.
The optical fiber alignment groove 24 formed above can be used. In this case, a hybrid optical integrated circuit corresponding to high-speed operation using an optical fiber can be realized. Alternatively, the optical waveguide 21 may be formed of a silica glass optical waveguide including a lower clad layer, a core layer, and an upper clad layer formed on a concave portion of a silicon substrate. In this case, it is possible to realize a hybrid optical integrated circuit having a low-loss optical waveguide and further supporting high-speed operation.

Hereinafter, embodiments of the optical element mounting substrate and the hybrid optical integrated circuit of the present invention will be described in more detail with reference to the drawings, but the present invention is not limited to these embodiments.

(Embodiment 1) FIGS. 10, 11, and 1
2 is an optical element 9 using the optical element mounting board according to the present invention.
1 shows a first embodiment in which an LD is mounted.
FIG. 10 is a perspective view of the optical element mounting board according to the first embodiment.
1 is a cross-sectional view taken along the line BB 'in FIG. 10, and FIG. 12 is a cross-sectional view for explaining a hybrid optical integrated circuit configured by mounting an optical element on an optical element mounting board.

In this embodiment, as shown in FIG. 10, the optical element mounting substrate is a silicon substrate 1 having an uneven surface.
, Two silicon terrace portions 1a having a convex portion having a flat upper end, and a concave portion 1b other than the silicon terrace portion.
Are provided. The height of the silicon terrace 1a is 1
0 μm, and an alignment mark 10
Is formed. On one concave portion 1b, the optical waveguide 2 is formed of a silica glass optical waveguide composed of a lower cladding layer, a core layer, and an upper cladding layer to form an optical waveguide portion 21. On the other concave portion 1b, a dielectric material is formed. Layer 3 is formed,
An electric wiring pattern 4 made of a 2 μm-thick Au vapor-deposited film is formed on the dielectric layer 3 to form an electric wiring section 22. Further, an optical element mounting portion 23 on which the electrode 5 is formed for mounting the optical element 9 and making electrical connection is formed in a part of the electric wiring pattern 4. As shown in FIG. 11, on the silicon terrace portion 1a, Ti / Pt / Au
And a first Au / Sn solder pattern 14 having a thickness of 4 μm are sequentially laminated with the same area. The electrode 5 was formed so as to cover an insulating film layer 6 made of a SiO2 sputtered film having an opening on a part of the electric wiring pattern 4 and a wider area including the opening of the insulating film layer 6. A second base metal pattern 17 made of Ti / Pt / Au and having a diameter of 50 μm;
A second metal layer having a diameter of 90 μm and a thickness of 4 μm formed so as to cover a wider area including the base metal pattern 17 of FIG.
Au / Sn solder patterns 15 are sequentially laminated. The first solder pattern 14 and the second solder pattern 15 were formed at the same time.

On the other hand, Ti / Pt / Au
An electrode 12 having a diameter of 50 μm is formed, and the Ti / Pt / A having the same area as the first base metal pattern 16 is formed.
A base metal pattern 18 made of u for fixing the LD and an alignment mark 13 are formed.

The height of the LD active layer 9a placed on the upper surface of the first solder pattern 14 on the silicon terrace portion 1a and the height of the optical waveguide core 2a of the optical element mounting board are set so as to match. . In the above design, the gap between the surface of the first solder pattern 14 on the silicon terrace 1a and the surface of the second solder pattern 15 on the electrode 5 is 8 μm,
On the other hand, since the height of the solder bump after the reflow of the second solder pattern 15 is known to be about 18 μm, the gap between the electrode 5 of the optical element mounting board and the electrode 12 of the LD is sufficiently formed by the solder bump 11. You can see that you can connect to.

The mounting method of the LD is such that the alignment mark 10 on the silicon terrace portion 1a and the L
Align the alignment mark 13 on the D surface,
The optical axis can be aligned simply by placing the LD on the silicon terrace 1a. Then, to suppress the displacement, L
Reflow solder while holding D down with a pickup. At this time, as shown in FIG. 12, the area of the first solder pattern 14 on the silicon terrace portion 1a depends on the area of the base metal pattern 16 and the base metal pattern 1 for fixing the optical element 9.
8, the first solder pattern 14 can fix the optical element 9 without changing its thickness. On the other hand, the second solder pattern 17 on the electrode 5
Become solder bumps 11 and can be electrically connected to the electrodes 12 of the LD.

As a result, as shown in FIG. 12, the provision of the optical element fixing portion by solder on the surface of the silicon terrace portion 1a further increases the fixing strength compared to the conventional optical element fixing by only solder bumps. In addition, it is possible to provide a reliable optical element mounting substrate and a hybrid optical integrated circuit with improved heat sink effect.

(Embodiment 2) FIG. 13 shows a second embodiment, in which an LD array having two active layers 9a is mounted as an optical element 9 using an optical element mounting board 33 according to the present invention. 1 shows a cross-sectional view of the hybrid optical integrated circuit shown in FIG.

The structure and design values are the same as in the first embodiment. Here, the optical element mounting substrate is formed so as to be in contact with the silicon terrace portion 1a even between the two active layers 9a of the LD array.

As is apparent from the result, it is possible to cope with the warpage of the optical element which is likely to occur as the array is formed.

Further, since the area of the portion in contact with the optical element is increased, the heat sink function is greatly improved.

The present embodiment is not limited to the number of arrays. For example, if it is desired to increase the fixing strength or increase the heat sink function, the required number of silicon terraces 1a and the first underlayer are required. Metal pattern 16 and the first
The solder pattern 14 may be formed on the optical device mounting board, and the optical device fixing base metal pattern 18 may be formed on the optical device side.

(Embodiment 3) FIGS. 14, 15 and 16 show
9 shows a third embodiment, in which two optical elements are mounted using the optical element mounting board according to the present invention. Each design value is almost the same as in the first embodiment. However, in the method of mounting a plurality of optical elements, no pressure is applied at the time of solder reflow, so that the thickness of the first solder pattern 14 for fixing the optical elements is smaller as the thickness of the first solder pattern 14 for fixing the optical elements is reduced in order to suppress the displacement of the optical elements due to the reflow. Good. Therefore, in the present embodiment, the thickness of the first solder pattern 14 and the second solder pattern 15 formed at the same time are set to 2 μm.

For mounting a plurality of optical elements, the first optical element 19a is first positioned with the alignment mark 10 as in the first embodiment, and then the first optical element 19a is formed on the silicon terrace portion 1a.
Is temporarily fixed with the solder pattern 14. The method of temporary fixing is
"Y. Nakasuga et al. 'Multi-c
hip Hybrid Integration on
PLC Platform using Passiv
e Alignment Technology '. Pr
oc. 1996 Electronic Company
onents and Technology Con
Reference, pp. 20-25, the temperature (Au / S) lower than the temperature at which the first solder pattern 14 and the second solder pattern 15 are reflowed.
n or less, about 280 degrees or less), and the first optical element 19a
Is temporarily fixed when it is held down by the pickup 20 (FIG. 1).
4). Next, the second optical element 19b is replaced with the first optical element 19b.
Temporarily fix in the same manner as in a (FIG. 15). Finally, in a nitrogen atmosphere which is desirable for the solder reflow condition, all of the first solder pattern 14 and the second solder pattern 15 are reflowed collectively without suppressing the optical element. At this time, the second solder pattern 15 on the substrate-side electrode 5 is
Is connected to the electrode 12 on the optical element side, and at the same time, the first solder pattern 14 on the silicon terrace portion 1a is also reflowed. Two optical elements can be mounted without raising (FIG. 16).

In this embodiment, the case where two optical elements are mounted has been described. However, when a plurality of optical elements are mounted, temporary fixing may be performed repeatedly by the number of mounted optical elements. It is not limited in any way.

As is apparent from the present embodiment, the introduction of the first solder pattern 14 on the silicon terrace portion 1a makes it possible to mount a plurality of optical elements by solder bumps as compared with the prior art. Was.

(Embodiment 4) FIG. 14 shows a fourth embodiment of the hybrid optical integrated circuit according to the present invention shown in FIG.
In this embodiment, a first solder pattern 14 for fixing the optical element 9 and a second solder pattern 15 for making electrical connection are first formed on the optical element 9 side. It shows the case. Each structure and set values of the optical element mounting board are the same as those in the first embodiment, and the mounting method of the optical element is also the same.

That is, finally, by adopting the structure of the hybrid optical integrated circuit shown in FIG. 18, the solder to be formed first may be formed on either the optical element mounting substrate side or the optical element side. Therefore, a solder forming process suitable for the manufacturing process can be selected with a high degree of freedom.

Therefore, first, the first solder pattern 14 and the second solder pattern 15 may both be formed on the optical element mounting substrate side, or the first solder pattern 14 and the second solder pattern 15 may be formed. May be formed on the optical element side, or the first
The solder pattern 14 may be formed on the optical element mounting substrate side, the second solder pattern 15 may be formed on the optical element side, the first solder pattern 14 may be formed on the optical element side, and the second solder pattern 15 may be formed on the optical element side. It may be formed on the element mounting substrate side.

Further, a plurality of optical elements may be mounted, or an array optical element may be used.

As described above, by configuring the hybrid optical integrated circuit according to the present invention, it was possible to realize an optical integrated circuit in which the fixing strength and the heat sink effect were further improved in thin-film solder. Furthermore, since the electrical connection with the optical element is made by solder bumps, the optical element suitable for high-speed operation can be mounted. Thus, compared to the conventional hybrid optical integrated circuit, the coexistence of solder forms with different functions,
It can be realized with the same optical integrated circuit.

(Embodiment 5) In Embodiments 1 to 4, the optical waveguide section 21 is not limited to a silica glass optical waveguide. For example, as shown in FIG. 25, an optical fiber
May be formed, or the optical waveguide may be formed of a dielectric.

[0074]

As described above, according to the present invention, an optical element suitable for high-speed operation can be mounted on a substrate having an optical waveguide while maintaining a sufficient fixing strength of the optical element. A mounting substrate and a hybrid optical integrated circuit can be realized.

Further, it is possible to simultaneously form a solder pattern for fixing the optical element and a solder pattern for making electrical connection with the optical element by the solder bump.

Further, it is possible to realize an optical element mounting board and a hybrid optical integrated circuit in which the heat sink function is greatly improved.

Further, a plurality of optical elements can be mounted by solder bumps.

According to the present invention, for example, a high-speed and high-performance hybrid integrated circuit required for optical communication can be realized.

[Brief description of the drawings]

FIG. 1 is a perspective view for explaining a schematic configuration of an optical element mounting substrate of the present invention and an optical element mounted on the substrate.

FIG. 2 is a sectional view taken along the line AA ′ of FIG.

FIG. 3 is a cross-sectional view of the optical device mounting board along the line AA ′ in FIG. 1 and on which the optical device is mounted.

FIG. 4A is a graph showing a relationship between a solder height after reflow and a ratio of a solder diameter to a base metal diameter, and FIG.
FIG. 3 is a schematic cross-sectional view for explaining a state before and after solder reflow.

FIG. 5 is a sectional view illustrating an example of a hybrid optical integrated circuit according to the present invention.

FIG. 6 is a cross-sectional view of an optical element mounting substrate and an optical element constituting the hybrid optical integrated circuit of the present invention.

FIG. 7 is a cross-sectional view of an optical element mounting substrate and an optical element constituting the hybrid optical integrated circuit of the present invention.

FIG. 8 is a cross-sectional view of an optical element mounting substrate and an optical element constituting the hybrid optical integrated circuit of the present invention.

FIG. 9 is a cross-sectional view of an optical element mounting substrate and an optical element constituting the hybrid optical integrated circuit of the present invention.

FIG. 10 is a perspective view for explaining a schematic configuration of an optical element mounting substrate of the present invention and an optical element mounted on the substrate (Example 1).

11 is a sectional view taken along the line BB 'in FIG.

FIG. 12 is a cross-sectional view of the optical element mounting substrate along the line BB ′ in FIG. 10 and on which the optical element is mounted.

FIG. 13 is a cross-sectional view of a hybrid optical integrated circuit for explaining a second embodiment of the present invention.

FIG. 14 is a sectional view of an optical element mounting substrate and an optical element for explaining a third embodiment of the present invention.

FIG. 15 is a cross-sectional view of an optical element mounting substrate and an optical element for explaining a third embodiment of the present invention.

FIG. 16 is a cross-sectional view of a hybrid optical integrated circuit for explaining a third embodiment of the present invention.

FIG. 17 is a sectional view of an optical element mounting board and an optical element for explaining a fourth embodiment of the present invention.

FIG. 18 is a cross-sectional view of a hybrid optical integrated circuit for explaining a fourth embodiment of the present invention.

FIG. 19 is a perspective view of an optical element mounting board and an optical element for explaining a fifth embodiment of the present invention.

FIG. 20 is a perspective view for explaining a schematic configuration of a conventional optical element mounting substrate and an optical element mounted on the substrate.

21 is a sectional view taken along the line CC ′ of FIG.

FIG. 22 is a side view of a conventional hybrid optical integrated circuit.

FIG. 23 is a cross-sectional view in which optical elements are aligned on a conventional optical element mounting board.

FIG. 24 is a cross-sectional view of a conventional optical element mounting substrate when solder is reflowed.

FIG. 25 is a cross-sectional view of a hybrid optical integrated circuit in which an optical element is mounted on a conventional optical element mounting board.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon substrate 1a Silicon terrace part 1b Silicon substrate concave part 2 Optical waveguide 2a Optical waveguide core 3 Dielectric layer 4 Electric wiring pattern 5 Substrate side electrode 6 Insulating film layer 7 Base metal pattern 8 Solder pattern 9 Optical element 9a Optical element core 10 Substrate side alignment mark 22 Solder bump 12 Optical element side electrode 13 Optical element side alignment mark 14 First solder pattern 15 Second solder pattern 16 First ground metal pattern 17 Second ground metal pattern 18 Optical element fixing ground Metal pattern 19a First optical element 19b Second optical element 20 Pickup 21 Optical waveguide section 22 Electrical wiring section 23 Optical element mounting section 24 Fiber alignment groove 25 Optical fiber 26 Base metal pattern 27 Solder pattern 28 Solder bump 29 Thin film solder pattern 30 Solder bump 31 For fixing optical element Solder pattern 33 optical element mounting substrate for field pattern 32 electrically connected

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Shinji Mino 3-19-2 Nishi Shinjuku, Shinjuku-ku, Tokyo Nippon Telegraph and Telephone Corporation

Claims (9)

[Claims] 1. An optical element mounting board comprising an optical waveguide section, an optical element mounting section, and an electric wiring section on the same substrate, wherein the optical element mounting section is provided with a convex portion having a flat upper surface. A terrace portion, and an electrode portion formed such that the surface is lower than the top surface of the terrace portion. Further, a first base metal pattern and a first solder pattern are sequentially formed on the top surface of the terrace portion. On the surface of the electrode part, on the electric wiring pattern connected to the electric wiring part, on the surface of the electrode part, an insulating film layer partially formed with an opening, and an opening of the insulating film layer, and A second base metal pattern formed so as to cover an area wider than the opening;
An electrode pattern is formed by sequentially laminating a second solder pattern formed so as to cover a larger area than the second base metal pattern including the base metal pattern of An optical element mounting substrate, wherein the height of the upper surface of the first solder pattern is set higher than the height of the surface of the second solder pattern on the electrode portion. 2. The method according to claim 1, wherein the same substrate is a silicon substrate having an uneven surface, the terrace portion is formed of a convex portion of the silicon substrate, and the electrode portion is formed on a concave portion of the silicon substrate. The optical element mounting substrate according to claim 1, further comprising: a dielectric layer formed on the substrate. 3. The method according to claim 1, wherein the thickness of the first solder pattern and the thickness of the second solder pattern are different from each other.
3. The optical element mounting board according to claim 1, wherein the thickness of the solder pattern is set to be equal. 4. The optical element mounting board according to claim 1, wherein said optical waveguide section comprises an optical fiber alignment groove formed on said same substrate. 5. The optical waveguide according to claim 1, wherein the optical waveguide comprises a silica glass optical waveguide including a lower clad layer, a core layer, and an upper clad layer formed on the concave portion of the same substrate. Item 4. The optical element mounting substrate according to any one of items 3. 6. A hybrid optical integrated circuit comprising: an optical element mounting board provided with an optical waveguide section, an optical element mounting section, and an electric wiring section; and an optical element mounted on the optical element mounting section. The optical element mounting portion has a terrace portion having a convex portion with a flat upper surface, and an electrode portion formed such that the surface is lower than the surface of the terrace portion, and on the electrode portion, An electrode pattern connected to an electric wiring pattern of the electric wiring portion is formed, and the optical element is connected and fixed to the terrace portion by a solder pattern having a thickness of d1, and a solder having a thickness of d2 and a solder having a thickness of d2. A hybrid optical integrated circuit which is fixedly connected by bumps, and wherein a relationship of d1 <d2 is established between the thickness d1 and the thickness d2. 7. The optical element mounting substrate includes a silicon substrate having irregularities on its surface, the terrace portion includes a convex portion of the silicon substrate, and the electrode portion includes a concave portion of the silicon substrate and a concave portion of the silicon substrate. 7. The hybrid optical integrated circuit according to claim 6, comprising a dielectric layer formed thereon. 8. The hybrid optical integrated circuit according to claim 6, wherein said optical waveguide comprises an optical fiber alignment groove formed on said silicon substrate. 9. The optical waveguide according to claim 6, wherein the optical waveguide comprises a silica glass optical waveguide including a lower clad layer, a core layer, and an upper clad layer formed on the concave portion of the silicon substrate. A hybrid optical integrated circuit according to claim 7.