JPH10124469A5 - - Google Patents

Info

Publication number
JPH10124469A5
JPH10124469A5 JP1997243744A JP24374497A JPH10124469A5 JP H10124469 A5 JPH10124469 A5 JP H10124469A5 JP 1997243744 A JP1997243744 A JP 1997243744A JP 24374497 A JP24374497 A JP 24374497A JP H10124469 A5 JPH10124469 A5 JP H10124469A5
Authority
JP
Japan
Prior art keywords
nodes
memory
topology
particular cluster
cluster
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1997243744A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10124469A (ja
Filing date
Publication date
Priority claimed from US08/720,368 external-priority patent/US5845071A/en
Application filed filed Critical
Publication of JPH10124469A publication Critical patent/JPH10124469A/ja
Publication of JPH10124469A5 publication Critical patent/JPH10124469A5/ja
Pending legal-status Critical Current

Links

JP9243744A 1996-09-27 1997-09-09 エラー閉じ込めノード・クラスタ Pending JPH10124469A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US720,368 1991-06-25
US08/720,368 US5845071A (en) 1996-09-27 1996-09-27 Error containment cluster of nodes

Publications (2)

Publication Number Publication Date
JPH10124469A JPH10124469A (ja) 1998-05-15
JPH10124469A5 true JPH10124469A5 (enExample) 2005-03-17

Family

ID=24893766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9243744A Pending JPH10124469A (ja) 1996-09-27 1997-09-09 エラー閉じ込めノード・クラスタ

Country Status (2)

Country Link
US (1) US5845071A (enExample)
JP (1) JPH10124469A (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5991893A (en) * 1997-08-29 1999-11-23 Hewlett-Packard Company Virtually reliable shared memory
JP2001515244A (ja) * 1997-09-05 2001-09-18 サン・マイクロシステムズ・インコーポレーテッド スケーリング可能な共用メモリ・マルチプロセッサ・システム
US6081876A (en) * 1997-09-22 2000-06-27 Hewlett-Packard Company Memory error containment in network cache environment via restricted access
US6154765A (en) 1998-03-18 2000-11-28 Pasocs Llc Distributed digital rule processor for single system image on a clustered network and method
US6449699B2 (en) 1999-03-29 2002-09-10 International Business Machines Corporation Apparatus and method for partitioned memory protection in cache coherent symmetric multiprocessor systems
JP2003330905A (ja) * 2002-05-14 2003-11-21 Nec Corp コンピュータシステム
JP4023441B2 (ja) * 2003-12-09 2007-12-19 日本電気株式会社 コンピュータシステム及びプログラム
US7774562B2 (en) * 2004-09-17 2010-08-10 Hewlett-Packard Development Company, L.P. Timeout acceleration for globally shared memory transaction tracking table
US7644238B2 (en) 2007-06-01 2010-01-05 Microsoft Corporation Timestamp based transactional memory
CN101908186A (zh) * 2009-06-08 2010-12-08 北京西阁万投资咨询有限公司 一种信息系统
US8370595B2 (en) * 2009-12-21 2013-02-05 International Business Machines Corporation Aggregate data processing system having multiple overlapping synthetic computers
US8364922B2 (en) * 2009-12-21 2013-01-29 International Business Machines Corporation Aggregate symmetric multiprocessor system
WO2011076599A1 (en) * 2009-12-21 2011-06-30 International Business Machines Corporation Aggregate symmetric multiprocessor system
US9041428B2 (en) 2013-01-15 2015-05-26 International Business Machines Corporation Placement of storage cells on an integrated circuit
US9201727B2 (en) 2013-01-15 2015-12-01 International Business Machines Corporation Error protection for a data bus
US9021328B2 (en) 2013-01-15 2015-04-28 International Business Machines Corporation Shared error protection for register banks
US9043683B2 (en) 2013-01-23 2015-05-26 International Business Machines Corporation Error protection for integrated circuits
US11520640B2 (en) * 2020-01-30 2022-12-06 Alibaba Group Holding Limited Efficient and more advanced implementation of ring-AllReduce algorithm for distributed parallel deep learning

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63253468A (ja) * 1987-04-10 1988-10-20 Hitachi Ltd ベクトル処理装置
US5315549A (en) * 1991-06-11 1994-05-24 Dallas Semiconductor Corporation Memory controller for nonvolatile RAM operation, systems and methods
US5394554A (en) * 1992-03-30 1995-02-28 International Business Machines Corporation Interdicting I/O and messaging operations from sending central processing complex to other central processing complexes and to I/O device in multi-system complex
FR2694120B1 (fr) * 1992-07-24 1994-09-23 Sgs Thomson Microelectronics Circuit de gestion de mots mémoires.

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