JPH10123214A - Test method of logic circuit and logic circuit device including test circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable testing of all wires where a signal passes in normal operation by providing a test circuit where the connection of a plurality of multiplexers is switched by a control signal. SOLUTION: A signal path until a signal outputted from the output terminal of a circuit block 1 is inputted to a multiplexer MUX1 can be tested by taking out a signal from an external output terminal 11 via a multiplexer MUX3. Then, a signal path where the output signal of the circuit block 1 is inputted to the multiplexer MUX1 and the signal is inputted to the multiplexer MUX2 is tested by taking out the signal from an external output terminal 12 via a multiplexer MUX4, thus testing of a signal path that cannot be tested by a conventional test circuit can be effected and the reliability in testing is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for testing a logic circuit and a logic circuit device including the test circuit, and is particularly suitable for testing a logic circuit including a circuit block in which an input terminal and an output terminal are connected in a loop. About things.

[0002]

2. Description of the Related Art A logic circuit includes a circuit block 1 having an input terminal and an output terminal connected in a loop as shown in FIG.
May be included. In such a logic circuit, since the number of external terminals in the entire package is limited, it is necessary to share the external terminals when each circuit block is divided and tested.

FIG. 3 shows a configuration of a conventional test circuit added for testing the circuit block 1. This test circuit outputs an interface signal of a circuit block 1 in which an input terminal and an external terminal are loop-connected by a signal line 2,
This is for inputting from an external input terminal or taking out from an external output terminal for observation. According to the control signal TMODE input to the control terminal, the multiplexer MUX11 connects the input terminal on the “0” side and the output terminal of the circuit block 1 in a normal operation mode to make a loop connection, and in the test mode, connects the “1” side in the test mode. The input terminal is connected to the output terminal, and the test signal input from the external input terminal 31 via the input buffer 33 is input to the input terminal of the circuit block 1. Multiplexer MU
X12 connects the input terminal on the “0” side and the output terminal in accordance with the control signal TMODE, and in the normal operation mode, outputs the external output terminal 3 by the signal output from the circuit block 1.
In the test mode, the input terminal on the “1” side is connected to the output terminal, and the output signal from the circuit block 1 is output from the external output terminal 32 via the output buffer 34 to the outside. It is for taking out and observing.

[0004] Such multiplexers MUX11, MUX
By adding the UX 12 to the circuit block 1, the external input terminal 31 and the external output terminal 32 are shared with another circuit block (not shown), and are divided into other circuit blocks to perform a test on the circuit block 1. Signal input,
In addition, the output signal from the circuit block 1 can be observed.

[0005]

However, the conventional test circuit has the following problems. In FIG. 3, a signal line 41 between the input side of the multiplexer MUX12 and the input side of the multiplexer MUX11 in the signal line 2 for loop-connecting the input terminal and the output terminal of the circuit block 1
It was not possible to test whether there was any abnormality such as disconnection or short circuit, and whether the signal input from the input terminal on the “0” side of the multiplexer MUX11 was correctly output from the output terminal.

The present invention has been made in view of the above circumstances, and when testing a circuit block in which an output terminal and an input terminal are loop-connected, not only the circuit block but also a wiring through which a signal passes in normal operation. It is an object of the present invention to provide a logic circuit test method and a logic circuit device including a test circuit that can test all of the above.

[0007]

A logic circuit device according to the present invention includes a logic circuit including at least one circuit block in which an output terminal and an input terminal are connected in a loop, and a test circuit for testing the logic circuit. A first multiplexer having one of the two input terminals connected to the output terminal of the circuit block and the other connected to a first external input terminal; and one of the two input terminals connected to the first input terminal. A second multiplexer having an output terminal connected to the output terminal of the circuit block, the other terminal connected to the second external input terminal, and an output terminal connected to the input terminal of the circuit block; and one of the two input terminals connected to the circuit. A third multiplexer connected to an output terminal of the block and having an output terminal connected to a first external output terminal; and one of two input terminals connected to an output terminal of the first multiplexer. Are connected, and a fourth multiplexer coupled to the output terminal to the second external output terminal,
The test circuit is characterized in that the test circuit switches connection of the first, second, third and fourth multiplexers by a control signal.

Here, the connection state of the first to fourth multiplexers is such that when a signal input from the first external input terminal is input to the circuit block, an input from the first external input terminal is performed. When the input signal is input to the circuit block via the first multiplexer and the second multiplexer, and the signal input from the second external input terminal is input to the circuit block, the second signal is input to the circuit block. The connection state of the first and second multiplexers is switched so that a signal input from an external input terminal of the first and second multiplexers is input to the circuit block via the second multiplexer, and is output from the circuit block. When extracting the output signal from the first external output terminal, the signal output from the circuit block is output through the third multiplexer. Taken from the first external output terminal,
When extracting the signal output from the circuit block from the second external output terminal, the signal output from the circuit block is extracted from the second external output terminal via the first and fourth multiplexers. So that
The connection state of the first, third and fourth multiplexers is switched.

A method of testing a logic circuit according to the present invention is a method for testing a logic circuit including at least one circuit block in which an output terminal and an input terminal are loop-connected by a signal line. A first multiplexer and a second multiplexer are serially connected to the signal line in order from the output terminal side.
The first input terminal of the first multiplexer is connected to the first external input terminal, and the other input terminal of the second multiplexer is connected to the other input terminal of the first multiplexer. Connected to the second external input terminal, connected to one input terminal of a third multiplexer to the output terminal of the circuit block, connected to the output terminal to the first external output terminal, and connected to the output of the first multiplexer. One input terminal of the fourth multiplexer is connected to the terminal, and the output terminal is connected to the second external output terminal. In the first test mode, the other input terminal of the first multiplexer is connected to the output terminal. And controlling the connection state so that one input terminal and the output terminal of the second multiplexer are connected to each other, and outputting a signal input from the first external input terminal. In the second test mode, a connection state is controlled so that the other input terminal and the output terminal of the second multiplexer are connected, and an input from the second external input terminal is performed. The obtained signal is input to the circuit block, and in a third test mode,
The connection state is controlled so that one input terminal and the output terminal of the third multiplexer are connected, a signal output from the circuit block is taken out from the first external output terminal and observed, In the test mode 4, the connection state is controlled such that one input terminal and the output terminal of the first multiplexer are connected, and one input terminal and the output terminal of the fourth multiplexer are connected. And outputs the signal output from the circuit block to the second
And taken out from the external output terminal for observation.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a configuration of a logic circuit device including a test circuit according to the present embodiment. This logic circuit device
A circuit block 1 in which an input terminal and an output terminal are connected in a loop, external input terminals 13 and 14, and an external output terminal 11
And 12 and a test circuit added to test the circuit block 1. The test circuit is
It has four multiplexers MUX1 to MUX4, two input buffers 19 and 20, and two output buffers 21 and 22.

The input terminal on the “0” side of the multiplexer MUX 1 is connected to the output terminal of the circuit block 1, and the input terminal on the “1” side is connected via the input buffer 19 to the external input terminal 1.
3 is connected. "0" of the multiplexer MUX2
The input terminal on the side is connected to the output terminal of the multiplexer MUX1, the input terminal on the “1” side is connected to the external input terminal 14 via the input buffer 20, and the output terminal is connected to the input terminal of the circuit block 1. . Multiplexer MU
The input terminal on the “1” side of X3 is connected to the output terminal of the circuit block 1, the input terminal on the “0” side is connected to another circuit block (not shown), and the output terminal is connected via the output buffer 21. Connected to the external output terminal 11.
The input terminal on the “1” side of the multiplexer MUX 4 is connected to the output terminal of the multiplexer MUX 1, the input terminal on the “0” side is connected to another circuit block, and the output terminal is an external output terminal via the output buffer 22. 12 is connected. Thus, multiplexers MUX3 and MUX3
By using UX4, the external output terminals 11 and 12 provided in the device can be shared with other circuit blocks. The connection state of the multiplexers MUX1 and MUX3 is switched by inputting the control signal TMODE1 to each control terminal, and the multiplexers MUX2 and MUX3 are switched.
The connection state of X4 is switched by the control signal TMODE2.

In the normal operation mode, control signals TMODE1 and TMODE2 both having a logic "0" are input to the control terminals of the multiplexers MUX1 to MUX4, and the input terminal and the output terminal on the "0" side are connected. The output terminal of the circuit block 1 is connected to the multiplexers MUX1 and MU
A loop connection is made to the input terminal via X2, and normal operation is performed.

In the test mode, there are a case where a test signal is input to the circuit block 1 and a case where a signal output from an output terminal of the circuit block 1 is taken out and observed.

First, when a test signal is input from the external input terminal 13, the control signal TMODE1 is set to logic "1",
The control signal TMODE2 is set to logic "0". As a result, the multiplexers MUX1 and MUX3 have their input terminals connected to the "1" side and their output terminals.
UX2 and MUX4 are connected to an input terminal and an output terminal on the “0” side. External input terminal 13 to input buffer 19
Is input to the multiplexer MU.
It is input to the circuit block 1 via X1 and MUX2. When a test signal is input from the external input terminal 14, the control signal TMODE1 is set to logic "0" and the control signal TM
ODE2 is set to logic "1". As a result, the multiplexers MUX1 and MUX3 have their input terminals connected to the “0” side and their output terminals, and the multiplexers MUX2 and MUX3
UX4 has an input terminal on the “1” side connected to an output terminal. The test signal input from the external input terminal 14 via the input buffer 20 is input to the circuit block 1 via the multiplexer MUX2. When the output signal from the circuit block 1 is taken out from the external output terminal 11, the control signal TMODE1 is set to logic "1" and the control signal TM
ODE2 is set to logic "0". Multiplexer MU
The input terminals on the “1” side of X1 and MUX3 are connected to the output terminals, and “0” of multiplexers MUX2 and MUX4 are connected.
Connect the input terminal and output terminal on the side. Circuit block 1
Are output from the external output terminal 11 to the outside via the multiplexer MUX3 and the output buffer 21. When the output signal from the circuit block 1 is taken out from the external output terminal 12, the control signal TMODE1 is set to logic "0" and the control signal TMODE2 is set to logic "1". The input terminals on the “0” side of the multiplexers MUX1 and MUX3 are connected to the output terminals, and the input terminals on the “1” side of the multiplexers MUX2 and MUX4 are connected to the output terminals. As a result, the signal output from the circuit block 1 is transferred to the multiplexers MUX1 and MU
The signal passes through X4 and is output from the external output terminal 12 via the output buffer 22.

According to the present embodiment, not only is a test signal input from the outside to the circuit block 1 or a signal output from the circuit block 1 is taken out and observed, but also the circuit block 1 Can also test the path of the signal that passes when it performs normal operation. That is, the signal path from when the signal output from the output terminal of the circuit block 1 is input to the multiplexer MUX1 is tested by extracting the signal from the external output terminal 11 via the multiplexer MUX3. Next, a signal path from the output signal of the circuit block 1 to the multiplexer MUX1 to the multiplexer MUX2 is tested by extracting a signal from the external output terminal 12 via the multiplexer MUX4. As a result, it is possible to test a signal path that could not be tested by the conventional test circuit shown in FIG. 3, and the test reliability can be further improved.

The above-described embodiment is merely an example, and does not limit the present invention. For example, although the circuit shown in FIG. 1 includes input buffers 19 and 20 and output buffers 21 and 22, these may be provided as needed.

[0018]

As described above, according to the logic circuit test method and the logic circuit device including the test circuit of the present invention, the first and second loop wires connecting the input terminal and the output terminal of the circuit block are provided. 2 multiplexers are connected in series, and a third multiplexer is connected to the output terminal of the circuit block.
Fourth multiplexers are respectively added to the output terminals of the second multiplexer, and the quality of the signal path through which the signal output from the circuit block passes through the first multiplexer is determined.
A signal can be extracted from the fourth multiplexer to make a determination, and not only a circuit block but also a path through which a signal passes during normal operation can be tested, so that test reliability is improved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a logic circuit device including a test circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a circuit block to which the present invention can be applied.

FIG. 3 is a circuit diagram showing a configuration of a conventional logic circuit device including a test circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Circuit block 2 Signal line 11, 12 External output terminal 13, 14 External input terminal 19, 20 Input buffer 21, 22 Output buffer MUX1-MUX4 Multiplexer

Claims (3)

[Claims] 1. A logic circuit including at least one circuit block in which an output terminal and an input terminal are loop-connected, and a test circuit for testing the logic circuit, wherein one of two input terminals is connected to the logic circuit. A first multiplexer connected to the output terminal of the circuit block and the other connected to a first external input terminal; one of the two input terminals connected to the output terminal of the first multiplexer and the other A second multiplexer connected to two external input terminals and having an output terminal connected to the input terminal of the circuit block; and one of the two input terminals connected to the output terminal of the circuit block and the output terminal connected to the second terminal. A third multiplexer connected to one external output terminal; one of two input terminals connected to the output terminal of the first multiplexer, and an output terminal connected to the second external output terminal. And a fourth multiplexer coupled to the child, the first,
A test circuit in which the connection of the second, third and fourth multiplexers is switched by a control signal; and a logic circuit device including a test circuit. 2. When the signal inputted from the first external input terminal is inputted to the circuit block, the signal inputted from the first external input terminal is inputted to the first multiplexer and the second multiplexer. When a signal input to the circuit block via a multiplexer and a signal input from the second external input terminal is input to the circuit block, a signal input from the second external input terminal is input to the second external input terminal. When the connection state of the first and second multiplexers is switched so as to be input to the circuit block via a multiplexer, and when the signal output from the circuit block is taken out from the first external output terminal , A signal output from the circuit block is taken out from the first external output terminal via the third multiplexer, and the signal is output from the circuit block. When extracting the signal output from the second external output terminal, the signal output from the circuit block is extracted from the second external output terminal via the first and fourth multiplexers. 2. The logic circuit device including a test circuit according to claim 1, wherein the connection states of the first, third, and fourth multiplexers are switched. 3. A method for testing a logic circuit including at least one circuit block in which an output terminal and an input terminal are loop-connected by a signal line, the method comprising: Connecting one input terminal and the output terminal of each of the first multiplexer and the second multiplexer in series, connecting the other input terminal of the first multiplexer to the first external input terminal, The other input terminal of the second multiplexer is connected to the second external input terminal, the one input terminal of the third multiplexer is connected to the output terminal of the circuit block, and the output terminal is connected to the first external output terminal. And a fourth terminal connected to the output terminal of the first multiplexer.
One input terminal of the multiplexer is connected and the output terminal is connected to the second external output terminal. In a first test mode, the other input terminal and the output terminal of the first multiplexer are connected, and And a connection state is controlled such that one input terminal and the output terminal of the second multiplexer are connected, and a signal input from the first external input terminal is input to the circuit block, and a second test is performed. In the mode, the connection state is controlled so that the other input terminal and the output terminal of the second multiplexer are connected, and a signal input from the second external input terminal is input to the circuit block; In the third test mode, the connection state is controlled so that one input terminal and the output terminal of the third multiplexer are connected, and the signal output from the circuit block is output. In the fourth test mode, one input terminal of the first multiplexer is connected to the output terminal, and one input terminal of the fourth multiplexer is connected to the output terminal. A method for testing a logic circuit, wherein each connection state is controlled so as to be connected to a terminal, and a signal output from the circuit block is taken out from the second external output terminal and observed.