JPH10115671A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor integrated circuit in which the characteristics of an element can be measured throughout the assembling work of the chip without increasing and external terminal dedicated for measurement by changing the state of a tri-level logic buffer circuit depending on a signal from an element measurement/internal circuit switching external terminal. SOLUTION: A tri-level logic buffer circuit 11b for internal circuit is disabled through a decoder 9 while a tri-level logic butter circuit 11a for measurement is enabled by signals from element measurement/internal circuit switching external terminals 5a, 5b. Consequently, signals can be communicated between an element characteristics measuring circuit 8 and the outside through the external terminals 5a, 5b and the characteristics of an element can be measured. Furthermore, when the tri-level logic butter circuit 11b for internal circuit is enabled and the tri-level logic buffer circuit 11a for measurement is disabled, signals can be communicated between an internal circuit 6 and the outside through the external terminals 5a, 5b while disabling transmission of signal between the measuring circuit 8 and the external terminals 5a, 5b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device capable of measuring characteristics of elements (for example, transistors) constituting an internal circuit after assembling a semiconductor chip with a mold or the like. .

[0002]

2. Description of the Related Art As a semiconductor integrated circuit device, there is a semiconductor integrated circuit device having an element characteristic measuring circuit (TEG) including an element serving as a sample only for measuring an element such as a transistor constituting an internal circuit. Some of such semiconductor integrated circuit devices have a measurement circuit provided in a portion serving as a scribe line. In such a semiconductor integrated circuit device, since the measurement circuit is formed on the scribe line, there is an advantage that the degree of integration of the semiconductor integrated circuit device is not reduced or the chip size of the semiconductor integrated circuit device is not increased by the measurement circuit. There is.

In a semiconductor integrated circuit device having a measurement circuit, an electrode pad dedicated to measurement is used, a probe is set up, and a signal is transmitted between the measurement circuit and an external measurement circuit through the dedicated electrode pad. Some are designed to interact and measure.

[0004]

By the way, a measurement circuit serving as a sample for measuring the characteristics of the element is provided between a semiconductor integrated circuit device or a dedicated pad provided at a portion serving as a scribe line, and the measurement circuit is connected to the outside. Although a semiconductor integrated circuit device that exchanges signals with a semiconductor device can measure the characteristics of elements constituting an internal circuit when in a wafer state, it cannot measure the characteristics of the elements after being assembled with a mold or the like.

[0005] However, the characteristics of the element often change before and after assembly. Therefore, it is necessary to measure the characteristics of the device in a wafer state and the characteristics of the device in an assembling state, and to conduct a device characteristic fluctuation investigation such as a burn-in defect and a market defect of an assembled product. Has come to be recognized. However, it is not currently responding to this need.

In addition, the dedicated pad is connected to an external lead,
Signals may be exchanged between the measurement circuit and the outside through the external leads. However, in such a semiconductor integrated circuit device, characteristics are measured in order to perform measurement using a dedicated external lead. There is a problem that the number of pins for the measurement items increases.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and it is possible to measure the characteristics of elements such as transistors before and after chip assembly without increasing the number of external terminals dedicated to measurement. It is intended to provide an integrated circuit device.

[0008]

According to a first aspect of the present invention, there is provided a semiconductor integrated circuit device comprising: a circuit for measuring element characteristics; a ternary logic buffer circuit for an internal circuit connected between an external terminal and the internal circuit; A ternary logic buffer circuit for measurement connected between an external terminal and the element characteristic measuring circuit, an external terminal for element measurement / internal circuit switching, and a ternary logic for internal circuit in response to a signal from the external terminal for switching. A decoder in which the buffer circuit is enabled, the ternary logic buffer circuit for measurement is disabled, and the ternary logic buffer circuit for internal circuits is disabled, and the ternary logic buffer circuit for measurement is enabled, and a decoder, It is characterized by having.

Therefore, according to the semiconductor integrated circuit device of the first aspect, the ternary logic buffer circuit for the internal circuit is disabled through the decoder from the signal from the element measurement / internal circuit switching external terminal via the decoder, and the signal for the measurement is output. When the value logic buffer circuit is set to the enable measurement state, signals can be exchanged between the element characteristic measurement circuit and the outside through the external terminal, and the signal between the original internal circuit and the external terminal can be transmitted. Can not be transmitted. Therefore, the characteristics of the element can be measured.

In addition, when the three-valued logic buffer circuit for the internal circuit is enabled and the three-valued logic buffer circuit for measurement is disabled, a signal is exchanged between the original internal circuit and the outside through the external terminal. , And no signal can be transmitted between the measurement circuit and the external terminal. Accordingly, a state in which the original internal circuit operates can be obtained.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments.

FIGS. 1A to 1C show a first embodiment of a semiconductor integrated circuit device according to the present invention, wherein FIG. 1A is a plan view showing a completed assembled state, and FIG. FIG. 2C is a plan view showing a semiconductor chip, and FIG. 2C is a circuit diagram showing a main part of the embodiment.

In the drawings, reference numeral 1 denotes a semiconductor integrated circuit device,
2 is a package made of, for example, resin, 3 is a semiconductor chip sealed in the package 2, 4, 4,... Are external leads, and 4a, 4b are between an element characteristic measuring circuit and an internal circuit. Is an external lead for switching. 5,
Are electrode pads (corresponding to external terminals in the claims) connected to the external leads 4, 4,... Via connect wires (not shown). Among them, 5a,
5b is an electrode pad connected to the external leads 4a and 4b.

6 is an internal circuit, 7 is a region in which a decoder (9) and a buffer circuit group (10) described later are arranged,
Reference numerals 8, 8, 8, and 8 denote element characteristic measuring circuits (TEGs). Reference numeral 9 denotes a decoder which receives a 2-bit switching signal (a signal for switching between an element characteristic measuring circuit and an internal circuit) from the electrode pads 5a and 5b, and outputs a 4-bit signal according to the signal. Reference numeral 10 denotes a group of buffer circuits which are controlled to be disabled or enabled by the 4-bit output.
Buffer circuit 1 including a pair of ternary logic circuits 12 and 12
, 11b, 11b,...

Each buffer circuit 11a is interposed between a normal electrode pad (electrode pad for exchanging signals with an internal circuit) 5 and a circuit 8 for measuring element characteristics. It is interposed between the ordinary electrode pad 5 and the internal circuit 6. Then, each of the buffer circuits 11a, 11
b denotes that one of a pair of ternary logic circuits 12 constituting the element characteristic measuring circuit 12
Alternatively, it has a role of permitting or prohibiting the transmission of a signal to the internal circuit 6, and the other 12 permits or prohibits the transmission of a signal from the element characteristic measuring circuit 8 or the internal circuit 6 to the electrode pad 5. Take a role.

Next, the circuit operation will be described. When measuring the element characteristics, a switching signal for instructing the test mode is input through the external terminals 4a and 4b. Then, the decoder 9 supplies the buffer circuit group 10 with a signal for disabling the buffer circuits 11a, 11a,... And disabling the buffer circuits 11b, 11b,. As a result, the buffer circuit 11a enters a state where signals can be exchanged between the electrode pad 5, the external lead 4, and the element characteristic measuring circuit 8. On the other hand, the electrode pad 5,
Signals cannot be exchanged between the external lead 4 and the internal circuit 6. This is because the buffer circuit 11b is disabled, and its ternary logic circuit 12, 12 has a high impedance on the output side regardless of whether the input signal is "1" or "0". Thus, the device characteristics can be measured without any trouble.

When the internal circuit 6 is operated without measuring the element characteristics, a switching signal for instructing the normal mode is input through the external terminals 4a and 4b. Then, the decoder 9 supplies a signal to the buffer circuit group 10 to enable the buffer circuits 11b, 11b,... And to disable the buffer circuits 11a, 11a,. As a result, the electrode pad 5, the external lead 4
Then, a signal can be exchanged with the internal circuit 6. On the other hand, the electrode pad 5, the external lead 4,
Signals cannot be exchanged with the element characteristic measuring circuit 8. This is because the buffer circuit 11a is disabled, and its ternary logic circuit 12, 12 has a high impedance on the output side regardless of whether the input signal is "1" or "0". Thus, the internal circuit 6 can operate without any trouble.

The number of external terminals (the number of electrode pads and the number of lead pins) required to enable measurement after assembling of the semiconductor chip is only two for inputting a switching signal, and other data is exchanged. Can use an external terminal for the original internal circuit 6. Therefore,
In addition, it is possible to measure the element characteristics after assembling the semiconductor chip without increasing the number of external terminals.

FIG. 2 is a plan view of a semiconductor chip 3 showing a modification of the semiconductor integrated circuit device shown in FIG. In the present semiconductor integrated circuit device, the element characteristic measuring circuit 8 is provided also in an empty space inside the region 7. By devising the arrangement in this way, it is possible to prevent the influence of, for example, a wiring delay. Needless to say, the semiconductor integrated circuit devices shown in FIGS. 1 and 2 are merely examples to the extent that they are tired, and the arrangement of element characteristic measuring circuits and the like, the arrangement of switching signal input external terminals, and the like are as shown in FIGS. It is not limited and can be implemented in various ways.

[0020]

According to the semiconductor integrated circuit device of the first aspect, the signal from the element measurement / internal circuit switching terminal disables the ternary logic buffer circuit for the internal circuit via the decoder and the ternary logic circuit for measurement. By setting the logic buffer circuit to a measurement state in which it is enabled, signals can be exchanged between the element characteristic measurement circuit and the outside through the external terminal, and the signal between the original internal circuit and the external terminal can be transmitted. Can not be transmitted. Therefore, the characteristics of the element can be measured.

Also, by setting the ternary logic buffer circuit for the internal circuit to be enabled and the ternary logic buffer circuit for measurement to be disabled in a normal use state, a signal between the original internal circuit and the outside is provided through an external terminal. Can be exchanged, and no signal can be transmitted between the measurement circuit and the external terminal. Accordingly, a state in which the original internal circuit operates can be obtained.

The external terminals (electrode pads and lead pins) required for enabling measurement after assembling the semiconductor chip are only external terminals for inputting a switching signal, and exchange of data signals is performed by the internal circuit. External terminals for 6 can be used. Therefore, it is possible to measure the element characteristics after assembling the semiconductor chip without increasing the number of external terminals.

[Brief description of the drawings]

FIGS. 1A to 1C show a first embodiment of a semiconductor integrated circuit device of the present invention, wherein FIG. 1A is a plan view showing a completed state after assembly, and FIG. FIG. 2C is a plan view showing a chip, and FIG. 2C is a circuit diagram showing a main part of the embodiment.

FIG. 2 is a plan view of a semiconductor chip showing a modification of the semiconductor integrated circuit device shown in FIG.

[Explanation of symbols]

1 ... Semiconductor integrated circuit device, 3 ... Semiconductor chip,
5, 5a, 5b: external terminal, 6: internal circuit, 8
... Element characteristic measurement circuit, 9 ... Decoder, 11
a, 11b... Buffer circuits.

Claims (1)

[Claims] An element characteristic measuring circuit for measuring an element constituting an internal circuit of a semiconductor integrated circuit device, an internal circuit ternary logic buffer circuit connected between an external terminal and the internal circuit. A ternary logic buffer circuit for measurement connected between the external terminal and the element characteristic measurement circuit, an element measurement / internal circuit switching external terminal, and a signal from the element measurement / internal circuit switching external terminal. Accordingly, the ternary logic buffer circuit for the internal circuit is enabled, the ternary logic buffer circuit for the measurement is disabled, the ternary logic buffer circuit for the internal circuit is disabled, and the ternary logic buffer circuit for the measurement is enabled. A semiconductor integrated circuit device having at least: