JPH1011157A - Temperature control circuit and semiconductor integrated circuit - Google Patents
Temperature control circuit and semiconductor integrated circuitInfo
- Publication number
- JPH1011157A JPH1011157A JP8167360A JP16736096A JPH1011157A JP H1011157 A JPH1011157 A JP H1011157A JP 8167360 A JP8167360 A JP 8167360A JP 16736096 A JP16736096 A JP 16736096A JP H1011157 A JPH1011157 A JP H1011157A
- Authority
- JP
- Japan
- Prior art keywords
- temperature
- control circuit
- temperature sensor
- circuit
- temperature control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/01—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using semiconducting elements having PN junctions
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05D—SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES
- G05D23/00—Control of temperature
- G05D23/19—Control of temperature characterised by the use of electric means
- G05D23/20—Control of temperature characterised by the use of electric means with sensing elements having variation of electric or magnetic properties with change of temperature
- G05D23/24—Control of temperature characterised by the use of electric means with sensing elements having variation of electric or magnetic properties with change of temperature the sensing element having a resistance varying with temperature, e.g. a thermistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Automation & Control Theory (AREA)
- Semiconductor Integrated Circuits (AREA)
- Control Of Temperature (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は温度制御回路に関す
るもので、特に、動作速度や使用環境の変化によるチッ
プ温度の変動を抑制することのできるＣＭＯＳ構成の温
度制御回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a temperature control circuit, and more particularly to a temperature control circuit having a CMOS structure capable of suppressing a change in a chip temperature due to a change in an operating speed or a use environment.
【０００２】[0002]
【従来の技術】半導体集積回路は一般に熱により特性が
変化するという性質がある。このため、半導体集積回路
においては、温度による特性の変動が大きな問題とな
り、極力温度変動が少なくなるように環境温度が制御さ
れる。一方、半導体集積回路自体の温度は半導体集積回
路の動作速度（クロック）や使用環境により大きく変化
する。2. Description of the Related Art Generally, a semiconductor integrated circuit has a property that its characteristics are changed by heat. For this reason, in a semiconductor integrated circuit, variation in characteristics due to temperature becomes a significant problem, and the environmental temperature is controlled so as to minimize temperature variation. On the other hand, the temperature of the semiconductor integrated circuit itself greatly changes depending on the operating speed (clock) of the semiconductor integrated circuit and the use environment.
【０００３】このため、半導体集積回路の温度を一定に
するために、種々の手法が採用される。For this reason, various techniques are employed to keep the temperature of the semiconductor integrated circuit constant.
【０００４】まず、第１の手法は、ファンによる空冷や
冷却水等による水冷を行い、あるいはヒータを用いて加
熱を行う技術である。First, the first technique is a technique of performing air cooling with a fan, water cooling with cooling water, or the like, or heating using a heater.
【０００５】この技術では、ファンの回転速度、冷却媒
体の流量、ヒータへの通電電力を制御することにより、
比較的容易に冷却や加熱を制御することができる。In this technique, by controlling the rotation speed of the fan, the flow rate of the cooling medium, and the power supplied to the heater,
Cooling and heating can be controlled relatively easily.
【０００６】第２の手法は半導体集積回路上にハイレベ
ルとローレベルの間を入力クロックで遷移するトグルフ
リップフロップのような回路を設けるようにし、この回
路の動作数や入力クロックのスピードを変化させること
により消費電流をフィードバック制御し、チップの温度
を制御する技術である。A second method is to provide a circuit such as a toggle flip-flop that transitions between a high level and a low level by an input clock on a semiconductor integrated circuit, and changes the number of operations of this circuit and the speed of the input clock. This is a technique for controlling the temperature of the chip by performing feedback control of the current consumption by controlling the temperature.
【０００７】[0007]
【発明が解決しようとする課題】しかしながら、第１の
手法では冷却装置や加熱装置の価格が高く、しかもメン
テナンスの必要もある。これらの冷却装置や加熱装置を
半導体集積回路の外部に設ける場合はその実装スペース
が必要となり、システムの大型化を招くという問題があ
る。However, in the first method, the cost of the cooling device and the heating device is high, and maintenance is required. When these cooling devices and heating devices are provided outside the semiconductor integrated circuit, a space for mounting them is required, and there is a problem that the size of the system is increased.
【０００８】また、第２の手法ではオンチップで形成さ
れたトグルフリップフロップをオン／オフするので、ト
グル動作の際に発生したノイズがチップ内部の論理回路
に対してクロストークやジッタを発生させ、内部論理回
路の誤動作を引き起こすという問題がある。また、計測
機器のように高度のタイミング精度が要求されるシステ
ムにこのようなトグルフリップフロップが使用されると
発生するノイズによる計測精度の低下を招くという問題
がある。さらに、この手法を実現するためには、チップ
温度を測定して、動作させるべきトグルフリップフロッ
プの数や入力クロックの速度を調整するための制御回路
をオンチップあるいはチップ外に設ける必要がある。ま
た、この手法によるフィードバックシステムではチップ
の温度が変化してから制御回路が作動して消費電流を変
え、元のチップ温度に復帰するまでに多くの時間経過が
必要で、迅速な応答性に欠けるという問題がある。In the second method, a toggle flip-flop formed on-chip is turned on / off, so that noise generated at the time of the toggle operation causes crosstalk and jitter to occur in a logic circuit inside the chip. However, there is a problem that a malfunction of the internal logic circuit is caused. Further, when such a toggle flip-flop is used in a system that requires a high degree of timing accuracy, such as a measuring instrument, there is a problem in that measurement noise is reduced due to noise generated. Furthermore, in order to realize this method, it is necessary to provide a control circuit for measuring the chip temperature and adjusting the number of toggle flip-flops to be operated and the speed of the input clock on-chip or off-chip. In addition, in the feedback system using this method, the control circuit operates to change the current consumption after the chip temperature changes, and it requires a long time to return to the original chip temperature, and lacks quick response. There is a problem.
【０００９】したがって、本発明はこのような点に鑑み
てなされたもので、冷却装置等を別途設けることなく、
使用環境の変化や回路動作速度が変化してもチップ温度
を迅速かつ安定に制御することができ、かつ誤動作を引
き起こすことなく、短い応答時間で温度制御を行うこと
のできる温度制御回路を提供することを目的とする。Therefore, the present invention has been made in view of such a point, and without separately providing a cooling device or the like,
Provided is a temperature control circuit that can quickly and stably control a chip temperature even when a use environment changes or a circuit operation speed changes, and that can perform temperature control with a short response time without causing a malfunction. The purpose is to:
【００１０】[0010]
【課題を解決するための手段】本発明にかかる温度制御
回路は、それぞれ異なる温度−抵抗特性を有する複数の
素子で構成される温度センサと、この温度センサの出力
電圧を入力することにより、前記出力電圧に応じて消費
電流を制御する制御回路とを備えたことを特徴とし、制
御回路での発熱量を温度センサの出力で制御することに
より、チップ温度を迅速かつ安定に制御することができ
る。SUMMARY OF THE INVENTION A temperature control circuit according to the present invention is characterized in that a temperature sensor composed of a plurality of elements having different temperature-resistance characteristics and an output voltage of the temperature sensor are input to the temperature control circuit. And a control circuit for controlling current consumption according to the output voltage. By controlling the amount of heat generated in the control circuit by the output of the temperature sensor, the chip temperature can be controlled quickly and stably. .
【００１１】前記温度センサは電源と設地間に直列接続
されたＭＯＳＦＥＴと抵抗で構成されると良く、前記制
御回路は前記温度センサの出力が共通にゲート入力さ
れ、電源と接地間にソース、ドレインが接続された複数
のＭＯＳＦＥＴで構成されるとよい。The temperature sensor may be composed of a MOSFET and a resistor connected in series between a power supply and a ground, and the control circuit is configured such that an output of the temperature sensor is commonly input to a gate, and a source is connected between the power supply and the ground. It is good to comprise a plurality of MOSFETs to which the drain was connected.
【００１２】前記複数のＭＯＳＦＥＴが一導電型であ
り、これら各一導電型ＭＯＳＦＥＴに常時オンとなる逆
導電型ＭＯＳＦＥＴが接続されたものであることが好ま
しい。It is preferable that the plurality of MOSFETs are of one conductivity type, and that each of the one conductivity type MOSFETs is connected to a reverse conductivity type MOSFET which is always on.
【００１３】ＭＯＳＦＥＴがそれぞれゲート幅が異な
り、所定の選択信号で選択的に導通する複数のＭＯＳＦ
ＥＴが並列接続されたものとすれば、制御目標温度や回
路の特性に応じて制御を行うことができる。A plurality of MOSFETs, each having a different gate width and selectively conducting by a predetermined selection signal.
If the ETs are connected in parallel, control can be performed according to the control target temperature and circuit characteristics.
【００１４】それぞれ異なる温度−抵抗特性を有する複
数の素子で構成される温度センサと、この温度センサの
出力電圧を入力することにより、前記出力電圧に応じて
消費電流を制御する制御回路とを同一基板上に備えた半
導体集積回路は温度特性にすぐれ、従来のＭＯＳＦＥＴ
のスイッチングにより発生するノイズを低減でき、かつ
温度制御のための回路構成を簡略化できる。A temperature sensor composed of a plurality of elements having different temperature-resistance characteristics, and a control circuit for controlling the current consumption in accordance with the output voltage by inputting the output voltage of the temperature sensor are the same. The semiconductor integrated circuit on the substrate has excellent temperature characteristics
Can be reduced and the circuit configuration for temperature control can be simplified.
【００１５】[0015]
【発明の実施の形態】以下、図面を参照して本発明の実
施の形態のいくつかを説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Some embodiments of the present invention will be described below with reference to the drawings.
【００１６】図１は本発明の第１の実施の形態にかかる
温度制御回路の構成を示す回路図である。この回路は、
温度センサ１０と制御回路２０とからなっている。温度
センサ１０は、電源ＶDDと接地ＧＮＤ間に直列接続され
たＰチャネルＭＯＳＦＥＴ１と抵抗２により構成されて
おり、ＰチャネルＭＯＳＦＥＴ１のゲートは接地されて
いる。これによりＰチャネルＭＯＳＦＥＴは常時オン状
態となり、ＰチャネルＭＯＳＦＥＴ１と抵抗２の接続ノ
ードＡおよび出力線３に現れた電圧が温度検出出力とな
る。FIG. 1 is a circuit diagram showing a configuration of a temperature control circuit according to a first embodiment of the present invention. This circuit is
It comprises a temperature sensor 10 and a control circuit 20. The temperature sensor 10 includes a P-channel MOSFET 1 and a resistor 2 connected in series between a power supply VDD and a ground GND, and a gate of the P-channel MOSFET 1 is grounded. As a result, the P-channel MOSFET is always on, and the voltage appearing at the connection node A between the P-channel MOSFET 1 and the resistor 2 and the output line 3 becomes the temperature detection output.
【００１７】図２はこのような温度センサの出力特性を
示すグラフである。同図から明らかなように、出力ノー
ドＡにおける出力電圧Ｖｐは温度Ｔの上昇に応じて下降
し、温度Ｔの下降に応じて上昇する。これは、温度が上
昇した場合、ＰチャネルＭＯＳＦＥＴ１のオン抵抗が大
きくなるが、抵抗２はアルミニウム、ポリシリコン等で
形成されているため、その抵抗値の温度特性は無視でき
るためである。FIG. 2 is a graph showing the output characteristics of such a temperature sensor. As is clear from the figure, the output voltage Vp at the output node A decreases as the temperature T increases, and increases as the temperature T decreases. This is because when the temperature rises, the on-resistance of the P-channel MOSFET 1 increases, but since the resistor 2 is formed of aluminum, polysilicon, or the like, the temperature characteristic of the resistance value can be ignored.
【００１８】図１に戻り、制御回路２０は、Ｐチャネル
ＭＯＳＦＥＴ２１〜２Ｎとこれに対応してそれぞれ直列
接続されたＮチャネルＭＯＳＦＥＴ３１〜３Ｎが電源Ｖ
DDと接地ＧＮＤ間に接続され、ＰチャネルＭＯＳＦＥＴ
２１〜２Ｎのゲートは接地され、ＮチャネルＭＯＳＦＥ
Ｔ３１〜３Ｎのゲートは制御回路１０の出力ノード線３
に共通接続されている。この回路ではＰチャネルＭＯＳ
ＦＥＴ２１〜２Ｎのゲートは接地されているので、これ
らは常時オンであり、一方、ＮチャネルＭＯＳＦＥＴ３
１〜３Ｎのゲートには温度センサによる出力が与えられ
る。Returning to FIG. 1, the control circuit 20 comprises P-channel MOSFETs 21 to 2N and N-channel MOSFETs 31 to 3N respectively connected in series corresponding thereto.
P-channel MOSFET connected between DD and ground GND
The gates of 21 to 2N are grounded, and an N-channel MOSFE
The gates of T31 to T3N are connected to the output node line 3 of the control circuit 10.
Connected in common. In this circuit, a P-channel MOS
Since the gates of the FETs 21 to 2N are grounded, they are always on.
Outputs from the temperature sensors are given to the 1 to 3N gates.
【００１９】なお、この温度制御回路はＣＭＯＳを使用
していながら単純なＮチャネルＭＯＳ回路と似た構成と
なるが、上述したようにＰチャネルＭＯＳＦＥＴのゲー
トを接地レベルとしただけであるので、ＰチャネルＭＯ
ＳＦＥＴとＮチャネルＭＯＳＦＥＴとの接続点に現れる
出力はＮチャネルＭＯＳ回路のように接地レベルまで低
下することはない。しかし、この温度制御回路の出力は
次段の論理回路を制御するために使用するものではない
ので、問題はない。Although this temperature control circuit has a structure similar to a simple N-channel MOS circuit while using CMOS, since the gate of the P-channel MOSFET is merely set to the ground level as described above, Channel MO
The output appearing at the connection point between the SFET and the N-channel MOSFET does not drop to the ground level unlike the N-channel MOS circuit. However, there is no problem because the output of the temperature control circuit is not used for controlling the next-stage logic circuit.
【００２０】次に、図１の構成における動作を説明す
る。温度が上昇した場合、図２で説明したようにセンサ
１０の出力Ｖｐは低下する。この出力は制御回路２０の
各ＮチャネルＭＯＳＦＥＴ３１〜３Ｎのゲートに与えら
れるため、これらのドレイン−ソース電流ＩDSが減少す
る。この様子を図３のグラフに示す。Next, the operation of the configuration shown in FIG. 1 will be described. When the temperature increases, the output Vp of the sensor 10 decreases as described with reference to FIG. Since this output is applied to the gates of the N-channel MOSFETs 31 to 3N of the control circuit 20, these drain-source currents IDS decrease. This is shown in the graph of FIG.
【００２１】このＮチャネルＭＯＳＦＥＴ３１〜３Ｎは
発熱体として機能するものであるから、ドレイン−ソー
ス間電流ＩDSが減少することにより温度を下降させる作
用を行うので、この回路全体としての発熱量を抑え、チ
ップ温度を一定に制御することができる。Since the N-channel MOSFETs 31 to 3N function as heat generating elements, the N-channel MOSFETs 31 to 3N act to lower the temperature by reducing the drain-source current IDS. The chip temperature can be controlled to be constant.
【００２２】図４は本発明の第２の実施の形態を示す回
路図であって、温度センサ４０と制御回路５０とを備え
ている。FIG. 4 is a circuit diagram showing a second embodiment of the present invention, and includes a temperature sensor 40 and a control circuit 50.
【００２３】この回路では、温度センサ４０として、ド
レインが接地されたＮチャネルＭＯＳＦＥＴ４２のソー
スを抵抗４１を介して電源ＶDDに接続し、ＮチャネルＭ
ＯＳＦＥＴ４２のゲートにはＶDDが与えられたものを使
用している。In this circuit, as a temperature sensor 40, the source of an N-channel MOSFET 42 whose drain is grounded is connected to a power supply VDD via a resistor 41, and an N-channel M
The gate of the OSFET 42 is supplied with VDD.
【００２４】このような構成では、ＮチャネルＭＯＳＦ
ＥＴ４２は常時オン状態であり、ＮチャネルＭＯＳＦＥ
Ｔ４２と抵抗４１の接続点Ｂおよび出力線４３に温度に
応じた出力が発生する。この出力電圧をＶｎとすると、
温度Ｔと出力電圧をＶｎとの関係は、図５に示したよう
なグラフとなる。このグラフから明らかなように、温度
Ｔが上昇すると出力電圧Ｖｎは上昇する。これは、Ｎチ
ャネルＭＯＳＦＥＴ４２のオン抵抗が大きくなる一方
で、抵抗４１の温度依存性はそれがアルミニウム、ポリ
シリコンなどで形成されているため無視でき、したがっ
て出力電圧Ｖｎは、電源電圧ＶDDに近づくように変動す
るためである。逆に温度が下降した場合には、逆の作用
により、出力電圧ＶｎはＧＮＤ側にシフトすることにな
る。In such a configuration, the N-channel MOSF
ET42 is always on, and N-channel MOSFE
An output corresponding to the temperature is generated at the connection point B between the T42 and the resistor 41 and the output line 43. If this output voltage is Vn,
The relationship between the temperature T and the output voltage Vn is a graph as shown in FIG. As is clear from this graph, when the temperature T rises, the output voltage Vn rises. This is because while the on-resistance of the N-channel MOSFET 42 increases, the temperature dependence of the resistor 41 can be neglected because it is formed of aluminum, polysilicon, or the like, so that the output voltage Vn approaches the power supply voltage VDD. Because it fluctuates. Conversely, when the temperature decreases, the output voltage Vn shifts to the GND side due to the opposite effect.
【００２５】次に制御回路５０について説明する。Next, the control circuit 50 will be described.
【００２６】ＰチャネルＭＯＳＦＥＴ５１〜５Ｎとこれ
に対応してそれぞれ直列接続されたＮチャネルＭＯＳＦ
ＥＴ６１〜６Ｎが電源ＶDDと接地ＧＮＤ間に接続され、
ＮチャネルＭＯＳＦＥＴ６１〜６Ｎのゲートは接地さ
れ、ＰチャネルＭＯＳＦＥＴ５１〜５Ｎのゲートは温度
制御回路４０の出力ノード線４３に共通接続されてい
る。この回路ではＮチャネルＭＯＳＦＥＴ６１〜６Ｎの
ゲートは電源ＶDDに接続されているので、これらは常時
オンであり、一方、ＰチャネルＭＯＳＦＥＴ５１〜５Ｎ
のゲートには温度センサ４０により温度上昇時に電圧が
上昇した出力が与えられる。これにより、図６に示すよ
うに、ＰチャネルＭＯＳＦＥＴ５１〜５Ｎのドレイン−
ソース間電流ＩDSが減少する。このＰチャネルＭＯＳＦ
ＥＴ５１〜５Ｎは発熱体として機能するものであるか
ら、ドレイン−ソース間電流ＩDSが減少することによ
り、この回路全体としての発熱量を抑え、チップ温度を
一定に制御することができる。P-channel MOSFETs 51-5N and corresponding N-channel MOSFETs connected in series
ET61 to 6N are connected between the power supply VDD and the ground GND,
The gates of the N-channel MOSFETs 61 to 6N are grounded, and the gates of the P-channel MOSFETs 51 to 5N are commonly connected to the output node line 43 of the temperature control circuit 40. In this circuit, since the gates of the N-channel MOSFETs 61 to 6N are connected to the power supply VDD, they are always on, while the P-channel MOSFETs 51 to 5N
Is output from the temperature sensor 40 when the temperature rises. Thereby, as shown in FIG. 6, the drains of the P-channel MOSFETs 51 to 5N are
The source-to-source current IDS decreases. This P-channel MOSF
Since the ETs 51 to 5N function as heat generating elements, the amount of heat generated in the entire circuit can be suppressed and the chip temperature can be kept constant by reducing the drain-source current IDS.
【００２７】図７は本発明の第３の実施の形態を示す回
路図である。FIG. 7 is a circuit diagram showing a third embodiment of the present invention.
【００２８】この実施の形態においては、温度センサ１
０は図１で示したものと全く同じであるので、各構成部
分には図１の場合と同じ番号を付してその説明を省略す
る。In this embodiment, the temperature sensor 1
Since 0 is exactly the same as that shown in FIG. 1, each component is denoted by the same reference numeral as in FIG. 1, and description thereof is omitted.
【００２９】制御回路７０はＮチャネルＭＯＳＦＥＴ７
１〜７Ｎが電源ＶDDと接地ＧＮＤ間に並列に接続され、
これらの各ゲートが温度センサ１０の出力線３に共通接
続されている。The control circuit 70 includes an N-channel MOSFET 7
1 to 7N are connected in parallel between the power supply VDD and the ground GND,
These gates are commonly connected to the output line 3 of the temperature sensor 10.
【００３０】このような構成により、図１の場合と同様
に温度が上昇したときには温度センサ１０の出力Ｖｐが
低下し、ＮチャネルＭＯＳＦＥＴ７１〜７Ｎのドレイン
−ソース間電流ＩDSが低下して発熱量が減少し、チップ
温度を一定にすることができる。With such a configuration, when the temperature rises as in the case of FIG. 1, the output Vp of the temperature sensor 10 decreases, the current IDS between the drains and the sources of the N-channel MOSFETs 71 to 7N decreases, and the amount of heat generated decreases. And the chip temperature can be kept constant.
【００３１】この構成もゲートアレイ等のＣＭＯＳ半導
体集積回路を利用して形成することができる。This configuration can also be formed using a CMOS semiconductor integrated circuit such as a gate array.
【００３２】図８は本発明の第４の実施の形態としての
温度センサの変形例を示す回路図である。FIG. 8 is a circuit diagram showing a modification of the temperature sensor according to the fourth embodiment of the present invention.
【００３３】この温度センサ８０は、異なる特性のトラ
ンジスタを選択可能として温度制御を最適化したもので
ある。The temperature sensor 80 has a temperature control optimized by selecting transistors having different characteristics.
【００３４】電源ＶDDと接地ＧＮＤ間には、Ｐチャネル
ＭＯＳＦＥＴ８１、ＰチャネルＭＯＳＦＥＴ８２、Ｐチ
ャネルＭＯＳＦＥＴ８３が並列に接続された上で抵抗８
４と接続されている。これらはゲート幅が１：２：４の
関係になっており、現実にそのような関係に作っても良
いが、図８に示すように、ＰチャネルＭＯＳＦＥＴ８１
は１つのトランジスタで、ＰチャネルＭＯＳＦＥＴ８２
は２つのトランジスタ８２ａ，８２ｂを並列に接続した
もので、ＰチャネルＭＯＳＦＥＴ８３は４つのトランジ
スタ８３ａ，８３ｂ，８３ｃ，８４ｄを並列に接続した
もので実現している。ＰチャネルＭＯＳＦＥＴ８１のゲ
ートには選択信号Ｓ０が、ＰチャネルＭＯＳＦＥＴ８２
のゲートには選択信号Ｓ１が、ＰチャネルＭＯＳＦＥＴ
８３のゲートには選択信号Ｓ２がそれぞれ与えられてい
る。また、ＰチャネルＭＯＳＦＥＴ８１、ＰチャネルＭ
ＯＳＦＥＴ８２、ＰチャネルＭＯＳＦＥＴ８３と抵抗と
共通接続点は出力端子８５となっており、ここに選択信
号Ｓ１，Ｓ２，Ｓ３のいずれかで選択されたＰチャネル
ＭＯＳＦＥＴの特性に応じた出力Ｖｐが現れる。この様
子を図９および図１０を参照して説明する。A P-channel MOSFET 81, a P-channel MOSFET 82 and a P-channel MOSFET 83 are connected in parallel between the power supply VDD and the ground GND.
4 is connected. These have a relationship of 1: 2: 4 in gate width, and such a relationship may be actually formed. However, as shown in FIG.
Is a transistor, and a P-channel MOSFET 82
Is a transistor in which two transistors 82a and 82b are connected in parallel, and a P-channel MOSFET 83 is realized by connecting four transistors 83a, 83b, 83c and 84d in parallel. The selection signal S0 is applied to the gate of the P-channel MOSFET 81,
The selection signal S1 is applied to the gate of the P-channel MOSFET.
The selection signal S2 is given to each of the gates 83. Also, a P-channel MOSFET 81, a P-channel M
A connection point between the OSFET 82 and the P-channel MOSFET 83 and the resistor is connected to an output terminal 85, and an output Vp corresponding to the characteristic of the P-channel MOSFET selected by one of the selection signals S1, S2 and S3 appears. This situation will be described with reference to FIGS.
【００３５】図９は選択信号Ｓ１，Ｓ２，Ｓ３を変えた
ときにこのセンサ全体としてみたＭＯＳＦＥＴのオン抵
抗が変化する様子を示しており、抵抗値の選択が可能と
なる。図１０はこのようなオン抵抗を選択することによ
り、出力Ｖｐの変化範囲を変えられる様子を示してい
る。したがって、制御目標チップ温度に応じてセンサの
特性を変え、最適な制御を行うことが可能となる。FIG. 9 shows how the on-resistance of the MOSFET as a whole of the sensor changes when the selection signals S1, S2 and S3 are changed, and the resistance value can be selected. FIG. 10 shows the manner in which the change range of the output Vp can be changed by selecting such an on-resistance. Therefore, it is possible to change the characteristics of the sensor in accordance with the control target chip temperature and perform optimal control.
【００３６】この温度センサは汎用性があり、マクロセ
ルとして登録でき、種々の回路で使用することが可能と
なる。This temperature sensor is versatile, can be registered as a macro cell, and can be used in various circuits.
【００３７】以上説明した温度センサおよび温度制御回
路は実施の形態で示したものに限ることなく変形が可能
であるが、温度センサとしての２つの温度特性の異なる
素子の接続点に現れる出力によりソース−ドレイン電流
を変化させて消費電流を制御するような構成であれば良
い。The temperature sensor and the temperature control circuit described above can be modified without being limited to those described in the embodiment, but the source is generated by an output appearing at a connection point between two elements having different temperature characteristics as a temperature sensor. -Any configuration may be used as long as the current consumption is controlled by changing the drain current.
【００３８】[0038]
【発明の効果】以上説明したように、本発明によれば、
温度センサとしての２つの温度特性の異なる素子の接続
点に現れる出力によりソース−ドレイン電流を変化させ
て消費電流を制御するようにしているので、オンチップ
で構成した回路でチップ温度の制御を行うことができ
る。As described above, according to the present invention,
Since the current consumption is controlled by changing the source-drain current by the output appearing at the connection point of two elements having different temperature characteristics as a temperature sensor, the chip temperature is controlled by a circuit formed on-chip. be able to.
【００３９】また、このような温度制御回路を同一基板
上に備えた半導体集積回路は温度特性にすぐれ、従来の
ＭＯＳＦＥＴのスイッチングにより発生するノイズを低
減でき、かつ温度制御のための回路構成を簡略化でき
る。A semiconductor integrated circuit having such a temperature control circuit on the same substrate has excellent temperature characteristics, can reduce noise generated by conventional MOSFET switching, and can simplify the circuit configuration for temperature control. Can be
【図１】本発明の第１の実施の形態を示す回路図であ
る。FIG. 1 is a circuit diagram showing a first embodiment of the present invention.
【図２】図１における温度センサの特性を示すグラフで
ある。FIG. 2 is a graph showing characteristics of the temperature sensor in FIG.
【図３】図１における温度制御回路の動作特性を示すグ
ラフである。FIG. 3 is a graph showing operating characteristics of the temperature control circuit in FIG.
【図４】本発明の第２の実施の形態を示す回路図であ
る。FIG. 4 is a circuit diagram showing a second embodiment of the present invention.
【図５】図４における温度センサの特性を示すグラフで
ある。FIG. 5 is a graph showing characteristics of the temperature sensor in FIG.
【図６】図４における温度制御回路の動作特性を示すグ
ラフである。FIG. 6 is a graph showing operating characteristics of the temperature control circuit in FIG.
【図７】本発明の第３の実施の形態を示す回路図であ
る。FIG. 7 is a circuit diagram showing a third embodiment of the present invention.
【図８】本発明の第４の実施の形態にかかる温度センサ
を示す回路図である。FIG. 8 is a circuit diagram showing a temperature sensor according to a fourth embodiment of the present invention.
【図９】図８の構成で選択信号により温度センサとして
のオン抵抗を変化させた様子を示すグラフである。9 is a graph showing how the on-resistance as a temperature sensor is changed by a selection signal in the configuration of FIG.
【図１０】図８に示した温度センサの出力の変化範囲を
選択信号により変化させた様子を示すグラフである。FIG. 10 is a graph showing a state where a change range of the output of the temperature sensor shown in FIG. 8 is changed by a selection signal.
１，２１，２２，２Ｎ，５１，５２，５Ｎ，８１，８
２，８３ ＰチャネルＭＯＳＦＥＴ ２，４２，８４ 抵抗 １０，４０，８０ 温度センサ ２０，５０，７０ 制御回路 ３１，３２，３Ｎ，４２，６１，６２，６Ｎ，７１，７
２，７Ｎ ＮチャネルＭＯＳＦＥＴ1,21,22,2N, 51,52,5N, 81,8
2,83 P-channel MOSFET 2,42,84 Resistance 10,40,80 Temperature sensor 20,50,70 Control circuit 31,32,3N, 42,61,62,6N, 71,7
2,7N N-channel MOSFET
Claims (6)
数の素子で構成される温度センサと、 この温度センサの出力電圧を入力することにより、前記
出力電圧に応じて消費電流を制御する制御回路とを備え
た温度制御回路。1. A temperature sensor comprising a plurality of elements having different temperature-resistance characteristics, a control circuit for inputting an output voltage of the temperature sensor and controlling a current consumption according to the output voltage. Temperature control circuit with
されたＭＯＳＦＥＴと抵抗で構成されたことを特徴とす
る請求項１に記載の温度制御回路。2. The temperature control circuit according to claim 1, wherein said temperature sensor comprises a MOSFET and a resistor connected in series between a power supply and a ground.
通にゲート入力され、電源と接地間にソース、ドレイン
が接続された複数のＭＯＳＦＥＴで構成されたことを特
徴とする請求項１に記載の温度制御回路。3. The control circuit according to claim 1, wherein an output of the temperature sensor is commonly input to the gate of the control circuit, and a plurality of MOSFETs having a source and a drain connected between a power supply and a ground are provided. Temperature control circuit.
り、これら各一導電型ＭＯＳＦＥＴに常時オンとなる逆
導電型ＭＯＳＦＥＴが接続されたことを特徴とする請求
項３に記載の温度制御回路。4. The temperature control circuit according to claim 3, wherein the plurality of MOSFETs are of one conductivity type, and each of the one conductivity type MOSFETs is connected to a reverse conductivity type MOSFET which is always on.
り、所定の選択信号で導通する複数のＭＯＳＦＥＴが並
列接続されたものであることを特徴とする請求項２に記
載の温度制御回路。5. The temperature control circuit according to claim 2, wherein the MOSFETs have different gate widths and a plurality of MOSFETs that are turned on by a predetermined selection signal are connected in parallel.
数の素子で構成される温度センサと、 この温度センサの出力電圧を入力することにより、前記
出力電圧に応じて消費電流を制御する制御回路とを同一
基板上に備えた半導体集積回路。6. A temperature sensor comprising a plurality of elements having different temperature-resistance characteristics, and a control circuit for inputting an output voltage of the temperature sensor to control current consumption according to the output voltage. Semiconductor integrated circuit provided on the same substrate.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8167360A JPH1011157A (en) | 1996-06-27 | 1996-06-27 | Temperature control circuit and semiconductor integrated circuit |
| TW086108889A TW329045B (en) | 1996-06-27 | 1997-06-25 | Temperature control circuit and its semiconductor integrated circuit |
| KR1019970027652A KR980006246A (en) | 1996-06-27 | 1997-06-26 | Temperature Control Circuits and Semiconductor Integrated Circuits |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8167360A JPH1011157A (en) | 1996-06-27 | 1996-06-27 | Temperature control circuit and semiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH1011157A true JPH1011157A (en) | 1998-01-16 |
Family
ID=15848281
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8167360A Pending JPH1011157A (en) | 1996-06-27 | 1996-06-27 | Temperature control circuit and semiconductor integrated circuit |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPH1011157A (en) |
| KR (1) | KR980006246A (en) |
| TW (1) | TW329045B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7423473B2 (en) | 2004-11-10 | 2008-09-09 | Samsung Electronics Co., Ltd. | Sequential tracking temperature sensors and methods |
| US8083404B2 (en) | 2007-08-31 | 2011-12-27 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit |
| CN103176489A (en) * | 2013-02-06 | 2013-06-26 | 南京千韵电子科技有限公司 | Method and device for controlling chip inner temperature and experiment instrument based on same method |
-
1996
- 1996-06-27 JP JP8167360A patent/JPH1011157A/en active Pending
-
1997
- 1997-06-25 TW TW086108889A patent/TW329045B/en not_active IP Right Cessation
- 1997-06-26 KR KR1019970027652A patent/KR980006246A/en not_active Application Discontinuation
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7423473B2 (en) | 2004-11-10 | 2008-09-09 | Samsung Electronics Co., Ltd. | Sequential tracking temperature sensors and methods |
| US8083404B2 (en) | 2007-08-31 | 2011-12-27 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit |
| CN103176489A (en) * | 2013-02-06 | 2013-06-26 | 南京千韵电子科技有限公司 | Method and device for controlling chip inner temperature and experiment instrument based on same method |
Also Published As
| Publication number | Publication date |
|---|---|
| KR980006246A (en) | 1998-03-30 |
| TW329045B (en) | 1998-04-01 |
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