JPH10105533A - Microcomputer with built-in flash memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the time for writing data into the flash memory of a microcomputer with built-in flash memory or sampling a gate voltage. SOLUTION: An initial value is set (S11). The data of a designated address value is confirmed. When it is '0', '1' is added to the address value, and it is repeated until data '1' are detected (S12). When '1' is detected in processing S12, '0' is written and its time is measured (S13). When time (n)×(t) for completing write through (n) times of loops is maximum in processing S13, it is preserved in maximum time Tmax (S14). The processings S12-S14 are repeated for the number of samples [ (m) pieces of samples ] and its completion is discriminated (S15). The batch write of data '0' is performed while using the maximum write time Tmax ($16). Because of these processings, the time required for write is found, the data '0' are simultaneously written in remaining areas within that time, and the time for write can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer with a built-in flash memory which has a writing means for shortening the processing time when rewriting the contents of the flash memory and a means for protecting data in the flash memory.

[0002]

2. Description of the Related Art In recent information equipment products, the cycle of product development and version upgrade of various standards relating to information equipment has become very fast. Therefore, by storing system control software (hereinafter referred to as firmware) such as a microcomputer used when starting up the system in the system device or in a flash memory incorporated in the microcomputer, the system can be easily developed. The system device is designed so that data rewriting such as firmware change can be performed. Here, data writing to a flash memory of a conventional flash memory built-in microcomputer will be described with reference to the drawings.

FIG. 9 is a flowchart illustrating a process of writing data to a flash memory. When writing to flash memory, after writing specific data,
This is performed by erasing data and then writing new data. First, “0” data as specific data is written to all areas of the flash memory (S
1). Next, data is erased by lowering the gate voltage for a certain period of time (S2). In this process S2, if the gate voltage is excessively lowered, the gate voltage is increased and the erasing operation is performed again (S3). After erasing all old data by the above processing steps, write new data
(S4).

FIG. 10 schematically shows the above-mentioned processing, wherein 1 is old data, 2 is "0" data, 3 is erasure completed data, and 4 is new data. First, by writing "0" of specific data, old data 1 is rewritten to "0" data 2 (S1). Next, by lowering the gate voltage, FFh is rewritten to the erase completion data 3 (S
2). Finally, new new data 4 is written (S
4). These processes are realized by repeatedly executing the same work little by little, without executing them collectively.

FIG. 11 is a flowchart for explaining a procedure for writing data to the flash memory. First, a write start address of the flash memory is set (S5). Data is written by applying a voltage only during time t. The writing is repeated at time t until the data writing is completed (S6). The operation of the processing S6 is repeated until the writing to all the areas is completed (the final address is reached) (S7). Note that the above procedure is repeated for writing specific data or new data when writing data.

FIG. 12 is a flowchart for explaining a processing procedure for erasing data after specific data "0" is written in the entire area of the flash memory. First, the erase start address of the memory is set (S8). The gate voltage is reduced only during the time t. That is, until the data changes to FFh, sampling of the gate voltage is repeated at time t (S9). The operation of the processing S9 is repeated until the operation reaches the final address (S10).

[0007]

However, in a flash memory built-in microcomputer having such a configuration, in particular, as a data writing method of the flash memory, the data rewriting performed according to the above-described procedure requires writing. There is a problem that the time varies depending on the writing voltage and the temperature, and it takes much time to repeat the same operation.

The present invention solves the above-mentioned problem of the prior art.
It introduces a procedure that uses the sampling time of the write time, the variability of the gate voltage extraction time, and the relationship between the write time and the voltage, thereby shortening the time for writing data to the flash memory and extracting the gate voltage. It is an object to provide a microcomputer with a built-in flash memory.

[0009]

To achieve this object, a microcomputer with a built-in flash memory according to the present invention comprises a ROM storing software for loading externally input data into the flash memory.
And a flash memory having a procedure of writing specific data to all areas when rewriting data, erasing data, and then writing new data. Is characterized in that it comprises means for measuring a time for rewriting a plurality of data on the flash memory to specific data and writing the specific data to the entire area with a data write time determined from the measured time. .

[0010] Further, the second aspect of the present invention provides
In order to erase the data of the flash memory in which the specific data has been written in the entire area, a means for controlling the time for lowering the gate voltage of the flash memory to be an exponential function curve is provided.

[0011] Further, according to claim 3 of the present invention,
There is provided a means for writing new data to the flash memory all at once using the time required to write the specific data obtained by the measurement.

[0012] Further, according to a fourth aspect of the present invention,
Means for measuring a magnitude of a voltage for writing data to the flash memory by an analog-to-digital conversion function, determining a writing time from a voltage-time characteristic of writing to the flash memory, and performing data writing. .

[0013] Further, according to claim 5 of the present invention,
In the writing of new data to the flash memory, there is provided a means for omitting a part of a procedure of erasing data, and then writing new data after writing specific data to all areas, according to the value of old data. I do.

Further, according to a sixth aspect of the present invention,
It is characterized by comprising means for controlling data on a block basis with one byte or a plurality of bytes as one block, and simultaneously erasing one block of the flash memory and reading the other block.

Further, the present invention according to claim 7 is
The present invention is characterized in that it is provided with means for determining whether writing to the flash memory is possible.

According to the configuration of the first aspect, specific data can be written collectively by using the maximum time required for writing obtained by measurement.

According to the second aspect of the present invention, the time until the data erasure is completed can be shortened by changing and controlling the time for lowering the gate voltage so as to form an exponential function curve. it can.

Further, according to the configuration of the third aspect, it is not necessary to repeatedly write at predetermined time intervals, and new data can be written at once, so that the writing time can be reduced.

Further, according to the configuration of the fourth aspect, the required write time is calculated from the detected write voltage, so that the data can be rewritten collectively without repeating the operation.

Further, according to the configuration of the fifth aspect, it is possible to omit some procedures, particularly, writing and erasing of specific data which requires time.

According to the configuration of the present invention, it is possible to determine whether the old data and the new data of the next block are the same while erasing data having a long processing time, and when the new data is different from the old data. Only data can be written.

Further, according to the configuration of the seventh aspect, the data in the flash memory can be protected without being unnecessarily rewritten by the determination as to whether it can be designated from the outside.

[0023]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a flowchart showing a processing procedure for writing the specific data “0” to the entire area of the flash memory according to the first embodiment of the present invention. First, an initial value of the start state is set (S11). The data of the designated address value is confirmed, and if it is "0", the address value is incremented by one and the process is repeated until the data "1" is detected (S12). When "1" is detected in step S12, "0" is written, and the writing time is measured (S13). In the process S13, if the completion time (nt) required for the completion of the writing is the maximum, it is stored in the maximum time Tmax (S
14). The processes S12 to S14 are repeated to determine the completion of capturing the required number of samples (S15). Batch writing is performed using the sampled maximum writing time Tmax (S16). It consists of the above steps.

It is measured that the writing of "0" data is completed in n × t times by the n loops in the process S13. By repeating this measurement for the required number of samples (m), the maximum writing time Tmax is detected. At the time Tmax obtained in this manner, "0" data can be collectively written to all the remaining areas.

As described above, according to the first embodiment, writing is repeated by the number of samplings to obtain the time required for writing, so that writing can be performed without confirming the completion of writing in the remaining area. , “0”
The time for writing data is reduced.

Next, FIG. 2 is a flowchart illustrating a processing procedure for erasing data after “0” data has been written to the entire area of the flash memory according to the second embodiment of the present invention. First, an initial value of the start state is set (S1
7). The sampling of the gate voltage is repeated until the data becomes FFh (S18). It is determined whether the process has been executed for all cells (S19). It consists of the above steps.

In the case of the second embodiment, the time for extracting the gate voltage in the repetition part in step S18 is determined by the characteristics of the write voltage and the write time for the flash memory. The second time is 20ms, the third time

[0028]

[Outside 1]

640 ms for 640 ms or more
Run at a constant.

FIG. 3 is a diagram showing voltage-time characteristics of writing in a flash memory. In the second embodiment, after "0" data is written in all the areas, the data is erased. Therefore, the unit of erasing is performed not for each address but for each cell of one line. is there.

As described above, according to the second embodiment, the time required to complete the extraction of the gate voltage is shortened, unlike the case where the processing is performed at regular intervals.

FIG. 4 is a flowchart showing a processing procedure for writing necessary data to a flash memory according to the third embodiment of the present invention. The initial value of the start state is set (S20). When writing "0" data, data writing is performed for the maximum writing time Tmax measured in the first embodiment (S21). It is determined whether the writing of the final data has been completed (S22). It consists of the above steps.

In the third embodiment, since data is erased once in updating data in the flash memory, the maximum time Tmax required for writing obtained in the erasing process (writing process of specific data) is used. Data can be written collectively.

As described above, according to the third embodiment, the time required for data writing is reduced because repeated writing is not required when data cannot be written due to insufficient writing time.

Next, FIG. 5 is a flowchart showing a processing procedure for measuring the write voltage to the flash memory and writing data in the fourth embodiment of the present invention. The write voltage to the flash memory is measured by the analog / digital conversion function (S23). The time required for writing is calculated from the writing voltage with reference to the data table (S24). Data writing is performed at the calculated time Ta (S25). It consists of the above steps.

The write voltage of the flash memory is measured using an analog / digital conversion function incorporated therein. In addition, by preparing a data table (correspondence table) based on a characteristic table of the write voltage and the write time from the voltage-time characteristic of writing to the flash memory shown in FIG. The required time is calculated. By using the time calculated in this way, data can be written collectively.

As described above, according to the fourth embodiment, there is no need to repeatedly perform a writing operation for measuring the time required for writing, and the time required for writing data is reduced.

Next, FIG. 6 is a flowchart illustrating a process of writing data to a flash memory according to the fifth embodiment of the present invention. First, determine whether the data in the flash memory is FFh (erase completed data)
(S26). It is determined whether the data in the flash memory is "0" data (S27). If the data is not "0" data in process S27, "0" data is written (S28). The gate voltage is extracted and the data is erased (S29). The erasing operation is performed again when the gate voltage is excessively extracted (S30). New data is written (S31). It consists of the above steps.

Normally, firmware data written to the flash memory often has "0" or FFh. When the data is already “0”, there is no need to write “0” data. In particular, in the case of FFh, there is no need to perform time-consuming specific data writing or data erasing.

As described above, according to the fifth embodiment,
The time required to write "0" data in the memory area "0" and the time required to write or erase the data "0" in the memory area FFh can be omitted, and the time required for data writing can be reduced. Will be.

Next, FIG. 7 is a flowchart for explaining a process of determining new / old data and writing data to the flash memory according to the sixth embodiment of the present invention. It is determined whether the old data in the flash memory is the same as the new data (S32), and if it is not the same in process S32, "0" data is written (S33). Further, the gate voltage is extracted and the data is erased (S34). Perform the erasing operation again when the gate voltage is excessively extracted (S3
Five). New data is written (S36). It consists of the above steps.

The reading of step S32 and the erasing of steps S33 to S35 are performed simultaneously. Data is controlled in block units.

The purpose of using a flash memory in a microcomputer with a built-in flash memory is to rewrite the changed data by changing the firmware after the system is developed, thereby easily realizing the system version upgrade. In such a case, it is difficult to write completely different data from the previous data in the entire area of the flash memory, so it is most efficient to rewrite only the different parts of the new and old data, and the rewriting time is short. It is possible to

As described above, according to the sixth embodiment, the erasure of the old data in one block and the determination as to whether the old data in the other block are the same as the new data are performed at the same time. Is erased and rewritten, the time required for data writing is reduced. As a result, when the firmware written in the flash memory of the microcomputer with the built-in flash memory is partially changed, the writing time can be greatly reduced.

FIG. 8 is a block diagram showing a configuration of a microcomputer with a built-in flash memory according to the seventh embodiment of the present invention. 8, 5 is a microprocessor (MPU), 6 is a ROM, 7 is a flash memory, 8 is a write control terminal of the flash memory 7,
9 is a host bus.

The microprocessor (MPU) 5 downloads new firmware data from the host bus 9 to the flash memory 7 in accordance with software written in the built-in ROM 6. In the execution of this data download, writing permission can be given depending on the state of the terminal 8 for writing control to the flash memory 7. For this reason, writing to the flash memory 7 can be protected.

As described above, according to the seventh embodiment, the writing of data to the flash memory 7 can be controlled by the write control terminal 8, thereby easily rewriting and changing the data. Flash memory 7
Will not be unnecessarily rewritten, and higher security for the firmware will be ensured.

It is needless to say that an advantageous effect can be obtained by any one or some of the configurations in the above embodiments.

[0049]

As described above, according to the present invention,
This has the effect of shortening the rewriting processing time for rewriting data in the flash memory of a microcomputer with a built-in flash memory and ensuring the security of the firmware against rewriting.

[Brief description of the drawings]

FIG. 1 is a flowchart showing a processing procedure for writing specific data “0” to an entire area of a flash memory according to a first embodiment of the present invention.

FIG. 2 is a flowchart illustrating a processing procedure for erasing data after “0” data is written in the entire area of a flash memory according to a second embodiment of the present invention;

FIG. 3 is a diagram showing voltage-time characteristics of writing in a flash memory.

FIG. 4 is a flowchart showing a processing procedure for writing necessary data to a flash memory according to a third embodiment of the present invention.

FIG. 5 is a flowchart illustrating a processing procedure for measuring a write voltage to a flash memory and writing data according to a fourth embodiment of the present invention;

FIG. 6 is a flowchart illustrating a process of writing data to a flash memory according to a fifth embodiment of the present invention.

FIG. 7 is a flowchart illustrating a process of determining new / old data and writing data to a flash memory according to a sixth embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a microcomputer with a built-in flash memory according to a seventh embodiment of the present invention.

FIG. 9 is a flowchart illustrating a conventional process of writing data to a flash memory.

FIG. 10 is a diagram schematically showing a conventional process of writing data to a flash memory.

FIG. 11 is a flowchart illustrating a processing procedure for writing data to a conventional flash memory.

FIG. 12 is a flowchart illustrating a conventional procedure for erasing data after specific data “0” is written in the entire area of the flash memory.

[Explanation of symbols]

1: old data, 2: "0" data, 3: erasure completed data, 4: new data, 5: microprocessor
(MPU), 6… ROM, 7… Flash memory,
8: Terminal for writing control, 9: Host bus.

Claims (7)

[Claims] An RO storing software for loading externally input data into a flash memory.
A microcomputer having a built-in M and a flash memory that performs a procedure of writing specific data to all areas when rewriting data, erasing data, and then writing new data, wherein a plurality of flash memories are provided. A microcomputer with a built-in flash memory, comprising: means for measuring a time for rewriting data to specific data and writing specific data to all areas in a data writing time determined by the measured time. 2. An RO storing software for loading externally input data into a flash memory.
A microcomputer having a built-in M and a flash memory that performs a procedure of writing specific data to all areas when rewriting data, erasing data, and then writing new data, wherein specific data is written to all areas. A flash memory built-in microcomputer comprising means for performing control so that the time for lowering the gate voltage of the flash memory becomes an exponential function curve in order to erase the data in the flash memory. 3. An RO storing software for loading externally input data into a flash memory.
A microcomputer having a built-in M and a flash memory that performs a procedure of writing specific data to all areas when rewriting data, erasing data, and then writing new data, wherein a plurality of flash memories are provided. A microcomputer with a built-in flash memory, comprising: means for measuring a time for rewriting data to specific data and writing new data in a lump using the time determined by the measurement. 4. An RO storing software for loading externally input data into a flash memory.
A microcomputer having a built-in M and a flash memory that performs a procedure of writing specific data to all areas when rewriting data, erasing data, and then writing new data, and writes data to the flash memory. A microcomputer with built-in flash memory, comprising: means for measuring the magnitude of a voltage by an analog-to-digital conversion function, determining a writing time from a voltage-time characteristic of writing to the flash memory, and writing data. 5. An RO storing software for loading externally input data into a flash memory.
A microcomputer having a built-in M and a flash memory that performs a procedure of writing specific data to all areas when rewriting data, erasing data, and then writing new data, wherein a new data is written to the flash memory. A microcomputer with built-in flash memory, characterized by comprising means for omitting a part of the procedure of writing specific data to the entire area, erasing data, and then writing new data after writing the specific data to the entire area by writing the old data . 6. An RO storing software for loading externally input data into a flash memory.
A microcomputer having a built-in M and a flash memory that performs a procedure of writing specific data to all areas when rewriting data, erasing data, and then writing new data, wherein 1 byte or a plurality of bytes is 1 byte. A microcomputer with a built-in flash memory, comprising means for controlling data in units of blocks as a block and simultaneously executing erasing of one block of the flash memory and reading of the other block. 7. An RO storing software for loading externally input data into a flash memory.
A microcomputer having a built-in M and a flash memory that performs a procedure of writing specific data to all areas when rewriting data, erasing the data, and then writing new data, comprising: A microcomputer with a built-in flash memory, characterized by comprising means for making a determination.