JPH0992978A - Glass ceramic board with built-in capacitor - Google Patents
Glass ceramic board with built-in capacitorInfo
- Publication number
- JPH0992978A JPH0992978A JP7267650A JP26765095A JPH0992978A JP H0992978 A JPH0992978 A JP H0992978A JP 7267650 A JP7267650 A JP 7267650A JP 26765095 A JP26765095 A JP 26765095A JP H0992978 A JPH0992978 A JP H0992978A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- glass ceramic
- glass
- powder
- built
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Ceramic Capacitors (AREA)
Abstract
Description
【0001】[0001]
【発明が属する技術分野】本発明は、コンデンサを内蔵
したガラスセラミック基板、特にガラスセラミック絶縁
層、コンデンサ用電極、その他の回路用配線等を同時焼
成して得るコンデンサ内蔵ガラスセラミック基板に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a glass ceramic substrate having a built-in capacitor, and more particularly to a glass ceramic substrate having a built-in capacitor obtained by simultaneously firing a glass ceramic insulating layer, a capacitor electrode, and other circuit wiring.
【0002】[0002]
【従来の技術】ガラス粉末とセラミックフィラーの混合
物から作製したグリーンシートにAgペースト、コンデ
ンサペーストを用いて所定のパターンを形成し、複数枚
積層して800〜1000℃で焼成して得られるコンデ
ンサ内蔵ガラスセラミック基板(多層配線基板)があ
る。このようなコンデンサ内蔵ガラスセラミック基板
は、リード付きコンデンサやチップコンデンサを、基板
上に半田付けしたものに比べて小型高密度化が可能なた
め、電子機器の小型化に貢献するものと期待されてい
る。2. Description of the Related Art Built-in capacitors obtained by forming a predetermined pattern using Ag paste and capacitor paste on a green sheet made of a mixture of glass powder and ceramic filler, laminating a plurality of sheets and firing at 800 to 1000 ° C. There is a glass ceramic substrate (multilayer wiring substrate). Such a glass-ceramic substrate with a built-in capacitor is expected to contribute to the miniaturization of electronic devices because it can be made smaller and higher in density than a capacitor with a lead or a chip capacitor soldered on the substrate. There is.
【0003】従来、コンデンサ内蔵のセラミック多層配
線基板においては、そのコンデンサに用いる材料とし
て、低温焼成可能な鉛ペロブスカイト系複合材料を主成
分としたものについて数々の研究が行われている。その
代表的なものとして、例えばPb(Mg1/3 Nb2/3 )
O3 、Pb(Fe1/2 Nb1/2 )O3 、Pb(Fe2/3
W1/3 )O3 等の材料があり、それらの誘電率は単独で
は各々12000、24000、20000と高い値が
得られている。Conventionally, in a ceramic multilayer wiring board with a built-in capacitor, as a material used for the capacitor, a lot of researches have been conducted on a material mainly composed of a lead perovskite type composite material which can be fired at a low temperature. As a typical example, for example, Pb (Mg 1/3 Nb 2/3 )
O 3 , Pb (Fe 1/2 Nb 1/2 ) O 3 , Pb (Fe 2/3
There are materials such as W 1/3 ) O 3 and their dielectric constants are as high as 12000, 24000 and 20000, respectively.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、上記従
来の鉛ペロブスカイト系複合材料をガラスセラミック基
板に内蔵すると、焼成時に酸化硼素やシリカなどのガラ
ス成分の誘電体層中への拡散がおこり、焼成後のコンデ
ンサが所望の誘電特性を満たさないことがあった。例え
ば、鉛ペロブスカイト系複合材料Pb(Mg1/3 Nb
2/3 )O3 の誘電率は単独では上記のように12000
であるが、低温焼成基板に内蔵すると30程度に低下し
てしまう。However, when the above-mentioned conventional lead perovskite composite material is incorporated into a glass ceramic substrate, a glass component such as boron oxide or silica diffuses into the dielectric layer during firing, and after firing, In some cases, the above capacitor did not satisfy the desired dielectric characteristics. For example, a lead perovskite composite material Pb (Mg 1/3 Nb
The dielectric constant of 2/3 ) O 3 is 12000 as above by itself.
However, if it is built in the low temperature firing substrate, it will be reduced to about 30.
【0005】これを改善する方法として、従来コンデン
サ用電極とガラスセラミック絶縁層との間にバリア層を
印刷等により設けて拡散を抑制する方法が提案されてい
る。例えば、誘電体組成とは異なる誘電材料からなる中
間層を設けてバリア層とする方法(例えば特開平1−2
62695号公報参照)や、金属中間層を設ける方法
(例えば特開昭62−265795号公報参照)があ
る。また、電極層にガラス粉を添加することにより、拡
散を抑制する方法(例えば特開平7−111225号公
報参照)もある。As a method for improving this, a method has conventionally been proposed in which a barrier layer is provided between the capacitor electrode and the glass ceramic insulating layer by printing or the like to suppress diffusion. For example, a method of forming an intermediate layer made of a dielectric material different from the dielectric composition to form a barrier layer (see, for example, JP-A 1-2).
No. 62695), and a method of providing a metal intermediate layer (see, for example, JP-A-62-265795). There is also a method of suppressing diffusion by adding glass powder to the electrode layer (for example, see JP-A-7-111225).
【0006】ところが、上記従来のものは、焼成時にガ
ラスセラミックよりなる絶縁体材料成分、特にガラス成
分の誘電体層中への拡散を必ずしも良好に抑制すること
ができず、高誘電率で誘電損失の少ないコンデンサ内蔵
のセラミック基板を得ることは困難であったり、バリア
層の形成にコストが嵩んだり、あるいは電極層に添加物
を加えることによってコンデンサの電気的特性が変化し
てしまう等の問題があった。However, the above-mentioned conventional ones cannot necessarily suppress the diffusion of the insulating material component made of glass ceramic, especially the glass component, into the dielectric layer at the time of firing, resulting in a high dielectric constant and a dielectric loss. It is difficult to obtain a ceramic substrate with a built-in capacitor that is low in power consumption, the cost is high to form the barrier layer, and the electrical characteristics of the capacitor change due to the addition of additives to the electrode layer. was there.
【0007】本発明は上記の問題点に鑑みて提案された
もので、焼成時に絶縁体材料成分の誘電体層中への拡散
を確実に抑制することのできるバリア層を備え、高誘電
率で誘電損失の少ないコンデンサ内蔵のガラスセラミッ
ク多層配線基板を安価に提供することを目的とする。The present invention has been proposed in view of the above problems, and is provided with a barrier layer capable of reliably suppressing the diffusion of the insulating material components into the dielectric layer during firing, and has a high dielectric constant. An object of the present invention is to provide a glass-ceramic multilayer wiring board with a built-in capacitor with low dielectric loss at low cost.
【0008】[0008]
【課題を解決するための手段】上記の目的を達成するた
めに本発明によるコンデンサ内蔵ガラスセラミック基板
は、以下の構成としたものである。即ち、ガラスセラミ
ック絶縁層、コンデンサ用電極、その他の回路用配線を
同時焼成して得るコンデンサ内蔵ガラスセラミック基板
において、コンデンサ電極とガラスセラミック絶縁層の
間にガラス成分の拡散を抑制するアルミナ、マグネシ
ア、ジルコニア、チタニア、カルシアから選択される1
種以上の耐火物からなるバリア層を形成したことを特徴
とする。In order to achieve the above object, a glass ceramic substrate with a built-in capacitor according to the present invention has the following constitution. That is, in a glass ceramic substrate with a built-in capacitor obtained by simultaneously firing a glass ceramic insulating layer, a capacitor electrode, and other circuit wiring, alumina, magnesia, which suppresses the diffusion of glass components between the capacitor electrode and the glass ceramic insulating layer, 1 selected from zirconia, titania and calcia
It is characterized in that a barrier layer made of at least one kind of refractory material is formed.
【0009】[0009]
【作用】上記のようにコンデンサ電極とガラスセラミッ
ク絶縁層の間に、アルミナ等の耐火物からなるバリア層
を形成したことによって、焼成時にガラス成分の誘電体
層中への拡散が抑制され、該誘電体層の誘電率の低下が
防止されて高誘電率で誘電特性の優れたコンデンサ内蔵
ガラスセラミック基板を提供することが可能となる。By forming the barrier layer made of a refractory material such as alumina between the capacitor electrode and the glass ceramic insulating layer as described above, the diffusion of the glass component into the dielectric layer during firing is suppressed, It is possible to provide a glass ceramic substrate with a built-in capacitor, in which a decrease in the dielectric constant of the dielectric layer is prevented and which has a high dielectric constant and excellent dielectric properties.
【0010】[0010]
【発明の実施の形態】図1は本発明によるコンデンサ内
蔵ガラスセラミック基板(多層配線基板)の具体的な構
成の一例を示す焼成後の断面図である。図において、1
はガラスセラミックよりなる絶縁層、2はコンデンサで
ある。そのコンデンサ2は一対の電極21と、その両電
極21・21間に介在させた誘電体層22とよりなる。
3は上記各電極21に導電接続させたビア導体、4はバ
リア層である。1 is a cross-sectional view after firing showing an example of a specific structure of a glass ceramic substrate with a built-in capacitor (multilayer wiring substrate) according to the present invention. In the figure, 1
Is an insulating layer made of glass ceramic and 2 is a capacitor. The capacitor 2 is composed of a pair of electrodes 21 and a dielectric layer 22 interposed between the electrodes 21 and 21.
Reference numeral 3 is a via conductor conductively connected to each of the electrodes 21 and 4 is a barrier layer.
【0011】上記のようなコンデンサを内蔵したガラス
セラミック多層配線基板を製造するに当たっては、例え
ば絶縁層1を構成する複数枚のガラスセラミックグリー
ンシートに予めコンデンサ2の電極21や誘電体層22
およびバリア層4やビア導体3さらに必要に応じて図に
省略した所望の配線パターン等を形成した後、それらの
ガラスセラミックグリーンシートを積層して焼成する。
この場合、コンデンサ2は、例えばセラミックグリーン
シート上にバリア層4と電極21とを順に印刷等で形成
した後に、その上に誘電体層22となる誘電体ペースト
を印刷等で形成し、さらにその上に電極21とバリア層
4を順に印刷等して形成する。またビア導体3は、ビア
孔を形成した後に導体ペーストを充填して形成すればよ
い。In manufacturing a glass ceramic multilayer wiring board having a built-in capacitor as described above, for example, a plurality of glass ceramic green sheets forming the insulating layer 1 are preliminarily formed on the electrodes 21 and the dielectric layer 22 of the capacitor 2.
After forming the barrier layer 4, the via conductor 3 and a desired wiring pattern not shown in the drawing as necessary, these glass ceramic green sheets are laminated and fired.
In this case, in the capacitor 2, for example, the barrier layer 4 and the electrode 21 are sequentially formed by printing or the like on the ceramic green sheet, and then the dielectric paste to be the dielectric layer 22 is formed thereon by printing or the like. The electrode 21 and the barrier layer 4 are sequentially formed on the top by printing or the like. Further, the via conductor 3 may be formed by filling the conductor paste after forming the via hole.
【0012】上記のガラスセラミックグリーンシートに
用いるガラスセラミック粉末としては、例えば1100
℃以下で充分に焼結するものを用いればよく、その材質
は適宜であり、ガラス粉末としては、例えば酸化鉛、酸
化亜鉛、アルカリ土類金属酸化物、アルカリ金属酸化物
等を含有するアルミノ硼珪酸ガラスで軟化点が600〜
800℃の非晶質ガラス粉末、あるいは600〜110
0℃で結晶化する結晶化ガラス等が使用できる。又これ
にアルミナ、ジルコン、ムライト、コージェライト、ア
ノーサイト、シリカ等のセラミックフィラーを混合して
もよい。その場合の混合比率は、ガラスセラミック基板
の坑折強度、誘電率、緻密性等の性能を勘案して適宜調
整すればよく、一般的に重量比で約1:1が好ましい。The glass ceramic powder used for the above glass ceramic green sheet is, for example, 1100.
A material that can be sufficiently sintered at a temperature of ℃ or below may be used, and the material thereof is appropriate, and examples of the glass powder include alumino-boron containing lead oxide, zinc oxide, alkaline earth metal oxides, alkali metal oxides and the like. Silica glass with a softening point of 600-
Amorphous glass powder at 800 ° C, or 600 to 110
Crystallized glass that crystallizes at 0 ° C. can be used. Further, a ceramic filler such as alumina, zircon, mullite, cordierite, anorthite or silica may be mixed therewith. In that case, the mixing ratio may be appropriately adjusted in consideration of performances such as folding strength, dielectric constant, and denseness of the glass ceramic substrate, and generally a weight ratio of about 1: 1 is preferable.
【0013】上記のガラスセラミックグリーンシート
は、ガラスセラミック粉末をスラリーに調整後、ドクタ
ーブレード等を用いてシート状に形成するもので、その
厚さは、作成すべき基板の焼成後の厚さを勘案して適宜
設定すればよく、例えば30〜200μm程度に成形す
る。また上記のスラリーに調整するには、ガラスセラミ
ック粉末にバインダや可塑剤および溶剤を加えて、ボー
ルミルやアトライタ等で混合して得ればよい。そのバイ
ンダとしては、例えばポリビニルブチラール、メタアク
リルポリマ、アクリルポリマ等を使用することができ
る。また可塑剤としてはフタル酸の誘導体等を、また溶
剤としてはアルコール類、ケトン類、塩素系有機溶剤等
をそれぞれ使用することができる。The above-mentioned glass ceramic green sheet is formed into a sheet by using a doctor blade or the like after adjusting the glass ceramic powder into a slurry, and its thickness is the thickness of the substrate to be prepared after firing. It may be appropriately set in consideration, and for example, it is molded to about 30 to 200 μm. Further, in order to prepare the above-mentioned slurry, a binder, a plasticizer and a solvent may be added to the glass ceramic powder and mixed by a ball mill, an attritor or the like. As the binder, for example, polyvinyl butyral, methacrylic polymer, acrylic polymer or the like can be used. Further, a phthalic acid derivative or the like can be used as the plasticizer, and alcohols, ketones, chlorine-based organic solvents or the like can be used as the solvent.
【0014】上記のようにして作成したガラスセラミッ
クグリーンシートには、前述のように予めコンデンサ2
の電極21や誘電体層22およびビア導体3さらに必要
に応じて図に省略した所望の配線パターン等を形成する
もので、特に本発明においてはコンデンサ電極21とガ
ラスセラミック絶縁層1との間にバリア層4を形成する
ようにしたものである。The glass-ceramic green sheet prepared as described above is preliminarily charged with the capacitor 2 as described above.
The electrode 21, the dielectric layer 22, the via conductor 3 and a desired wiring pattern not shown in the drawing are formed if necessary. Particularly, in the present invention, between the capacitor electrode 21 and the glass ceramic insulating layer 1. The barrier layer 4 is formed.
【0015】そのバリア層4としては、前述のようにア
ルミナ、マグネシア、ジルコニア、チタニア、カルシア
の耐火物粉末から選択される1種以上の粉末を用いるも
ので、その粉末に例えばバインダを混練してペーストを
作製し、コンデンサ電極と絶縁層との間に印刷等するこ
とでバリア層を形成する。あるいは上記のようなペース
トに限らず、前記の耐火物粉末を含有するグリーンシー
トを電極層と絶縁層の間に挟んでバリア層を形成するこ
ともできる。As the barrier layer 4, one or more kinds of powder selected from refractory powders of alumina, magnesia, zirconia, titania, and calcia are used as described above, and the powder is kneaded with, for example, a binder. A barrier layer is formed by producing a paste and printing it between the capacitor electrode and the insulating layer. Alternatively, the barrier layer may be formed by sandwiching the green sheet containing the refractory powder described above between the electrode layer and the insulating layer without being limited to the paste as described above.
【0016】上記の耐火物粉末の粒径は、例えばスクリ
ーン印刷する際にスクリーンを容易に通過できればよ
く、平均粒径は1〜5μm程度が好ましい。その耐火物
粉末をペーストもしくはグリーンシートにするには、該
粉末100重量部をビヒクル20〜30重量部に混ぜ、
スリーロールミル等で混合する。ビヒクルの組成は特に
限定されないが、例えばエチルセルロース4〜8wt%
のターピネオール溶液が使用できる。ペーストとする場
合の粘度は、200〜300Pa・Sとすれば印刷に好
適である。The particle size of the above refractory powder may be such that it can easily pass through the screen during screen printing, and the average particle size is preferably about 1 to 5 μm. To make the refractory powder into a paste or green sheet, mix 100 parts by weight of the powder with 20 to 30 parts by weight of vehicle,
Mix with a three-roll mill. Although the composition of the vehicle is not particularly limited, for example, ethyl cellulose 4 to 8 wt%
Terpineol solution can be used. When the paste has a viscosity of 200 to 300 Pa · S, it is suitable for printing.
【0017】一方、コンデンサ2の誘電体層22を形成
する誘電体ペーストとしては、前述のような鉛ペロブス
カイト系複合材料を主成分としたもの等を用いることが
できる。それらの材料を上記の耐火物粉末と同様の要領
でペースト状にすればよい。またコンデンサ2の電極2
1やビア導体3および配線パターン等を形成する導体ペ
ーストとしてはAg粉末等を用い、その粉末を上記と同
様の要領でペースト状にすればよい。On the other hand, as the dielectric paste for forming the dielectric layer 22 of the capacitor 2, the above-mentioned lead perovskite-based composite material as a main component can be used. These materials may be made into a paste in the same manner as the above refractory powder. Also, the electrode 2 of the capacitor 2
Ag powder or the like may be used as the conductor paste for forming 1 or the via conductor 3 and the wiring pattern, and the powder may be made into a paste in the same manner as described above.
【0018】なお、前記バリア層4の厚さは、あまり薄
いと、前記のガラス成分の拡散抑制効果が少なく、あま
り厚いと、表面に凹凸がでてしまうので、8〜20μm
程度が望ましい。またコンデンサ電極21を形成する導
体ペーストの厚さは、7〜15μm程度とすればよい。
さらに誘電体層22を形成する誘電体ペーストの厚さ
は、あまり薄いとショートしてしまい、あまり厚いと表
面に凹凸がでてしまうので、30〜40μm程度が望ま
しい。If the thickness of the barrier layer 4 is too thin, the effect of suppressing the diffusion of the glass component is small, and if it is too thick, the surface becomes uneven, so that the thickness is 8 to 20 μm.
A degree is desirable. Further, the thickness of the conductor paste forming the capacitor electrode 21 may be about 7 to 15 μm.
Furthermore, the thickness of the dielectric paste forming the dielectric layer 22 is short if it is too thin, and if it is too thick, the surface becomes uneven, so about 30 to 40 μm is desirable.
【0019】次に、上記のようにして予めコンデンサ2
やバリア層4およびビア導体3や配線パターン等を形成
したガラスセラミックグリーンシートを複数枚積層した
後、ホットプレス機等で一体化して焼成する。そのとき
のホットプレス機等による圧力は、例えば50〜300
kg/cm2 、温度は60〜90℃程度とする。また焼
成は、例えば450〜600℃程度に加熱してバインダ
等の有機物を除去した後、1100℃以下、例えば80
0から1000℃で行えばよい。Next, the capacitor 2 is preliminarily set as described above.
After laminating a plurality of glass-ceramic green sheets on which the barrier layer 4, the via conductor 3, the wiring pattern, etc. are laminated, they are integrated and fired by a hot press machine or the like. The pressure applied by the hot press machine at that time is, for example, 50 to 300.
The temperature is set to about 60 to 90 ° C. in kg / cm 2 . Further, the firing is performed at a temperature of, for example, 1100 ° C. or lower, for example, 80 ° C.
It may be carried out at 0 to 1000 ° C.
【0020】[0020]
【実施例】以下、本発明によるコンデンサ内蔵ガラスセ
ラミック基板(多層配線基板)の具体的な実施例につい
て説明する。EXAMPLES Specific examples of the glass ceramic substrate with a built-in capacitor (multilayer wiring substrate) according to the present invention will be described below.
【0021】〔実施例〕前記図1に示すようなコンデン
サ内蔵ガラスセラミック多層配線基板を作製するに当た
り、ガラスセラミックグリーンシートを形成するための
ガラスセラミック粉末として、下記表1に示す組成のガ
ラス粉末(平均粒径2.2μm)と、アルミナ粉末(平
均粒径1.7μm)を50:50の比率で混合した。[Examples] In manufacturing a glass-ceramic multilayer wiring board with a built-in capacitor as shown in FIG. 1, as a glass-ceramic powder for forming a glass-ceramic green sheet, a glass powder having the composition shown in Table 1 below ( An average particle size of 2.2 μm) and alumina powder (average particle size of 1.7 μm) were mixed at a ratio of 50:50.
【0022】 [0022]
【0023】上記の混合粉末100重量部に対して、ボ
リビニルブチラール9重量部、フタル酸ジイソブチル7
重量部、オレイン酸1重量部、イソプロピルアルコール
40重量部、トリクロロエタン20重量部を加えてボー
ルミルで24時間混合してスラリーを製作した。そのス
ラリーをドクターブレード法でシート状に成形してガラ
スセラミックグリーンシートを作製した。そのガラスセ
ラミックグリーンシートの厚さは232μmであった。9 parts by weight of poly (vinyl butyral) and 7 parts of diisobutyl phthalate per 100 parts by weight of the above mixed powder.
By weight, 1 part by weight of oleic acid, 40 parts by weight of isopropyl alcohol and 20 parts by weight of trichloroethane were added and mixed in a ball mill for 24 hours to prepare a slurry. The slurry was formed into a sheet by the doctor blade method to prepare a glass ceramic green sheet. The thickness of the glass ceramic green sheet was 232 μm.
【0024】一方、バリア層4を形成するための耐火物
粉末としては、平均粒径0.8μmのアルミナ(住友化
学製AKP−15)、平均粒径1.2μmのマグネシ
ア、平均粒径0.9μmのジルコニア、平均粒径1.5
μmのチタニア、平均粒径1.3μmのカルシアを各々
単独で用い、それぞれエチルセルロース6wt%のター
ピネオール溶液とともにスリーロールミルで混練して5
種類の耐火物ペーストを作製した。On the other hand, as the refractory powder for forming the barrier layer 4, alumina having an average particle size of 0.8 μm (AKP-15 manufactured by Sumitomo Chemical Co., Ltd.), magnesia having an average particle size of 1.2 μm, and an average particle size of 0. 9 μm zirconia, average particle size 1.5
Titania having a particle size of 1.3 μm and calcia having an average particle size of 1.3 μm were used alone, and each was kneaded with a terpineol solution containing 6 wt% of ethyl cellulose in a three roll mill,
A variety of refractory pastes were made.
【0025】またコンデンサ2の電極21を形成するた
めの導体ペーストとしては、平均粒径2μmの粒状Ag
粉100重量部を、エチルセルロース8wt%のターピ
ネオール溶液20重量部とともにスリーロールミルで混
練したものを用いた。さらにコンデンサ2の誘電体層2
2を形成するための誘電体ペーストとしては、平均粒径
0.3μmのPb(Mg1/3 Nb2/3 )O3 粉末100
重量部をエチルセルロース8wt%のターピネオール溶
液30重量部とともにスリーロールミルで混練したもの
を用いた。As the conductor paste for forming the electrodes 21 of the capacitor 2, granular Ag having an average particle size of 2 μm is used.
A powder obtained by kneading 100 parts by weight of powder with 20 parts by weight of a terpineol solution containing 8 wt% of ethyl cellulose in a three-roll mill was used. Furthermore, the dielectric layer 2 of the capacitor 2
As the dielectric paste for forming No. 2, Pb (Mg 1/3 Nb 2/3 ) O 3 powder 100 having an average particle size of 0.3 μm is used.
One part by weight was kneaded with 30 parts by weight of a terpineol solution containing 8% by weight of ethyl cellulose in a three-roll mill and used.
【0026】そして上記の耐火物ペーストおよび導体ペ
ーストや誘電体ペーストを、それぞれ印刷等で所望の厚
さに形成することによってバリア層4およびコンデンサ
2の電極21と誘電体層22を形成した。なおバリア層
4は前記5種類の耐火物ペーストを用いることによって
基板毎に材質を異ならせた。またバリア層4およびコン
デンサ電極21の厚さはそれぞれ10μmとし、誘電体
層22の厚さは30μmに形成した。The refractory paste, the conductor paste, and the dielectric paste described above were each formed into a desired thickness by printing or the like to form the barrier layer 4 and the electrode 21 of the capacitor 2 and the dielectric layer 22. The barrier layer 4 was made of different materials for each substrate by using the above five types of refractory paste. The thickness of the barrier layer 4 and the capacitor electrode 21 was 10 μm, and the thickness of the dielectric layer 22 was 30 μm.
【0027】さらに、ビア導体4は、ガラスセラミック
グリーンシートに形成した直径100μmのスルーホー
ルに導体ペーストを充填して形成した。その導体ペース
トとしては、平均粒径10μmのAg粉末100重量部
を、エチルセルロース5%のターピネオール溶液11重
量部とともにスリーロールミルで混合したものを用い
た。Further, the via conductor 4 was formed by filling a 100 μm diameter through hole formed in a glass ceramic green sheet with a conductor paste. As the conductor paste, 100 parts by weight of Ag powder having an average particle size of 10 μm was mixed with 11 parts by weight of a terpineol solution containing 5% ethyl cellulose in a three-roll mill.
【0028】上記のようにして基板毎に材質の異なるバ
リア層4を有するコンデンサ2やビア導体3を形成した
複数枚のガラスセラミックグリーンシートを互いに積層
し、その積層体を150kg/cm2 、85℃の条件で
加圧成形した。次いで、500℃で3時間保持してバイ
ンダを除去した後、875℃の空気中で20分間焼成し
て実施例1〜5の5種類のコンデンサ内蔵ガラスセラミ
ック基板を作製した。そして、それらの基板に内蔵した
コンデンサの誘電特性を調べた。As described above, a plurality of glass ceramic green sheets having the capacitors 2 and the via conductors 3 each having the barrier layer 4 made of a different material for each substrate are laminated on each other, and the laminated body is 150 kg / cm 2 , 85. Pressure molding was performed under the condition of ° C. Next, after holding at 500 ° C. for 3 hours to remove the binder, firing was performed in air at 875 ° C. for 20 minutes to produce five types of glass ceramic substrates with built-in capacitors of Examples 1 to 5. Then, the dielectric characteristics of the capacitors built in these substrates were examined.
【0029】〔比較例〕また上記の実施例に対する比較
例1として、バリア層を設けない以外は上記と同様の要
領でコンデンサ内蔵ガラスセラミック基板を作製し、そ
の基板に内蔵したコンデンサの誘電特性を調べた。また
比較例2として前記各実施例においてコンデンサ2の誘
電体層22に用いたPb(Mg1/3 Nb2/3 )O3 粉末
をペーストにはせずに粉末のままでプレスして焼成し、
その焼成体の誘電特性を調べた。以上の結果を下記表2
にまとめて示す。なお、表2中の誘電率εおよび誘電損
失tanδは、1kHz、室温での測定値である。[Comparative Example] As Comparative Example 1 with respect to the above-described Examples, a glass ceramic substrate with a built-in capacitor was prepared in the same manner as above except that the barrier layer was not provided, and the dielectric characteristics of the capacitor built in the substrate were measured. Examined. Further, as Comparative Example 2, the Pb (Mg 1/3 Nb 2/3 ) O 3 powder used for the dielectric layer 22 of the capacitor 2 in each of the above Examples was pressed into the powder as it is, without being made into a paste, and fired. ,
The dielectric properties of the fired body were examined. The above results are shown in Table 2 below.
Are shown together. The dielectric constant ε and the dielectric loss tan δ in Table 2 are measured values at 1 kHz and room temperature.
【0030】 [0030]
【0031】上記表2に示した結果から、比較例1のよ
うにバリア層を用いない場合は、ガラス成分の誘電体層
中への拡散によって誘電率は大幅に低下してしまうのに
対し、本発明による実施例1〜5のようにバリア層を形
成した場合には、拡散が抑制され、誘電率は5000以
上に向上し、良好な誘電特性を示している。From the results shown in Table 2 above, when the barrier layer is not used as in Comparative Example 1, the dielectric constant is significantly lowered due to the diffusion of the glass component into the dielectric layer. When the barrier layer is formed as in Examples 1 to 5 according to the present invention, diffusion is suppressed, the dielectric constant is improved to 5000 or more, and good dielectric properties are exhibited.
【0032】[0032]
【発明の効果】以上のように本発明によるコンデンサ内
蔵ガラスセラミック基板は、ガラスセラミック絶縁層と
コンデンサ電極との間に、アルミナ、マグネシア、ジル
コニア、チタニア、カルシアから選択される1種以上の
耐火物粉末を含むバリア層を設けることによって、焼成
時の絶縁体材料成分の誘電体層中への拡散を抑制するこ
とができ、誘電率が高くかつ誘電損失の低いコンデンサ
にすることができる。また前記従来のようにバリア層と
して誘電材料を用いた層や、金属層を形成するよりも安
価な耐火物粉末を用いることができるので、コストの低
減が図れる。また前記従来のように電極層にガラス粉等
を添加するものに比べ電極の電気抵抗値を下げることが
でき、良好な電気特性が得られる等の効果がある。As described above, the glass-ceramic substrate with a built-in capacitor according to the present invention has at least one refractory material selected from alumina, magnesia, zirconia, titania, and calcia between the glass-ceramic insulating layer and the capacitor electrode. By providing the barrier layer containing the powder, it is possible to suppress the diffusion of the insulating material component into the dielectric layer during firing, and it is possible to obtain a capacitor having a high dielectric constant and a low dielectric loss. Moreover, since a layer using a dielectric material as the barrier layer as described above or a refractory powder that is less expensive than forming a metal layer can be used, the cost can be reduced. In addition, the electric resistance value of the electrode can be reduced as compared with the conventional one in which glass powder or the like is added to the electrode layer, and good electric characteristics can be obtained.
【図1】本発明によるコンデンサ内蔵ガラスセラミック
基板の構成例を示す断面図。FIG. 1 is a cross-sectional view showing a configuration example of a glass ceramic substrate with a built-in capacitor according to the present invention.
1 絶縁層 2 コンデンサ 21 コンデンサ用電極 22 誘電体層 3 ビア導体 4 バリア層 1 Insulating Layer 2 Capacitor 21 Capacitor Electrode 22 Dielectric Layer 3 Via Conductor 4 Barrier Layer
Claims (1)
電極、その他の回路用配線等を同時焼成して得るコンデ
ンサ内蔵ガラスセラミック基板において、コンデンサ電
極とガラスセラミック絶縁層との間にガラス成分の拡散
を抑制するアルミナ、マグネシア、ジルコニア、チタニ
ア、カルシアから選択される1種以上の耐火物からなる
バリア層を形成したことを特徴とするコンデンサ内蔵ガ
ラスセラミック基板。1. In a glass-ceramic substrate with a built-in capacitor obtained by simultaneously firing a glass-ceramic insulating layer, a capacitor electrode, and other circuit wiring, etc., the diffusion of glass components between the capacitor electrode and the glass-ceramic insulating layer is suppressed. A glass ceramic substrate with a built-in capacitor, wherein a barrier layer made of one or more refractory materials selected from alumina, magnesia, zirconia, titania, and calcia is formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7267650A JPH0992978A (en) | 1995-09-21 | 1995-09-21 | Glass ceramic board with built-in capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7267650A JPH0992978A (en) | 1995-09-21 | 1995-09-21 | Glass ceramic board with built-in capacitor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0992978A true JPH0992978A (en) | 1997-04-04 |
Family
ID=17447635
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7267650A Withdrawn JPH0992978A (en) | 1995-09-21 | 1995-09-21 | Glass ceramic board with built-in capacitor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0992978A (en) |
Cited By (11)
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---|---|---|---|---|
US6241838B1 (en) | 1997-09-08 | 2001-06-05 | Murata Manufacturing Co., Ltd. | Method of producing a multi-layer ceramic substrate |
KR100352780B1 (en) * | 1998-01-06 | 2002-09-16 | 가부시키가이샤 무라타 세이사쿠쇼 | Multi-layer ceramic substrate and method for producing the same |
WO2003018509A1 (en) * | 2001-08-27 | 2003-03-06 | Motorola, Inc. | Enhanced ceramic layers for laminated ceramic devices |
US7141129B2 (en) * | 2001-12-13 | 2006-11-28 | Harris Corporation | Electronic module including a low temperature co-fired ceramic (LTCC) substrate with a capacitive structure embedded therein and related methods |
JP2007201271A (en) * | 2006-01-27 | 2007-08-09 | Kyocera Corp | Wiring board with built-in capacitor, and its manufacturing method |
KR100790695B1 (en) * | 2006-05-19 | 2008-01-02 | 삼성전기주식회사 | Method of manufacturing the ceramics board for electronic element package |
KR100790694B1 (en) * | 2006-06-30 | 2008-01-02 | 삼성전기주식회사 | Method of manufacturing a ltcc board with embedded capacitors |
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US8717772B2 (en) | 1999-09-02 | 2014-05-06 | Ibiden Co., Ltd. | Printed circuit board |
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-
1995
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Cited By (17)
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KR100317469B1 (en) * | 1997-09-08 | 2002-02-19 | 무라타 야스타카 | Method of producing the multi-layer ceramic substrate |
US6241838B1 (en) | 1997-09-08 | 2001-06-05 | Murata Manufacturing Co., Ltd. | Method of producing a multi-layer ceramic substrate |
KR100352780B1 (en) * | 1998-01-06 | 2002-09-16 | 가부시키가이샤 무라타 세이사쿠쇼 | Multi-layer ceramic substrate and method for producing the same |
US8763241B2 (en) | 1999-09-02 | 2014-07-01 | Ibiden Co., Ltd. | Method of manufacturing printed wiring board |
US9060446B2 (en) | 1999-09-02 | 2015-06-16 | Ibiden Co., Ltd. | Printed circuit board |
US8842440B2 (en) | 1999-09-02 | 2014-09-23 | Ibiden Co., Ltd. | Printed circuit board and method of manufacturing printed circuit board |
US8830691B2 (en) | 1999-09-02 | 2014-09-09 | Ibiden Co., Ltd. | Printed circuit board and method of manufacturing printed circuit board |
US8780573B2 (en) | 1999-09-02 | 2014-07-15 | Ibiden Co., Ltd. | Printed circuit board |
JP2012099861A (en) * | 1999-09-02 | 2012-05-24 | Ibiden Co Ltd | Printed wiring board |
JP2012114457A (en) * | 1999-09-02 | 2012-06-14 | Ibiden Co Ltd | Printed wiring board |
US8717772B2 (en) | 1999-09-02 | 2014-05-06 | Ibiden Co., Ltd. | Printed circuit board |
WO2003018509A1 (en) * | 2001-08-27 | 2003-03-06 | Motorola, Inc. | Enhanced ceramic layers for laminated ceramic devices |
KR100811138B1 (en) * | 2001-11-13 | 2008-03-07 | 오리온피디피주식회사 | method of manufacturing a multilayer circuit board using low temperature cofired ceramic on metal, and a multilayer circuit board manufactured thereby |
US7141129B2 (en) * | 2001-12-13 | 2006-11-28 | Harris Corporation | Electronic module including a low temperature co-fired ceramic (LTCC) substrate with a capacitive structure embedded therein and related methods |
JP2007201271A (en) * | 2006-01-27 | 2007-08-09 | Kyocera Corp | Wiring board with built-in capacitor, and its manufacturing method |
KR100790695B1 (en) * | 2006-05-19 | 2008-01-02 | 삼성전기주식회사 | Method of manufacturing the ceramics board for electronic element package |
KR100790694B1 (en) * | 2006-06-30 | 2008-01-02 | 삼성전기주식회사 | Method of manufacturing a ltcc board with embedded capacitors |
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