JPH0992675A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To mount with high density without requiring a bonding wire. SOLUTION: The front of a semiconductor board formed integrally with a semiconductor element thereon is provided with a front first layer wiring 10 and a front second layer wiring 13, and its rear a rear first layer wiring 16 and a rear second layer wiring 19. The front first layer wiring 10 and the rear first layer wiring 16 are selectively connected to each other via a conductor layer 7 provided in a board through hole formed in a semiconductor board. Further, a solder bump 24 is formed selectively via a solder close adhesion layer 23 on the face layer wiring 13 and the rear second layer wiring 19.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device capable of high-density mounting and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, as a semiconductor device which can be mounted in a small size, Japanese Patent Laid-Open No. 3-104246 discloses a semiconductor device having a connection pad on its side surface as shown in FIG. In FIG. 54, 101 is an IC chip, 102 is a pad provided on the side surface, 103 is a wiring connecting the circuit in the IC chip 101 and the pad 102, and 104 is a characteristic inspection terminal provided on the active surface of the IC chip. is there. Then, when the IC chip 101 is mounted on the circuit board, as shown in FIG.
Electrical connection is made to the circuit board 106 from the pad 102 on the side surface of the device using the bonding wire 105.

[0003]

By the way, the semiconductor device disclosed in the above publication can be mounted thin because the wire height during wire bonding is within the IC chip thickness. However, since the bonding wires are used for connection in the lateral direction for mounting, there is a problem in that the size cannot be reduced and high-density mounting is difficult.

The present invention has been made to solve the above problems of the conventional semiconductor device, and an object of the present invention is to provide a semiconductor device capable of high-density mounting without the need for a bonding wire and a manufacturing method thereof. To do.

[0005]

In order to solve the above-mentioned problems, the invention according to claim 1 is a semiconductor substrate integrally formed with a semiconductor element on one main surface. The semiconductor device is configured by providing wiring formed so as to penetrate up to the main surface and wiring formed on both one main surface and the other main surface. With this configuration, the external electrical connection can be formed on both the one main surface and the other main surface of the semiconductor substrate, which enables high-density mounting such as a stack structure without using bonding wires. Become.

According to a second aspect of the present invention, in the semiconductor device according to the first aspect, both the wiring formed to penetrate from one main surface to the other main surface and the one main surface and the other main surface are both provided. And the wirings formed in the above are selectively electrically connected to each other. Thus, the wiring electrically connected to the semiconductor element can be formed on both main surfaces, so that the semiconductor device having an easy wiring design can be obtained.

According to a third aspect of the present invention, there is provided a step of selectively forming a penetrating portion in a semiconductor substrate having a semiconductor element integrally formed on one main surface, one main surface and another main surface of the semiconductor substrate, and A step of forming an insulating film on the penetrating portion, a step of forming a conductor layer on the one main surface and the other main surface of the semiconductor substrate and the penetrating portion, and a semiconductor so as to leave the conductor layer on the penetrating portion of the semiconductor substrate. Etching back the conductor layers on both main surfaces of the substrate, and selectively connecting at least one wiring to the semiconductor element and the through conductor layer on one main surface and the other main surface of the semiconductor substrate And the step of forming a protective film on the wiring, and forming an opening in the protective film portion on the wiring for electrical connection with the outside, and forming on the wiring located in the opening. Step of selectively forming a solder adhesion layer and forming a solder bump on the solder adhesion layer portion It is to manufacture the semiconductor device in the that step. According to a fourth aspect of the present invention, a substrate hole having a depth of 1/3 to 2/3 of the substrate thickness is selectively formed from the one main surface on a semiconductor substrate integrally formed with the semiconductor element on the one main surface. A step of forming an insulating film on the one main surface of the semiconductor substrate and the substrate hole, a step of forming a conductor layer on the one main surface of the semiconductor substrate and the substrate hole, and a conductor of the substrate hole A step of etching back the conductor layer on the main surface of the semiconductor substrate so as to leave a layer, and at least one or more wires are selectively formed on the conductor layer of the semiconductor element and the substrate hole on the main surface of the semiconductor substrate. And a step of etching back the other main surface of the semiconductor substrate until the conductor layer of the substrate hole appears,
A step of selectively connecting at least one or more wirings to the conductor layer of the substrate hole on the other main surface of the semiconductor substrate; a step of forming a protective film on the wirings; A step of forming an opening portion in a protective film portion on a wiring for connection, a step of selectively forming a solder adhesion layer on the wiring located in the opening portion, and a step of forming a solder bump in the solder adhesion layer portion And to manufacture a semiconductor device.

As a result, the wiring formed on the one main surface and the other main surface of the semiconductor substrate integrally provided with the semiconductor element, and the conductor formed through the substrate selectively connected to the wiring on both main surfaces It is possible to easily manufacture a semiconductor device capable of high-density mounting, which includes a layer and solder bumps selectively formed on the wirings on both main surfaces.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION Next, a first embodiment of a semiconductor device and a method of manufacturing the same according to the present invention will be described with reference to the manufacturing process drawings shown in FIGS. First, as shown in FIG. 1, the openings 4 are selectively formed in the surface protective film 3 formed on the surface of the semiconductor substrate 1 on which the semiconductor element 2 is formed. Next, when the semiconductor substrate is silicon, an etchant such as potassium hydroxide or tetramethylammonium hydroxide that selectively corrodes the semiconductor substrate 1 with respect to the protective film 3, or a water jet or laser that can etch a minute area is used. Using the semiconductor substrate 1,
Etching is performed until it penetrates to form a substrate through hole 5 as shown in FIG. Next, as shown in FIG. 3, an insulating film 6 is formed on the entire surface by thermal oxidation or chemical vapor deposition.
To form Next, as shown in FIG. 4, the substrate through holes 5 are filled by a chemical vapor deposition method or a plating method, and a conductor layer 7 is formed on the front surface and the back surface of the semiconductor substrate 1. Next, as shown in FIG. 5, the conductor layers 7 on the front and back surfaces of the semiconductor substrate 1 are formed.
Is etched back, and the conductor layers 7 on the front and back surfaces of the semiconductor substrate 1 are removed while leaving the conductor layers 7 in the substrate through holes 5.

Next, as shown in FIG. 6, an insulating film 8 is formed on the back surface of the substrate 1 by a chemical vapor deposition method or a physical vapor deposition method. Next, as shown in FIG.
Film 3 and insulating film 6 on the surface of the semiconductor element 2 where the semiconductor element 2 is formed
Opening portions 9 are selectively formed in. Next, as shown in FIG. 8, the surface first layer wiring film 10a is formed on the substrate surface by chemical vapor deposition, physical vapor deposition or plating.
To form Next, as shown in FIG. 9, a surface first layer wiring film
10a is selectively corroded to form the surface first layer wiring 10.
Next, as shown in FIG. 10, a surface first layer wiring protective film 11 is formed on the surface first layer wiring 10 by using a chemical vapor deposition method or a physical vapor deposition method. Next, as shown in FIG. 11, openings 12 are selectively formed in the semiconductor element 2 on the surface of the semiconductor substrate 1 and the protective film 11 on the conductor layer 7. Next, as shown in FIG. 12, a surface second layer wiring film 13a is formed on the surface of the substrate by using a chemical vapor deposition method, a physical vapor deposition method or a plating method. Next, as shown in FIG. 13, the surface second layer wiring film 13a is selectively corroded to form the surface second layer wiring 13. Next, as shown in FIG. 14, the surface second layer wiring protective film 14 is formed on the surface of the semiconductor substrate 1 by using a chemical vapor deposition method or a physical vapor deposition method.

Next, as shown in FIG. 15, openings 15 are selectively formed in the insulating film 8 in the portion of the through hole conductor layer 7 on the back surface of the semiconductor substrate 1. Next, as shown in FIG. 16, a back surface first layer wiring film 16a is formed on the back surface of the semiconductor substrate 1 by using a chemical vapor deposition method, a physical vapor deposition method or a plating method. Next, as shown in FIG. 17, the back surface first layer wiring film 16
a is selectively corroded to form the back surface first layer wiring 16. Next, as shown in FIG. 18, a back surface first layer wiring protective film 17 is formed on the back surface first layer wiring 16 by using a chemical vapor deposition method or a physical vapor deposition method. Next, as shown in FIG. 19, openings 18 are selectively formed in the back surface first layer wiring protection film 17. Next, as shown in FIG. 20, a back surface second wiring film 19a is formed on the back surface of the substrate by using a chemical vapor deposition method, a physical vapor deposition method, or a plating method. Next, as shown in FIG.
The back surface second layer wiring film 19a is selectively corroded to form the back surface second layer wiring 19.

Next, as shown in FIG. 22, a backside second wiring protective film 20 is formed on the backside of the substrate by a chemical vapor deposition method or a physical vapor deposition method. Next, as shown in FIG.
Openings 21 are selectively formed in the surface second layer wiring protective film 14 of the external connection portion on the surface of the semiconductor substrate 1. Next, as shown in FIG. 24, an opening 22 is selectively formed in the second back surface wiring protective film 20 on the external connection portion of the back surface of the semiconductor substrate 1. Next, Figure 25
As shown in FIG. 2, by using the chemical vapor deposition method or the plating method, the external connection portion opening portion 21, on the front and back surfaces of the semiconductor substrate 1,
A solder adhesion layer 23 is selectively formed on 22. Next, as shown in FIG. 26, solder bumps 24 are selectively formed on the solder adhesion layer 23.

Through the above steps, the wiring formed on the front and back surfaces of the semiconductor substrate integrally provided with the semiconductor element, the substrate through-hole conductor layer selectively connected to the front and back wiring, and the front and back surfaces It is possible to easily realize a semiconductor device having a solder bump selectively formed on the wiring and capable of high-density mounting.

Next, a second embodiment of the present invention will be described with reference to the manufacturing process drawings shown in FIGS. First, as shown in FIG. 27, openings 25 are selectively formed in the protective film 3 formed on the surface of the semiconductor substrate 1 on which the semiconductor element 2 is formed. Next, as shown in FIG. 28, when the semiconductor substrate is silicon, an etching solution such as potassium hydroxide or tetramethylammonium hydroxide that selectively corrodes the semiconductor substrate 1 with respect to the protective film 3, or a small area is etched. With a water jet or laser that can
The semiconductor substrate 1 is etched to about 1/3 to 2/3 of its thickness to form a substrate hole 26. Next, as shown in FIG. 29, an insulating film 27 is formed on the entire surface of the substrate 1 including the substrate holes 26 by using thermal oxidation or chemical vapor deposition. Next, as shown in FIG. 30, the substrate hole 26 is filled with a chemical vapor deposition method or a plating method, and a conductor layer 28 is formed on the substrate surface. Next, as shown in FIG. 31, the conductor layer 28 is etched back, and the conductor layer 28 on the surface of the semiconductor substrate 1 is removed leaving the conductor layer 28 in the substrate hole 26.

Next, as shown in FIG. 32, an opening 29 is selectively formed in the protective film 3 and the insulating film 27 in the portion where the semiconductor element 2 is formed. Next, as shown in FIG. 33, a surface first layer wiring film 30a is formed on the substrate surface by using a chemical vapor deposition method, a physical vapor deposition method or a plating method. Next, as shown in FIG. 34, the surface first layer wiring film 30a is selectively corroded to form the surface first layer wiring 30. Next, as shown in FIG. 35, a surface first layer wiring protective film 31 is formed on the surface first layer wiring 30 by using a chemical vapor deposition method or a physical vapor deposition method.
Next, as shown in FIG. 36, openings 32 are selectively formed in the front surface first layer wiring protective film 31. Next, as shown in FIG. 37, a surface second layer wiring film 33a is formed on the substrate surface by using a chemical vapor deposition method, a physical vapor deposition method or a plating method. Next, as shown in FIG. 38, the surface second layer wiring film 33a is selectively corroded to form the surface second layer wiring 33. Next, Fig. 39
As shown in, the surface second layer wiring protective film 34 is formed on the substrate surface by using a chemical vapor deposition method or a physical vapor deposition method.

Next, as shown in FIG. 40, the back surface of the semiconductor substrate 1 is removed by polishing with a physical polishing method or by etching with an etchant such as potassium hydroxide or tetramethylammonium hydroxide that corrodes the semiconductor substrate. Etch back until the conductor layer 28 of the hole 26 appears. Next, as shown in FIG. 41, a back surface protective film 35 is formed on the back surface of the semiconductor substrate 1 by using a chemical vapor deposition method or a physical vapor deposition method. Next, as shown in FIG. 42, the opening 36 is selectively formed in the back surface protective film 35. Next, as shown in FIG. 43, a back surface first layer wiring film 37a is formed on the back surface of the substrate by using a chemical vapor deposition method, a physical vapor deposition method or a plating method. Next, as shown in FIG. 44, the back surface first layer wiring film 37a is selectively corroded to remove the back surface first layer wiring film 37a.
To form Next, as shown in FIG. 45, the back surface first layer wiring 37 is formed by using the chemical vapor deposition method or the physical vapor deposition method.
A back surface first layer wiring protection film 38 is formed on the top surface. Next, as shown in FIG. 46, openings 39 are selectively formed in the back surface first layer wiring protective film 38.
To form Next, as shown in FIG. 47, using a chemical vapor deposition method or a physical vapor deposition method or a plating method,
A backside second wiring film 40a is formed on the backside of the substrate. Next, Fig. 48
As shown in, the back surface second layer wiring film 40a is selectively corroded to form the back surface second layer wiring 40. Next, as shown in FIG. 49, a back surface second layer wiring protective film 41 is formed on the back surface second layer wiring 40 by using a chemical vapor deposition method or a physical vapor deposition method.

Next, as shown in FIG. 50, openings 42 are selectively formed in the surface second layer wiring protective film 34 of the external connection portion on the surface of the semiconductor substrate 1. Next, as shown in FIG. 51, openings 43 are selectively formed in the back surface second layer wiring protective film 41 in the back surface external connection portion of the semiconductor substrate 1. Next, as shown in FIG. 52, a solder adhesion layer 44 is selectively formed in the external connection portion opening portions 42 and 43 on the front and back surfaces of the semiconductor substrate 1 by using a chemical vapor deposition method or a plating method. . Next, as shown in FIG. 53, solder bumps 45 are selectively formed on the solder adhesion layer 44.

Through the above steps, it is possible to easily obtain a semiconductor device having a structure similar to that of the first embodiment and capable of high-density mounting. Particularly, in the second embodiment, a substrate hole having a depth of about 1/3 to 2/3 of the thickness of the semiconductor substrate is formed, a conductor layer is embedded in the substrate hole, and the semiconductor substrate is etched from the back surface. Since the step of making the conductor layer in the substrate hole appear on the back surface is used in the manufacturing process from the step of forming the substrate hole of the semiconductor substrate to the step of etching the semiconductor substrate from the back surface, The mechanical strength of the substrate can be more firmly retained than that of the semiconductor substrate after the substrate through hole is formed. The reason that the depth of the substrate hole is 1/3 to 2/3 of the substrate thickness (usually 0.5 to 0.8 mm) is that the mechanical strength of the semiconductor substrate is increased in the manufacturing process after the process of etching the semiconductor substrate from the back surface. To maintain strength.

[0019]

As described above on the basis of the embodiments,
According to the first aspect of the present invention, since the external electrical connection portions can be formed on both the one main surface and the other main surface of the semiconductor substrate, it is possible to perform high-density mounting such as a stack structure without using a bonding wire. A possible semiconductor device is obtained. According to the second aspect of the invention, the wiring electrically connected to the semiconductor element can be formed on both main surfaces of the semiconductor substrate.
A semiconductor device with easy wiring design can be obtained. According to the third and fourth aspects of the invention, the wiring formed on the one main surface and the other main surface of the semiconductor substrate integrally provided with the semiconductor element, and the substrate selectively connected to the wiring on both main surfaces It is possible to easily manufacture a semiconductor device capable of high-density mounting, which includes a conductor layer penetratingly formed in and a solder bump selectively formed on wirings on both main surfaces.

[Brief description of drawings]

FIG. 1 is a diagram showing a manufacturing process for explaining a first embodiment of a semiconductor device and a manufacturing method thereof according to the present invention.

FIG. 2 is a view showing a manufacturing process subsequent to the manufacturing process shown in FIG. 1;

FIG. 3 is a view showing a manufacturing process following the manufacturing process shown in FIG. 2;

FIG. 4 is a view showing a manufacturing process following the manufacturing process shown in FIG. 3;

FIG. 5 is a view showing a manufacturing process subsequent to the manufacturing process shown in FIG. 4;

FIG. 6 is a view showing a manufacturing process subsequent to the manufacturing process shown in FIG. 5;

FIG. 7 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 6;

FIG. 8 is a view showing a manufacturing process subsequent to the manufacturing process shown in FIG. 7;

9 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 8. FIG.

FIG. 10 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 9.

FIG. 11 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 10.

FIG. 12 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 11.

FIG. 13 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 12.

14 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 13.

15 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 14.

16 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 15.

FIG. 17 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 16.

18 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 17.

FIG. 19 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 18.

20 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 19.

FIG. 21 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 20.

22 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 21. FIG.

23 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 22.

24 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 23.

25 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 24.

26 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 25.

FIG. 27 is a diagram showing a manufacturing process for explaining a second embodiment of the present invention.

FIG. 28 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 27.

29 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 28. FIG.

FIG. 30 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 29.

FIG. 31 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 30.

32 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 31. FIG.

33 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 32.

34 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 33.

FIG. 35 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 34.

36 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 35.

37 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 36.

38 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 37. FIG.

FIG. 39 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 38.

FIG. 40 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 39.

41 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 40. FIG.

42 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 41. FIG.

43 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 42.

FIG. 44 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 43.

FIG. 45 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 44.

FIG. 46 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 45.

FIG. 47 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 46.

48 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 47. FIG.

FIG. 49 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 48.

FIG. 50 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 49.

FIG. 51 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 50.

52 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 51. FIG.

53 is a diagram showing a manufacturing process that follows the manufacturing process shown in FIG. 52.

FIG. 54 is a perspective view showing a configuration example of a conventional semiconductor device.

[Fig. 55] Fig. 55 is a diagram showing a mounting manner of the conventional example shown in Fig. 54.

[Explanation of symbols]

 1 Semiconductor Substrate 2 Semiconductor Element 3 Surface Protective Film 4 Opening 5 Substrate Through Hole 6 Insulating Film 7 Conductor Layer 8 Insulating Film 9 Opening 10 Surface First Layer Wiring 10a Surface First Layer Wiring Film 11 Surface First Layer Wiring protective film 12 Opening part 13 Surface second layer wiring 13a Surface second layer wiring film 14 Surface second layer wiring protection film 15 Opening part 16 Backside first layer wiring 16a Backside first layer wiring film 17 Backside first layer Wiring protective film 18 Opening 19 Backside second layer wiring 19a Backside second layer wiring film 20 Backside second layer wiring protective film 21, 22 Opening 23 Solder adhesion layer 24 Solder bump 25 Opening 26 Substrate hole 27 Insulating film 28 Conductor layer 29 Opening part 30 Surface first layer wiring 30a Surface first layer wiring film 31 Surface first layer wiring protective film 32 Opening part 33 Surface second layer wiring 33a Surface second layer wiring film 34 Surface second Layer wiring protection film 35 Backside protection film 36 Opening 37 Backside first layer wiring 37a Backside first layer wiring film 38 Backside first layer wiring protection 39 opening 40 back side second layer wiring 40a back surface second layer interconnection layer 41 back surface second layer interconnection protective films 42 and 43 openings 44 solder adhesion layer 45 solder bump

Claims (4)

[Claims] 1. A semiconductor substrate integrally formed with a semiconductor element on one main surface, and a wiring formed to penetrate from one main surface to another main surface of the semiconductor substrate, and one main surface and another main surface. And a wiring formed on both surfaces of the semiconductor device. 2. The wiring formed so as to penetrate from the one main surface to the other main surface and the wiring formed on both the one main surface and the other main surface are selectively electrically connected to each other. The semiconductor device according to claim 1, wherein: 3. A step of selectively forming a through part on a semiconductor substrate integrally formed with a semiconductor element on one main surface, and an insulating film on the one main surface and the other main surface of the semiconductor substrate and the through part. A step of forming, a step of forming a conductor layer on the one main surface and the other main surface of the semiconductor substrate and a penetrating portion, and on both main surfaces of the semiconductor substrate so as to leave the conductor layer of the penetrating portion of the semiconductor substrate. A step of etching back the conductor layer, and a step of selectively connecting at least one or more wirings to the semiconductor element and the through conductor layer on the one main surface and the other main surface of the semiconductor substrate. A step of forming a protective film on the wiring, and forming an opening in a protective film portion on the wiring for making an electrical connection with the outside, and selectively forming a solder adhesion layer on the wiring located in the opening. And a step of forming solder bumps on the solder adhesion layer portion. Manufacturing method of semiconductor device. 4. A step of selectively forming a substrate hole having a depth of ⅓ to ⅔ of a substrate thickness from the one main surface on a semiconductor substrate integrally formed with a semiconductor element on the one main surface, A step of forming an insulating film on the one main surface of the semiconductor substrate and the substrate hole; a step of forming a conductor layer on the one main surface of the semiconductor substrate and the substrate hole; and leaving a conductor layer of the substrate hole. A step of etching back the conductor layer on the main surface of the semiconductor substrate, and selectively connecting at least one or more wirings to the conductor layer of the semiconductor element and the substrate hole on the main surface of the semiconductor substrate. A step of forming, a step of etching back the other main surface of the semiconductor substrate until the conductor layer of the substrate hole appears, and a conductor layer of the substrate hole having at least one wiring on the other main surface of the semiconductor substrate. And a step of forming a protective film on the wiring, A step of forming an opening in a protective film portion on a wiring for electrical connection, and selectively forming a solder adhesion layer on the wiring located in the opening, and forming a solder bump on the solder adhesion layer A method of manufacturing a semiconductor device, comprising: