JPH098413A - Manufacture of surface emission element - Google Patents

Abstract

PURPOSE: To provide the manufacturing method of a surface emission element with which its offset amount can be set at the optimum amount when a gain offset method is adopted for improvement of thermal characteristics of the surface emission element. CONSTITUTION: Crystal is grown on the active layer 5 provided between two resonators, which are composed of multilayer film reflecting mirrors 3 and 7, at the board temperature lower than the ordinary growth board temperature, the information of resonance peak and gain peak is obtained after the growth of crystal, and an element is heat-treated at the prescribed temperature in such a manner that the offset amount between the gain peak and the resonant peak becomes the desired temperature characteristics based on the above- mentioned information. As an active layer is grown at a low temperature, the deviation in the amount of gain offset, due to inevitable film thickness distribution and the fluttering etc., of flux, from the designed value can be prevented, and as a gain offset amount is set by the subsequently conducted heat treatment, an optimum offset amount can be set at all times.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface emitting device used for realizing optical interconnection in the fields of optical information processing, optical computing, etc., and particularly, it has a required temperature characteristic without using a temperature controller. Be equipped with
The present invention relates to a method for manufacturing a surface emitting device having environmental resistance that is not affected by the ambient environmental temperature.

[0002]

2. Description of the Related Art Generally, in order to apply the parallelism and the spatial propagation property of light to information processing, it is desirable to integrate elements in a plane direction two-dimensionally. This surface emitting device is described in "Journal of Quantum.
Electronics "(Journal of Quantum Electronic
s), Iga et al., Vol. 24, pp. 1845-1855. When such surface emitting elements are integrated with high density, heat generation when a plurality of surface emitting elements are simultaneously driven becomes a problem. In particular, since the surface emitting element has a multilayer reflective film, the element resistance is likely to be higher than that of the edge emitting element,
Exothermic heat tends to be noticeable. In order to reduce this heat generation, it is necessary to improve the thermal characteristics of the device. To this end, by improving the thermal characteristics, it is possible to supply a constant optical output with constant power consumption even during high temperature operation. It is desired to form a temperature-free surface-emitting element that enables low-cost system design that does not require expensive control devices such as.

As a method of improving the thermal characteristics of the surface emitting element, there is a method of reducing the element resistance described above. Efforts to reduce the element resistance have been made by introducing a graded portion at the interface between the materials of the multilayer reflective film formed by alternately stacking different materials. As such a method, for example, Applied Physics Letters (Ap
plied Physics Letters), vol. 62, 1585-15
87, 60, 466 to 468, and Electronics Letters, 29, 1771 to 1772.

In addition to such a method of reducing the element resistance, the characteristic peculiar to the surface emitting element, that is, the resonance peak wavelength determined by the resonator and the gain peak wavelength determined by the active layer are independent from each other with respect to temperature rise. There is a gain offset method that utilizes the characteristic of shifting to the longer wavelength side. The former resonance peak shifts to 0.07 nm / ° C and the gain peak shifts to the long wavelength side at a rate of 0.3 nm / ° C. When these coincide with each other, the condition for optimizing the element characteristics is most optimized. However, if they coincide with each other at room temperature, they are separated from each other at high temperature and the element characteristics deteriorate. Therefore, if the gain peak is set to an offset state at the short wavelength side of the resonance peak at room temperature so that they coincide with each other when the temperature rises, it is possible to maintain constant device characteristics over a wide temperature range without degrading device characteristics. Can be realized.

[0005]

However, such a gain offset method has some restrictions. First of all, even if the optimum offset amount is determined, due to the nature of crystal growth,
There are limits to film thickness control and source flux control. For example, when InGaAs is used for the active layer, the gain peak may deviate from the set value due to the thickness of the quantum well or the fluctuation of the source flux.
Also, the resonator wavelength may deviate from the set value, making it difficult to apply the offset amount as set.

[0006]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of manufacturing a surface emitting device which can always set the offset amount to an optimum amount when the gain offset method is adopted.

[0007]

According to the manufacturing method of the present invention, a step of growing at a substrate temperature lower than a normal growth substrate temperature at the time of crystal growth of an active layer, and information of a resonance peak and a gain peak after the growth are obtained. The method includes a step of obtaining the information and a step of heat-treating the element at a predetermined temperature so that the amount of offset between the gain peak and the resonance peak has desired temperature characteristics based on the obtained information.

As an example of the manufacturing method of the present invention, GaA
s a step of forming a buffer layer, a multilayer-film reflective mirror, and a clad layer on a substrate at a normal growth substrate temperature; and a step of forming an active layer and a part of the clad layer at a substrate temperature lower than the growth substrate temperature. , The step of projecting light to the element formed so far and measuring the reflectance thereof to obtain the information of the resonance peak and the gain peak, and the offset amount between the gain peak and the resonance peak from the obtained information The method includes a step of heat-treating the element at a predetermined temperature so as to obtain a predetermined temperature characteristic, and a step of laminating and forming the remaining layers of the clad layer and the multilayer film reflecting mirror.

[0009]

According to the present invention, since the active layer is grown at a low temperature, it is possible to avoid the deviation of the gain offset amount from the design value due to the film thickness distribution and flux fluctuations which are unavoidable during the growth. Then, since the gain offset amount is set by heat treatment after that, it is possible to always set the optimum offset amount, and the temperature characteristics of the surface emitting element are always excellent characteristics as designed, the thermal characteristics are stable, and the environment resistance is high. It is possible to improve the sex.

[0010]

Next, the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a surface emitting device according to an embodiment of the present invention. This surface emitting device shows an example in which the oscillation wavelength is 0.98 μm, and the thickness is 0.4 μm on the n-type GaAs substrate 1.
1 has a buffer layer 2 made of n-type GaAs, and has an n-type semiconductor multilayer film reflecting mirror 3 thereon. In this n-type semiconductor multilayer film reflecting mirror 3, n-type AlAs layers and n-type GaAs layers are alternately formed with thicknesses of 81.2 nm and 68.1 nm, respectively.
It is formed by stacking in 5 cycles. Further, an n-type clad layer 4 made of Al _0.25 Ga _0.75 As having a thickness of 0.29 μm is provided thereon, and an active layer 5 is provided thereon. The active layer 5 is formed by forming In _0.15 Ga _0.85 As quantum wells with a thickness of 10 nm between Al _0.25 Ga _0.75 As barrier layers with a thickness of 10 nm to form three layers.

Furthermore, Al having a thickness of 0.29 μm is further formed thereon.
_A p-type clad layer 6 made of _0.25 Ga _0.75 As is provided, and a p-type semiconductor multilayer film reflection mirror 7 is provided thereon in a mesa shape. This p-type semiconductor multilayer film reflecting mirror 7 has a p-type AlAs layer and a p-type GaAs layer with thicknesses of 81.2 nm and 68.1 nm, respectively.
The layers are alternately formed in 15 cycles. And
A GaAs phase correction layer 8 is formed on it, and the phase is corrected with a gold film as an electrode formed thereon in a later step. Then, a high resistance region 9 is formed by ion implantation over the n-type cladding layer 4, the active layer 5, and the p-type cladding layer 6. The high resistance region 9 is formed by ion-implanting protons at 100 KeV and a dose amount of 5 × 10 ¹⁴ cm ⁻² .

In the surface emitting element having such a structure, for example, when the top mesa size is 6 μm square, the gain peak and the resonance peak coincide with each other at 50 ° C., and a substantially constant light output is constantly consumed from room temperature to 80 ° C. When it is attempted to obtain it by electric power, when the gain peak wavelength of the active layer is set to 960 nm at room temperature and the resonance peak is set to 980 nm, the offset amount becomes optimum. This temperature range is extremely reasonable considering the environmental temperature when used in an actual system.

2A to 2C are views showing a method of manufacturing the surface emitting device of the present invention in the order of steps. First, as shown in FIG. 2A, an n-type buffer layer 2, an n-type multilayer-film reflective mirror 3, and an n-type cladding layer 4 are sequentially grown on an n-type GaAs substrate 1. At this time, the temperature of the growth substrate is 620 ° C., and the method of growing each layer can be the same as that used in the conventional surface emitting device.

Then, as shown in FIG. 2B, an active layer 5 is grown on the n-type cladding layer 4. When the active layer 5 is grown, the temperature of the growth substrate is lowered from 620 ° C. up to then to 300 ° C. which is a low temperature. And the V / III ratio is A
Set to about 15 in the s rich state. When the quantum well active layer is grown at this substrate temperature, the normal substrate temperature of 550
It is broader than the lattice constant of crystals formed when grown at ℃. Along with this, the amount of strain changes and the gain peak wavelength of the active layer 5 shifts. The strain of the strained quantum well is relaxed by the AlGaAs layer, which is a barrier layer, and a plurality of quantum wells can be formed. Further, after the growth of the active layer 5, a p-type clad layer 6-1 is laminated with a thickness of about 10 nm while maintaining the substrate temperature of 300 ° C., and a p-type GaAs layer 6-2 is formed on the p-type clad layer 6-1 as a passivation film for preventing oxidation. Laminate to a thickness of about 2 nm.

After that, as shown in FIG. 2C, the substrate temperature is lowered to room temperature, light is projected on the element formed up to the above step, and the reflectance depending on the wavelength is measured. The obtained reflectance characteristic is, for example, the characteristic shown in FIG. Then, based on this characteristic, the gain peak wavelength and the resonance resonance wavelength are obtained from the stop band by the excitonic peak of InGaAs and the n-side resonator, and by matching with the calculation simulation.

Based on this information, the gain peak wavelength is shifted by the heat treatment of the wafer so that the optimum offset amount, for example, 20 nm here is obtained. Here, low temperature growth 3
The relationship between the heat treatment temperature and the gain peak wavelength when heat treating the InGaAs quantum well formed at 00 ° C. is as shown in FIG. According to this relationship, the wafer is heated and the temperature is controlled to shift it to the desired gain peak wavelength.

In this embodiment, it is assumed that there is a gain peak at 900 nm and the resonator resonance wavelength is 980 nm. From this, it is understood that the gain peak should be set to the initial setting of 960 nm in order to obtain the offset amount of 20 nm. Therefore, the heat treatment may be performed at 550 ° C. for 20 minutes.

After this heat treatment, as shown in FIG. 2D, the remaining p-type cladding layer 6 is grown while the substrate temperature is kept at 550 ° C., and the p-type semiconductor multilayer film reflecting mirror 7 is further formed thereon. By forming the phase correction layer 8 and forming the mesa and then forming the high resistance region 9, it is possible to obtain the surface emitting element having the structure shown in FIG. 1 and having a desired temperature characteristic.

It should be noted that the heat treatment temperature should be the same as that of AlAs.
In the case where the crystal quality is high when the substrate temperature is lower than 500 ° C. because it contains a large amount of components, the p-side multilayer mirror 7
May be replaced with a dielectric such as Si and SiO ₂ .

Therefore, in this manufacturing method, the active layer 5 is grown at a low temperature and then heat-treated to set the optimum offset amount. Therefore, the gain offset amount due to the film thickness distribution and flux fluctuations which are unavoidable during the growth is set. Deviation from the design value can be avoided. Therefore, the temperature characteristics of the surface emitting element are always excellent as designed, the thermal characteristics are stable, and the environment resistance can be improved.

In the above embodiment, the oscillation wavelength is set to 98.
Although the wavelength is set to 0 nm, the oscillation wavelength can be set to the 1500 nm or 1300 nm band used for communication by changing the material system. Also in this case, the strained material such as InGaAs is mainly used for the active layer, so that the present invention is effective. The materials and the structure of the surface emitting device described in the above embodiments are not limited to this. However, if the material of the active layer changes, the relationship between the gain peak wavelength and the heat treatment temperature shown in FIG. 4 also changes, and a preliminary experiment is required accordingly. In addition, since such a relationship is also affected by the substrate temperature at the time of initial growth, it is necessary to perform a preliminary experiment even when the substrate temperature is changed. There is some degree of freedom in the substrate temperature for low temperature growth. For such information, see, for example, Journal of Electronic
It is summarized in the 22nd volume of Materials (Journal of Electronic Matereals).

Here, the gain offset amount is taken into consideration for the purpose of improving the temperature characteristic. However, when the gain offset amount is always used only near room temperature, only the temperature rise due to continuous oscillation should be taken into consideration. Well, the offset amount is 5n
About m is sufficient.

[0023]

As described above, according to the present invention, since the active layer is grown at a low temperature, it is possible to avoid the deviation of the gain offset amount from the design value due to the film thickness distribution and flux fluctuations which are unavoidable during the growth. Since the gain offset amount is set by heat treatment after that, it is possible to always set the optimum offset amount. As a result, the temperature characteristics of the surface emitting element to be manufactured always have excellent characteristics as designed, and it becomes possible to always obtain a desired surface emitting element in a stable manner. Such a surface emitting device can be a light source that is not affected by the environment when applied as an optical integrated circuit, and at the same time, a temperature control device etc. are not necessary, so it is extremely effective in realizing low-cost optical interconnection. It will be

[Brief description of drawings]

FIG. 1 is a cross-sectional view of an example of a surface emitting device manufactured by a manufacturing method of the present invention.

FIG. 2 is a cross-sectional view showing the manufacturing method of the present invention in the order of steps.

FIG. 3 is a diagram showing reflectance characteristics of the surface emitting device during manufacturing.

FIG. 4 is a diagram showing a relationship between a heat treatment temperature and a shift amount of a gain peak wavelength in an active layer.

[Explanation of symbols]

 1 n-type GaAs substrate 2 n-type buffer layer 3 n-type multilayer film reflection mirror 4 n-type clad layer 5 active layer 6 p-type clad layer 7 p-type multilayer film reflection mirror 8 phase correction layer

Claims (3)

[Claims] 1. A method of manufacturing a surface-emitting device comprising a resonator composed of two multilayer film reflecting mirrors and an active layer sandwiched between the multilayer film reflecting mirrors, wherein a crystal is usually formed during the growth of the active layer. Growth at a substrate temperature lower than the growth substrate temperature, a step of obtaining information of the resonance peak and the gain peak after the growth, and an offset amount between the gain peak and the resonance peak from the obtained information at a desired temperature. And a step of heat-treating the element at a predetermined temperature so as to obtain characteristics, a method for manufacturing a surface emitting element. 2. A step of forming a buffer layer, a multilayer-film reflective mirror, and a cladding layer on a GaAs substrate at a normal growth substrate temperature, an active layer at a substrate temperature lower than the growth substrate temperature,
The step of forming a part of the clad layer, the step of projecting light to the element formed so far and measuring the reflectance to obtain the information of the resonance peak and the gain peak, and the gain from the obtained information A step of heat-treating the element at a predetermined temperature so that the offset amount between the peak and the resonance peak has a predetermined temperature characteristic, and a step of laminating and forming the remaining layers of the clad layer and the multilayer film reflection mirror. A method for manufacturing a surface emitting device having the characteristics. 3. A buffer layer comprising a GaAs layer and Al
A multilayer film mirror in which As layers and GaAs layers are alternately laminated,
After a layered growth of a clad layer made of an AlGaAs layer at 620 ° C., an active layer having a three-layer structure in which an InGaAs quantum well is sandwiched by AlGaAs barrier layers and a part of the clad layer of the AlGaAs layer are grown at 300 ° C. Heat treatment at a higher temperature to set the offset amount, and then at this temperature, the remaining layers of the AlGaAs cladding layer and AlAs
3. The method for manufacturing a surface emitting device according to claim 2, wherein a multi-layered film reflecting mirror in which layers and GaAs layers are alternately laminated is grown.