JPH0982837A - Manufacture of semiconductor package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To secure a specific bonding area thereby making sure electric connection feasible by a method wherein the bonding part of a wiring pattern is previously coated with a protective film so as to avoid the adhering of any foreign matters to the wiring pattern when a substrate is printed with a flattening agent or a bonding sheet is bonded onto the substrate. SOLUTION: After the formation of a wiring pattern 16 by etching a copper foil 11, the surface of a circuit substrate 10a is coated with a sensitive resist 30 to be exposed for melt away the sensitive resist 30 excluding the bonding part of the wiring pattern 16 so as to form a protective film 30a. Later, both surfaces of the circuit substrate 10a are coated with a resist 18 for flattening the surface of the circuit substrate 10a. Thus, the bonding of the substrate 10a using a bonding sheet can be secured. Furthermore, the protective film 30a coating the bonding part of the wiring pattern 16 fills the role of a stopper of a bonding agent running out of the bonding sheet thereby enabling the adhesion of the bonding agent to the bonding part to be avoided in the integral forming step of a laminated body.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package manufacturing method, and more particularly to a semiconductor package manufacturing method in which a plurality of resin substrates are laminated.

[0002]

2. Description of the Related Art Semiconductor packages such as PPGA (Plastic Pin Grid Array) or PBGA (Plastic Ball Grid Array) are glass epoxy, glass polyimide, B
It is formed by laminating a resin substrate in which a conductor layer such as a copper foil is adhered on the surface of a substrate having electrical insulation such as T resin.
FIG. 9 shows a conventional method for manufacturing a multi-layer semiconductor package (Japanese Patent Publication No. 2-5014). This manufacturing method is characterized by using a substrate for forming a cavity for housing a semiconductor element and a substrate for sealing the cavity at the time of forming the laminated body.

The substrate for forming the cavity and the substrate for sealing the cavity are both formed of a resin substrate on which the above conductor layer is formed. 10 in Fig. 9 (a)
Reference numeral a is a circuit board that is incorporated inside the laminate to form a cavity, and reference numeral 10b is a board that seals the cavity. The circuit board 10a is provided with holes 12 for forming cavities, and a predetermined wiring pattern is formed by etching the conductor layer portion of the resin substrate on which the conductor layer is formed. Substrate 10b has holes 12
Is not provided, and the conductor layer is not subjected to a treatment such as etching.

Reference numeral 14 is an adhesive sheet for bonding a plurality of circuit boards 10a and 10b to each other to form a board laminate. As the adhesive sheet, for example, a film material (prepreg) formed in a film shape with glass fibers impregnated with an adhesive is used. The adhesive sheet 14 is provided between the circuit boards 10a and between the circuit boards 10a.
It is sandwiched between the substrate and the substrate 10b and heated under pressure in a vacuum to obtain an integrated laminate (FIG. 9 (b)). Adhesive sheet 14
Opening holes are provided in advance in accordance with the hole size of the holes 12 provided in each circuit board 10a.

As a method of forming a wiring pattern on a double-sided copper-clad resin substrate which becomes the circuit board 10a, a usual method of forming a resist pattern on the surface of a conductor layer and etching the conductor layer can be applied. After forming a laminate of circuit boards using the adhesive sheet 14, a through hole 20 for connecting a wiring pattern between each layer is formed in the laminate by drilling or the like, and the inner surface of the through hole 20 is formed by electroless plating. A plating layer (for example, a copper plating layer) 22 for conduction is provided, and the plating layer 2
After electrolytic plating (for example, copper plating) is applied to the conductor layers on the outer surface of 2 and the substrate 10b, the conductor layer on the outer surface of the laminate is etched to form a wiring pattern such as a land 24 for joining external connection terminals.

Next, the substrate 1 on the surface side where the cavity is opened
After making a hole in 0b and opening the cavity 26,
The exposed portion of the wiring pattern 16 formed on the internal circuit board 10a is plated with nickel or gold. Finally, an external connection terminal 28 such as a solder ball is joined to the land 24 to obtain a product (FIG. 9 (d)). Alternatively, the lead pin may be directly inserted into the through hole to serve as an external connection terminal.

[0007]

According to the method of manufacturing a semiconductor package described above, a laminated body is formed by sandwiching a circuit board 10a having a hole 12 forming a cavity between substrates 10b having no hole 12 formed therein. By providing the through-holes 20 or performing electroless plating with respect to the inner circuit board 10a can be isolated from the processing such as electroless plating, and the wiring pattern 16 provided on the circuit board 10a can be separated. There is an advantage that the problem of being attacked by a plating solution or the like during these treatments can be solved.

However, in the above-described conventional manufacturing method, since the adhesive sheet 14 is used to bond the circuit board 10a and the board 10b together, the adhesive sheet 14 is adhered when these boards are laminated and integrated. The agent flows out and adheres to the wiring pattern 16, or because the adhesive sheet 14 is a glass fiber hardened with an adhesive, a small piece of glass fiber is peeled from the sheet and exposed in the cavity. It may adhere to the bonding part.

The adhesive sheet 14 is selected and used so that the adhesive does not flow out as much as possible when the substrates are bonded together by applying pressure and heat.
If it adheres to the wiring pattern 16, there arises a problem that a predetermined bonding area cannot be secured as the wiring pattern 16, which causes a defective product. As a method of preventing this, conventionally, after the substrate 10b is bored to open the cavity 26, unnecessary adhesive is removed by jet scrubbing or the like in which alumina powder is sprayed.

However, it is difficult to remove the adhesive adhering to the wiring pattern 16 even if such a treatment is performed, and the reliability of the electrical connection at the bonding portion is not sufficient, and the jet scrub treatment is not performed. There is a problem that the wiring pattern 16 is scraped and thinned by the application, and a required bonding area cannot be obtained.

The present invention has been made to solve these problems, and an object thereof is to form a wiring pattern when a resin substrate is laminated using an adhesive sheet to form a multilayer semiconductor package. It is an object of the present invention to provide a method of manufacturing a semiconductor package, which can prevent unnecessary adhesive from adhering to the bonding part of the device, secure a required bonding area as a wiring pattern, and reliably obtain a highly reliable semiconductor package. To do.

[0012]

The present invention has the following constitution in order to achieve the above object. That is, a plurality of circuit boards, each having a hole forming a cavity and a wiring pattern having a bonding portion on the peripheral portion of the hole, are laminated with an adhesive sheet interposed between the circuit boards, and To form a laminated body by laminating a substrate that seals a cavity formed by the circuit boards of the plurality of layers as an outermost layer via an adhesive sheet, and connect the wiring pattern and the external connection terminal to the laminated body. In the method of manufacturing a semiconductor package, the through holes are provided, and after plating the through holes, an opening for forming a cavity is formed in the substrate that seals the upper surface of the cavity. After covering the bonding portion of the wiring pattern with a protective film, laminating the circuit board and opening the cavity, And removing the film. Further, an opening for forming a cavity is formed in the substrate that seals the upper surface and the lower surface of the cavity. In addition, the bonding portion of the wiring pattern is covered with a protective coating, a resist is applied to the surface of the circuit board to form a flat surface on the circuit board, and then the circuit boards are laminated using an adhesive sheet. And The protective coating is a photosensitive resist.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows a method for producing a circuit board used when forming a semiconductor package by forming a multilayer from a resin board having copper foils deposited on both sides as conductor layers. FIG. 1 (a) shows a cross-sectional view of a resin substrate 10 having copper foils 11 deposited on both sides. Reference numeral 12 is a hole provided in the resin substrate 10 to form a cavity. The resin substrate 10 uses a resin material having electrical insulation such as glass epoxy, glass polyimide, and BT resin as a base material.

FIG. 1B shows a state in which the resin substrate 10 is subjected to an etching treatment to form a circuit substrate 10a having wiring patterns 16 formed on both surfaces. Wiring pattern 1
6 is formed by applying a resist on the surface of the copper foil 11, exposing the copper foil 11 according to a pattern to be formed to form a resist pattern, and etching and removing the copper foil 11 other than the portion covered with the resist. .

This hole 12 is formed in the bonding portion of the wiring pattern 16 connected to the semiconductor element by wire bonding.
Is formed in the vicinity of the peripheral edge of the. The holes 12 provided in the circuit board 10a are set in advance with respect to each circuit board 10a so that when the circuit boards 10a are stacked to form a laminated body, the area of the bonding portion of each circuit board 10a is secured. To do. The size of the hole becomes larger as the hole is located above the cavity 26 when the circuit board 10a is stacked and the cavity 26 is formed.

The wiring pattern 1 is formed by etching the copper foil 11.
After forming 6, the protective film for protecting the bonding portion of the wiring pattern 16 is formed. In this embodiment, a photosensitive resist 30 is applied on the upper surface of the circuit board 10a (see FIG.
(c)), the photosensitive resist 30 is exposed to expose the wiring pattern 1
The protective film 30a is formed by dissolving and removing the photosensitive resist 30 other than the bonding portion 6 of FIG. Fig. 1 (d)
Is a protective coating 30a on the bonding portion of the wiring pattern 16.
Shows the state in which the is formed.

Since the circuit board 10a is adhered to the lower circuit board 10a by the adhesive sheet 14 (prepreg),
It is not necessary to provide the protective coating 30a on the lower surface of the circuit board 10a. When the wiring pattern 16 is formed, a conductor portion may be provided on the inner wall surface of the hole 12 of the circuit board 10a to electrically connect the wiring pattern 16 on the upper surface and the lower surface of the circuit board 10a. In this case,
Also for the conductor portion provided on the inner wall surface of the hole 12, the protective film 30
It is necessary to coat with a.

The protective coating 30a protects the bonding portion of the wiring pattern 16 and finally removes it to expose the original surface of the wiring pattern 16. Therefore, it is preferable that the photosensitive resist 30 used here be one that can be easily removed in a later step by an alkaline solvent or the like. The material for forming the protective coating 30a is not particularly limited as long as it can protect the bonding portion and can be easily removed by a solvent or the like in a later step.

After the bonding portion of the wiring pattern 16 is covered with the protective coating 30a, the resist 18 is applied to both surfaces of the circuit board 10a to make the surface of the circuit board 10a flat (FIG. 1 (e)). The resist 18 is applied with a predetermined thickness so as to smooth the unevenness generated on both surfaces of the circuit board 10a by forming the wiring pattern 16. The resist 18 is applied by a printing method or the like, but since the bonding portion of the wiring pattern 16 is covered with the protective film 30a, the resist 1
It is preferable since it is possible to prevent the resist from adhering to the bonding portion when applying 8. A solder resist or the like is preferably used for the resist 18.

The reason why the resist 18 is applied to the surface of the circuit board 10a in this embodiment is to make the surface of the circuit board 10a flat so that the adhesive sheet 14 ensures the adhesion of the board. is there. The adhesive sheet 1
Depending on the material of No. 4, it is possible to bond the substrate without applying the resist 18. Therefore, the circuit board 10a
The step of applying the resist 18 to the above is not an essential step.

Next, a plurality of the circuit boards 10a produced as described above are laminated between the respective layers of the boards with the adhesive sheet 14 sandwiched therebetween to form a laminate. FIG. 2 shows a circuit board 10a
Are shown on an enlarged scale. Similar to the conventional example shown in FIG. 9, when a laminated body of substrates is formed, the outermost substrate of the laminated body is a substrate 10b having no holes 12.
And the circuit board 10a is sandwiched by the board 10b so that the cavity 26 is sealed.

In this embodiment, as the adhesive sheet 14, a so-called prepreg sheet material is used. A prepreg is a glass fiber that is hardened into a sheet with an adhesive.
Between the circuit board 10a and the prepreg, and the circuit board 10
It is possible to obtain a laminated body in which the adhesive is completely cured by sandwiching it between a and the substrate 10b and heating for a certain period of time while applying pressure in a vacuum, and the adhesive is completely cured.

The protective coating 30a for covering the bonding portion of the wiring pattern 16 acts as a flow stop for the adhesive flowing out from the adhesive sheet 14 in the step of integrally forming by laminating the laminated body, and the adhesive adheres to the bonding portion. This has the effect of preventing this. In addition, in the process of aligning and superposing the adhesive sheet 14 and the circuit board 10a, minute fragments (such as glass fiber pieces) may drop from the adhesive sheet 14 onto the wiring pattern 16. In such a case, However, since the bonding portion is covered with the protective coating 30a, it is possible to prevent the bonding portion from becoming dirty.

3 to 5 show a step of forming a connection portion for connecting the wiring pattern 16 and the external connection terminal on the semiconductor package. FIG. 3 shows a state in which the through hole 20 is formed at the position where the connection portion is formed. The through holes 20 can be formed by drilling the laminated body. It should be noted that the wiring pattern 16 of the circuit board 10 is set in advance to determine whether or not to establish electrical connection with the through hole.

Next, electroless copper plating is applied to the through holes 20.
Electroless copper plating film 32 is formed on the inner wall surface of the electroless copper plating film 32, and electrolytic copper plating is further applied to the electroless copper plating film 32 and the copper foil 11 on the outer surface of the substrate 10b.
4 is formed. FIG. 4 shows a state after electroless copper plating and electrolytic copper plating are performed.

From this state, next, the electrolytic copper plating film 34, which is a conductor layer on the outer surface of the substrate 10b, and the copper foil 11 are etched to form a wiring pattern (FIG. 5). Board 10
The wiring pattern formed on the outer surface of b is a land 36a for connecting an external connection terminal, or a conductor portion 36b for connecting a circuit component such as a capacitor or a resistor,
Alternatively, the conductor portion 36 for attaching the heat sink material
There is c etc.

As described above, in the step of forming the through holes 20 in the laminate, the step of performing electroless copper plating and the electrolytic copper plating, and the step of etching the electrolytic copper plating film 34 and the copper foil 11 to form the wiring pattern. The circuit board 10a inside the stack is completely shielded from the outside. Therefore, there is no concern that the wiring pattern 16 of the circuit board 10a will be attacked by the plating solution or the etching solution.

After forming a wiring pattern such as a land 36a on the outer surface of the laminated body, the substrates 10b and 10b, which have closed the cavity 26, are perforated using a router or the like to open the cavity 26. FIG. 6 shows substrates 10b, 1 for both outer layers.
0b is opened and the cavity 26 is opened.

With the substrates 10b and 10b drilled,
Since the protective coating 30a is formed on the bonding portion of the wiring pattern 16 of the circuit board 10a, the protective coating 30a is removed using a solvent such as an alkaline solvent to expose the wiring pattern 16 for the first time. The protective coating 30a can be easily dissolved and removed with a solvent, and the circuit board 10a
It can be removed without adversely affecting the wiring pattern 16 and other conductors. In this way, the wiring pattern 16 can be exposed without causing the required bonding area to be narrowed or foreign matter being attached because the wiring pattern 16 is narrowed.

After providing a protective film 38 such as a solder resist on the outer surface of the package, nickel plating and gold plating 37 are applied to the bonding portion in order to ensure electrical connection between the bonding portion and the semiconductor element. The base nickel plating and the gold plating 37 are also formed on the land portion 36a and other wiring pattern portions that are electrically connected to the wiring pattern 16. FIG. 7 shows a state in which the external connection terminal 40, the heat sink 42, and the circuit component 44 are attached after the above steps. Thus, a semiconductor package in which the circuit boards 10a are formed in multiple layers is obtained. It should be noted that a heat sink (heat radiator) may be bonded to the outer surface of the substrate 10b without performing a hole-punching process on the substrate 10b that serves as the bottom surface of the cavity 26. Also,
Although this embodiment is a cavity-down type product, it may be a cavity-up type in which an external connection terminal is joined to the bottom surface side of the cavity 26.

In the above-described embodiment, the resin substrate 10 has the base material coated with the copper foil 11 on both sides, but the resin substrate having the copper foil 11 coated on only one surface is used in the same steps. A semiconductor package can be formed by the method. When using the resin substrate having the copper foil 11 provided on one surface thereof, the copper foil 11 on one surface is etched to form the wiring pattern 16, and the bonding portion of the wiring pattern 16 is covered with the protective film 30a. Similarly, a laminated body may be formed using the adhesive sheet 14.

Further, in the above embodiment, the resin substrate is laminated on the surface of the circuit board 10a as the substrate 10b for sealing the cavity 26. However, instead of laminating the resin substrate, the resin substrate is formed on the periphery of the opening of the outer surface of the cavity 26. When the cavity 26 is hermetically sealed by bonding an insulating film or the like and the cavity 26 is opened, the cavity 26 may be opened by peeling off the resin substrate or the film.
As a substrate for sealing the cavity 26, a resin substrate or an insulating film for sealing the cavity 26 is conceptually included. Further, the concept of forming an opening for forming a cavity also includes a method of peeling a resin substrate or a film which is thus bonded to the peripheral edge of the opening of the cavity 26 to seal the cavity 26.

Although solder balls are used as the external connection terminals 40 in the above embodiment, lead pins can be used as the external connection terminals 40. FIG. 8 shows an example using a lead pin. The through hole into which the lead pin is inserted may penetrate the circuit board, or may have a shape that opens halfway through the circuit board.

In the above description, the structure of one package portion is taken up for explanation, but when actually manufacturing a semiconductor package using a resin substrate, it is possible to manufacture a plurality of semiconductor packages at one time. It is manufactured in a multi-cavity form using a large-sized resin substrate. Therefore, the patterning of the wiring pattern is performed on a large-sized substrate, and the application of a resist and the bonding of the substrates using an adhesive sheet are also performed on the large-sized substrate.

[0035]

As described above, according to the method of manufacturing a semiconductor package of the present invention, by coating the bonding portion of the wiring pattern with the protective coating 30a in advance, flattening printing is performed on the substrate or the substrate is bonded. It is possible to prevent foreign matters from adhering to the wiring pattern when they are adhered with a sheet, and to dissolve and remove the protective coating 30a in a subsequent step to ensure a required bonding area, thus ensuring reliable electrical connection. It is possible to obtain a highly reliable semiconductor package, and so on.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a method for manufacturing a circuit board used for manufacturing a semiconductor package.

FIG. 2 is a cross-sectional view of a laminate in which substrates are laminated.

FIG. 3 is a cross-sectional view showing a state in which a through-hole is provided in a laminate of substrates.

FIG. 4 is a cross-sectional view showing a state where plating is applied to a through hole.

FIG. 5 is a cross-sectional view in which an electrolytic copper plating film and a copper foil on a substrate are patterned.

FIG. 6 is a cross-sectional view of a state in which a substrate is perforated and a cavity is opened.

FIG. 7 is a sectional view of a semiconductor package.

FIG. 8 is a sectional view of a semiconductor package using a lead pin as an external connection terminal.

FIG. 9 is an explanatory diagram showing a conventional method for manufacturing a multilayer semiconductor package.

[Explanation of symbols]

 10a Circuit board 10b Board 11 Copper foil 12 Hole 14 Adhesive sheet 16 Wiring pattern 18 Resist 20 Through hole 26 Cavity 30 Photosensitive resist 30a Protective coating 32 Electroless copper plating coating 34 Electrolytic copper plating coating 37 Gold plating 38 Protective coating 40 External connection Terminal 42 heat sink

Claims (4)

[Claims] 1. A plurality of circuit boards, each having a hole forming a cavity and a wiring pattern having a bonding portion at a peripheral portion of the hole, are laminated with an adhesive sheet interposed between the circuit boards, and A board for enclosing the cavity formed by the plurality of layers of circuit boards is laminated on the outermost layer of the circuit board via an adhesive sheet to form a laminated body, and the wiring pattern and the external connection terminals are formed on the laminated body. In the method of manufacturing a semiconductor package, wherein a through hole for connection is provided, plating is applied to the through hole, and then an opening for forming a cavity is formed in a substrate that seals the upper surface of the cavity. After covering the bonding portion of the wiring pattern provided on the substrate with a protective film, stacking the circuit boards and opening the cavity, The method of manufacturing a semiconductor package, which comprises removing the protective coating. 2. The method of manufacturing a semiconductor package according to claim 1, wherein an opening for forming the cavity is formed in the substrate that seals the upper surface and the lower surface of the cavity. 3. A method of laminating a circuit board using an adhesive sheet after coating a protective film on a bonding portion of a wiring pattern and applying a resist to the surface of the circuit board to form a flat surface on the circuit board. Claim 1 or 2 characterized by the above-mentioned.
The manufacturing method of the semiconductor package described in the above. 4. The method for manufacturing a semiconductor package according to claim 1, 2 or 3, wherein the protective coating is a photosensitive resist.