JP2002343818A - Bga wiring substrate, manufacturing method therefor and method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the warp of a BGA wiring board as much as possible or to substantially eliminate it and to improve connection reliability when it is mounted on the other printed wiring board. SOLUTION: Solder resist layers 13a and 13b as protection films are arranged on both sides of the board 12 constituted of an insulating material. The opening part of a mold gate 14 to which resin is injected at the time of sealing the mounted semiconductor chip is made in a part corresponding to the prescribed area of the board 12. An opening part 15 whose shape is almost similar to the mold gate 14 is arranged in a part which is face-symmetrical to the mold gate 14 across the board 12 in the solder resist layer 13b of a ball junction side.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a BGA (ball
More particularly, the present invention relates to a technique useful for reducing the warpage of a BGA type wiring board, a method of manufacturing the same, and a semiconductor device.

[0002]

2. Description of the Related Art In recent years, a BGA type wiring board has been required to be light and thin in order to mount a BGA having a small size and a large number of pins. For this reason, a plastic type laminated glass-epoxy resin composite board or the like is often used as a recent BGA type wiring board.

[0003] Such a plastic type BGA type wiring board is typically a copper-clad resin plate (such as a glass-epoxy resin composite plate) having a copper foil attached to one or both surfaces.
Is formed by applying a resist or etching to form a copper wiring pattern, or by laminating a resin plate having through holes formed therein and copper plating on the inner wall surface thereof with an epoxy adhesive. Then, a required number of semiconductor chips are mounted on the BGA type wiring board thus manufactured, and a semiconductor device is manufactured.

The manufacturing process of this semiconductor device generally includes a process of mounting a semiconductor chip on a substrate (die attaching) and a process of electrically connecting electrodes of the semiconductor chip to wiring patterns on the substrate by wires ( A process of bonding semiconductor chips, wires, etc. with a sealing resin (molding), a process of bonding external connection terminals such as solder balls to a substrate surface opposite to a chip mounting side (ball mounting), This includes processing (dicing or cutting) for dividing the substrate into packages (semiconductor devices). Further, as a form of molding, there are an individual molding method in which molding is performed for each semiconductor chip and a collective molding method in which molding is performed in units of a plurality of semiconductor chips.

[0005] As a recent trend of BGA type wiring boards, from the standpoint of increasing the efficiency of package assembly (assembly), the collective molding method is becoming more mainstream than the individual molding method. In the batch molding method, the die after the die attachment and wire bonding are performed, a molding die (a lower die on which the substrate is placed, and an upper die having a concave portion corresponding to the final shape of the sealing resin) ), The sealing resin is filled while applying heat and pressure.

At this time, a region called a “mold gate portion” is provided in the wiring board as an injection port for filling the sealing resin. The molded gate portion removes a predetermined portion of the insulating layer (typically, a solder resist layer) coated to protect the surface of the wiring board (that is, the predetermined portion when the wiring board is viewed in cross section). Opening part).

FIG. 1 shows a configuration example of a BGA type wiring board having such a mold gate portion. In the figures, (a) and (b) are plan views of the wiring board 1 as viewed from the chip mounting side (front side) and the ball bonding side (back side), respectively, and (c) is an A-
FIG. 4 is a cross-sectional view of a state where a problem has occurred, taken along line A ′. Reference numeral 2 denotes a core substrate made of resin or the like serving as a base of the wiring substrate 1, 3a and 3b denote solder resist layers coated on the chip mounting side and the ball bonding side of the core substrate 2, respectively, and 4 denotes a mold gate portion.

In the collective molding method, the mold gate portion 4 has a wide opening on the chip mounting side of the wiring substrate 1 in order to collectively mold a plurality of semiconductor chips. It is present in a long strip along the length (see FIGS. 1 (a) and 1 (c)). On the other hand, on the ball bonding side of the wiring substrate 1, a portion corresponding to the mold gate portion 4 on the chip mounting side is not opened, and a solder resist layer 3b is formed in this portion (FIG. 1B and FIG. (C)).

As described above, the mold gate portion 4 is provided only on one surface of the wiring substrate 1, and is unevenly distributed in a specific portion on the substrate in a belt shape.

[0010]

As described above, in the conventional BGA type wiring board (FIG. 1), the mold gate portion 4 used for performing molding in a later assembly process is provided on only one surface of the wiring board 1. Therefore, the difference in the area between the solder resist layer 3a formed on the chip mounting side of the wiring board 1 and the solder resist layer 3b formed on the ball joint side (that is, the difference in the thermal expansion coefficient as a whole) is caused. As shown by an arrow in FIG. 1C, the solder resist layer 3b on the ball bonding side shrinks, and as a result, the back side of the substrate 1 shrinks, and the substrate 1 warps by an amount indicated by W in the figure. There was an inconvenience.

[0011] Such inconveniences become more conspicuous especially when a heat treatment is performed during molding in the assembly process. In recent years, in particular, since the thickness of the substrate itself tends to be reduced in accordance with a demand for thinning or the like, the warpage of the substrate is further remarkable. When the package is assembled in a state where the substrate is warped, the back surface of each package (semiconductor device) finally obtained by cutting is also in a warped state (that is, not flat). For this reason, when this package (semiconductor device) is mounted on another mounting substrate such as a printed wiring board, it is difficult to ensure reliable electrical connection between the two.

The present invention has been made in view of the above-mentioned problems in the prior art, and minimizes or substantially eliminates the warpage of a wiring board, thereby improving the connection reliability when mounted on another printed wiring board or the like. It is an object of the present invention to provide a BGA type wiring board, a method for manufacturing the same, and a method for manufacturing a semiconductor device, which can contribute to the enhancement.

[0013]

According to an embodiment of the present invention, there is provided a BGA type wiring board on which a semiconductor chip is mounted, the board comprising an insulating material. A first wiring layer and a second wiring layer, each having a required pattern shape on one surface and the other surface of the substrate, and one of the substrates by covering the first wiring layer; A first solder resist layer formed on a surface of the substrate, and a second solder resist layer formed on the other surface of the substrate so as to cover the second wiring layer, wherein the first solder resist layer Has an opening of a mold gate portion for injecting a resin when sealing a semiconductor chip to be mounted, in a portion corresponding to a predetermined region on one surface of the substrate, and the second solder resist layer has And the mold gate portion across the substrate A portion of the symmetric, B characterized by having an opening of the mold gate portion and substantially the same shape
A GA type wiring board is provided.

According to the BGA type wiring board of this embodiment, a predetermined portion of the first solder resist layer (one side of the substrate) is formed on the second solder resist layer (the other side of the substrate). With respect to the formed mold gate portion, a portion which is symmetric with respect to the plane with the substrate interposed therebetween is opened in the same shape as the mold gate portion. There is no difference. As a result, it is possible to minimize or substantially eliminate the warpage of the wiring substrate.

Therefore, even when a heat treatment is performed during molding in the assembly process, the substrate surface, that is, the back surface of the package (semiconductor device) can be kept flat. As a result, when this package (semiconductor device) is mounted on another printed wiring board or the like, the connection reliability between the two can be improved. According to another embodiment of the present invention, a step of forming a wiring layer having a required pattern shape on both sides of a substrate made of an insulating material, and a step of coating the wiring layer with solder on both sides of the substrate, respectively. Forming a resist layer, and patterning each solder resist layer so as to follow a predetermined shape. In the patterning step, the solder resist layer on one surface side has a predetermined shape on the substrate. In a portion corresponding to the region of the above, an opening of a mold gate portion for injecting a resin when sealing a semiconductor chip to be mounted is formed, and the mold of the solder resist layer on the other surface side is sandwiched by the mold. A method for manufacturing a BGA type wiring board is provided, wherein an opening having substantially the same shape as the mold gate is formed in a portion symmetrical with the gate. .

Further, in the step of forming the wiring layer, a first wiring layer having a pad for connecting a wire connected to an electrode of a semiconductor chip to be mounted is formed on one surface of the substrate, In the step of forming a second wiring layer having a pad for bonding a solder ball as an external connection terminal on the other surface of the substrate, and performing the patterning, in the solder resist layer on one surface side,
An opening is formed in a portion corresponding to the pad of the first wiring layer, and an opening is formed in a portion of the solder resist layer on the other surface corresponding to the pad of the second wiring layer. You may.

According to still another aspect of the present invention, a BG manufactured by the above-described method for manufacturing a BGA type wiring board is provided.
A method for manufacturing a semiconductor device using an A-type wiring board is provided. The method comprises the steps of: mounting a semiconductor chip on the chip mounting area on the one surface side of the BGA type wiring board; and forming the second semiconductor chip exposed from the electrodes of the semiconductor chip and the solder resist layer on the one surface side Electrically connecting a pad of the first wiring layer with a bonding wire, injecting a resin from the mold gate portion, and sealing the semiconductor chip and the bonding wire with the resin; Bonding a solder ball to the pad of the second wiring layer exposed from the solder resist layer on the surface side, and dividing the BGA type wiring board obtained through the above steps into semiconductor device units. It is characterized by including.

[0018]

FIG. 2 schematically shows the structure of a BGA type wiring board according to a first embodiment of the present invention. 2A is a plan view of the BGA type wiring board 11 according to the present embodiment as viewed from the chip mounting side (front surface).
(B) is a plan view of the wiring substrate 11 as viewed from the ball bonding side (back surface), and (c) is a cross-sectional view as viewed along the line AA '. Reference numeral 12 denotes a core substrate made of an insulating material such as resin serving as a base of the wiring substrate 11, 13a denotes a solder resist layer as a protective film (insulating layer) coated on the chip mounting side of the core substrate 12, and 13b denotes a core substrate. Reference numeral 12 denotes a solder resist layer as a protective film (insulating layer) coated on the ball bonding side, reference numeral 14 denotes a mold gate portion provided on the chip mounting side, and reference numeral 15 denotes an opening provided on the ball bonding side.

The mold gate portion 14 is an opening for injecting the sealing resin as described above with reference to FIG. 1, and as shown in FIGS. 2A and 2C, the solder on the chip mounting side. It is defined by a region where the resist layer 13a is not formed. In the present embodiment, the mold gate portions 14 are provided at four positions, and when assembling a package, 3 × 3 (= 9) semiconductor chips arranged in a matrix form from each mold gate portion 14 respectively. Molding is performed collectively.

On the other hand, the opening 15 is a feature of the present invention, has the same shape as the corresponding mold gate 14 on the chip mounting side, and has a portion corresponding to the position of the mold gate (ie, (A position symmetrical with respect to the plane across the substrate). Similarly, the opening 15 is defined by a region where the solder resist layer 13b on the ball joint side is not formed, as shown in FIGS. 2B and 2C.

Hereinafter, a method of manufacturing the BGA type wiring board 11 according to the present embodiment will be described with reference to FIGS. 3 to 5
2 shows a cross-sectional structure as viewed along the line BB 'in FIG. 2, and has a two-layer wiring structure for simplification of the drawing. First, in the first step (see FIG. 3A),
Prepare a glass cloth base copper-clad laminate. That is, a core substrate 12 is formed by impregnating a BT resin, an epoxy resin, a polyimide resin or the like with a glass cloth as a base material, and copper (C
u) Prepare a plate on which the foils 21 are laminated and bonded.

In the next step (see FIG. 3B), a through hole 22 is formed at a required portion of the glass-clad copper-clad laminate 12 (21) by using, for example, a mechanical drill. In this case, depending on the diameter of the through hole 22 to be formed, a required drilling process may be performed using a CO ₂ laser, an excimer laser, or the like instead of using a mechanical drill.

In the next step (see FIG. 3C), a Cu conductive layer 23 is formed on the entire surface including the inner wall of the through hole 22 of the glass cloth base copper clad laminate 12 (21). For example, after forming a thin-film Cu layer on the entire surface by electroless plating of Cu, the conductor layer 23 forms a Cu layer on the thin-film Cu layer by electrolytic plating of Cu using the thin-film Cu layer as a power supply layer. It can be formed by stacking.

In the next step (see FIG. 3D), the glass cloth substrate copper-clad laminate 12 (21) on which the conductor layer 23 is formed
Photosensitive dry films 24a and 24b to be used as etching resists are respectively adhered to both surfaces by thermocompression bonding. In the next step (see FIG. 4A), the dry films 24a and 24b on both sides are exposed using the masks 25a and 25b patterned so as to follow the required wiring pattern shape. That is, the respective masks 25a and 25b are aligned with respect to the respective dry films 24a and 24b, and ultraviolet rays (UV) are irradiated from above the mask 25a and below the mask 25b as indicated by arrows.

In the next step (see FIG. 4B), the dry films 24a and 24b are developed and patterned to follow the shape of the wiring pattern. This can be performed using a developer containing an organic solvent when the dry films 24a and 24b are negative resists, and using an alkaline developer when the dry films 24a and 24b are positive resists. The illustrated example shows a case of a negative type, in which portions of the dry films 24a and 24b that have been irradiated with UV (exposed portions) remain.

In the next step (see FIG. 4C), the dry films 24a and 24b patterned according to the wiring pattern shape are used as a mask, for example, by wet etching (in this case, a solution soluble in Cu is applied). Then, the exposed portion of the Cu layer 23 (including the underlying Cu foil 21) is removed. In the next step (Fig. 4
(See (d)), the dry films 24a and 24b are peeled and removed. As a result, the required wiring patterns (conductor layers 23) are formed on both surfaces of the core substrate 12.

In the next step (see FIG. 5A), a photosensitive solder resist is applied to both surfaces of the core substrate 12 on which the wiring pattern (conductor layer 23) is formed, for example, by screen printing (solder resist). Formation of layers 13a and 13b). In the next step (see FIG. 5B), the solder resist layers 13a and 13b on both sides are exposed using the masks 26a and 26b patterned into a predetermined shape, respectively. That is, each of the solder resist layers 13a, 13
The position of each of the masks 26a and 26b is aligned with respect to b, and ultraviolet light (UV) is irradiated from above the mask 26a and from below the mask 26b as indicated by arrows.

Each mask 26a, 26b used in this step
Are patterned so as to conform to the required shape of the electrode pad, and that the portion corresponding to the mold gate portion has the same front and back patterns. In the next step (see FIG. 5C), the solder resist layer 13a,
13b is developed and patterned so as to conform to the above-mentioned predetermined shape. This can be performed using a developer containing an organic solvent (in the case of a negative type) or an alkali-based developer (in the case of a positive type) in the same manner as in the step of FIG. 4B. The illustrated example shows a case of a negative type, in which portions (exposed portions) of the solder resist layers 13a and 13b irradiated with UV remain.

At this time, the solder resist layers 13a, 13
The portion where b is removed and the core substrate 12 is exposed forms a mold gate portion 14 and an opening 15 corresponding thereto. The portions where the solder resist layers 13a and 13b are removed and the conductor layer (Cu layer) 23 is exposed are pads for connecting bonding wires connected to the electrodes of the semiconductor chip, and solder balls (external connection terminals). To form a pad for bonding.

In the last step (see FIG. 5 (d)), nickel (Ni) electrolysis is performed on the Cu layers 23 (pads) exposed from the solder resist layers 13a and 13b by using the respective Cu layers 23 as power supply layers. Plating, then gold (Au)
Of the conductor layers (Ni / Au
Layers) 27a and 27b are formed. The formation of the Ni / Au layer is performed in order to enhance the adhesion at the time of connecting a bonding wire and the adhesion at the time of joining a solder ball in a later stage.

By the above steps (FIGS. 3 to 5), the BGA type wiring board 11 of the present embodiment is manufactured.
Next, a semiconductor device using the BGA type wiring board 11 of the present embodiment will be described with reference to FIGS. First, in the first step (see FIG. 6A), die attaching and wire bonding are performed.

That is, an adhesive 30 such as an epoxy resin is applied to the chip (or die) mounting area on the solder resist layer 13a of the wiring board 11, and the back surface (electrodes are formed) of the semiconductor chip 31 to be mounted. The semiconductor chip 31 is bonded to the chip mounting area with the adhesive 30 with the surface opposite to the side facing down (die attaching). Then
Pads exposed from the electrodes of the semiconductor chip 31 and the solder resist layer 13a (Cu through the Ni / Au layer 27a)
The layers 23) are electrically connected to each other by, for example, Au bonding wires 32 (wire bonding).

In the example of FIG. 6A, only one semiconductor chip 31 is mounted for simplification of description, but a plurality of semiconductor chips are actually mounted. In the next step (see FIG. 6B), the semiconductor chip 31 and the bonding wires 32 are formed by a batch molding method.
Is sealed with a sealing resin 33. This is the sealing resin 33
By using a molding die (not shown) having a concave portion corresponding to the final shape, heating and pressing are performed while the sealing resin is injected from the mold gate portion 14. In this step, the collective molding method is used, but, of course, the individual molding method may be used instead.

In the last step (see FIG. 6C), the pads (Ni / A) exposed from the solder resist layer 13b are used.
Solder balls 34 on Cu layer 23) via u layer 27b
And reflow the solder balls 3 on the pads.
4 is joined (ball mounting). Further, the wiring board 11 is divided into package units along a division line DD ′ as indicated by a broken line by a dicer or the like, and the semiconductor device 40 is obtained (cutting).

As described above, the BGA type wiring board 11 according to the first embodiment (the semiconductor device 4 using the board)
0) and the method of manufacturing the same, the portion of the wiring substrate 11 on the ball bonding side (back surface) that is symmetric with the mold gate portion 14 on the chip mounting side (front surface) across the substrate 11 is the mold gate Since the opening has the same shape as that of the portion 14, there is no substantial difference in the coefficient of thermal expansion between the two surfaces of the substrate in this portion. As a result, the warpage of the BGA type wiring board 11 can be minimized or substantially eliminated.

Therefore, even when heat treatment is performed during molding in the assembly process, the substrate surface, that is, the back surface of the package (semiconductor device 40) can be kept flat. Thereby, the semiconductor device 40
Is mounted on another printed wiring board or the like, a highly reliable electrical connection between them can be secured. In the first embodiment described above, in order to achieve the intended purpose (reducing the warpage of the substrate), the opening 15 (the same shape as the mold gate 14 existing on the chip mounting side of the wiring substrate 11). The area where the solder resist layer 13b is not formed) is provided at a corresponding portion of the wiring board 11 on the ball bonding side (a plane symmetrical position across the board 11).
The means for achieving the intended purpose is, of course, not limited to this, and other effective means are also conceivable.

That is, as described above with reference to FIG. 1 (prior art), the warpage of the substrate is caused by the difference between the areas of the solder resist layers formed on both sides of the substrate (that is, the overall thermal expansion coefficient). ). Therefore, in order to effectively reduce the warpage of the substrate, the arrangement of the mold gate portions should be devised so that the difference in the coefficient of thermal expansion between both surfaces of the substrate can be minimized.

FIG. 7 shows a BG according to a second embodiment of the present invention.
FIG. 2 schematically shows the configuration of an A-type wiring substrate, and corresponds to the plan view of FIG. 2A in the first embodiment described above. In the second embodiment, each of the molded gate portions 14 provided in a band along the periphery of the wiring board 11a is formed.
The intended purpose is achieved by providing the separation part SP in each of the “a”. In this case, the separation part SP is formed by a part of the solder resist layer 13a on the chip mounting side,
The length and width are appropriately determined in consideration of the ease of assembly. That is, in the second embodiment, by providing the separation portion SP on the chip mounting side of the wiring board 11a, the area of the solder resist layer 13a on the chip mounting side is relatively increased, and the area of the solder resist layer on the ball bonding side is reduced. By making the difference relatively small, the warpage of the substrate is reduced.

In the example of FIG. 7, each mold gate portion 14a is separated at one place, but may be separated at a plurality of places. Separation at a plurality of locations further increases the area of the solder resist layer 13a on the chip mounting side,
The warpage of the substrate can be reduced even more effectively.
Although not particularly shown in FIG. 7, similarly to the first embodiment, an opening having the same shape as each mold gate portion 14a present on the chip mounting side of the wiring board 11a is ball-joined to the wiring board 11a. It may be provided in a corresponding portion on the side. In this case, it can be expected that the warpage of the substrate is substantially eliminated.

In the first and second embodiments described above, the mold gates 14 and 14a are connected to the wiring substrates 11 and 1
Although the form in which the mold gate portion is arranged along the periphery of 1a has been described as an example, it is needless to say that the arrangement form of the mold gate portion is not limited to this. One example is shown in FIG. FIG. 8 schematically shows a configuration of a BGA type wiring board according to a third embodiment of the present invention. As in FIG.
FIG. 2 is a plan view of 1b as viewed from the chip mounting side (front surface).

In the third embodiment, each mold gate portion 14b is formed in an area between the chips so that multiple (three in the illustrated example) semiconductor chips can be individually and simultaneously subjected to collective molding. Are provided along the band. Further, each mold gate portion 14b has a second
A separation unit SP similar to that of the embodiment (FIG. 7) is provided. The selection of the length and width of each separation unit SP, the number of installations, and the like is the same as in the second embodiment. Also in the third embodiment, similarly to the second embodiment, the difference in area between the solder resist layer 13a on the chip mounting side and the solder resist layer on the ball bonding side is relatively reduced, and the warpage of the substrate is reduced. Reduction can be achieved.

In the same manner as in the first embodiment, an opening having the same shape as each molded gate portion 14b existing on the chip mounting side of the wiring board 11b is provided in a corresponding portion on the ball bonding side of the wiring board 11b. By doing so, it can be expected that the warpage of the substrate is substantially eliminated. Note that the BGA type wiring board according to each of the above-described embodiments has been described using a two-layer wiring structure as an example for simplification of description.
Of course, the present invention is not limited to the two-layer wiring structure. For example, a wiring structure in which four or more layers are stacked using a known build-up method or the like may be used.

[0043]

As described above, according to the present invention, B
By devising the shape and arrangement of the solder resist layers on both sides of the GA-type wiring board so that the difference in the coefficient of thermal expansion between both sides of the GA-type wiring board can be minimized, the warpage of the BGA-type wiring board is reduced or substantially reduced. Can be eliminated. As a result, when mounted on another printed wiring board or the like, a highly reliable electrical connection between the two can be ensured.

[Brief description of the drawings]

FIG. 1 is a diagram schematically showing a configuration of a BGA type wiring board according to a conventional technique.

FIG. 2 is a diagram schematically showing a configuration of a BGA type wiring board according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a process of manufacturing the wiring board of FIG. 2;

FIG. 4 is a cross-sectional view showing a manufacturing process following the manufacturing process of FIG. 3;

FIG. 5 is a cross-sectional view showing a manufacturing step that follows the manufacturing step of FIG. 4;

FIG. 6 is a cross-sectional view showing a manufacturing step of a semiconductor device using the wiring board of FIG. 2;

FIG. 7 is a diagram schematically showing a configuration of a BGA type wiring board according to a second embodiment of the present invention.

FIG. 8 is a diagram schematically showing a configuration of a BGA type wiring board according to a third embodiment of the present invention.

[Explanation of symbols]

 11, 11a, 11b BGA type wiring board 12 core board 13a, 13b solder resist layer (protective film / insulating layer) 14, 14a, 14b mold gate section 15 opening having the same shape as mold gate section 23 Cu layer (conductor layer / wiring layer) 27a, 27b Ni / Au layer (conductor layer) 31 semiconductor chip (die) 32 bonding wire 33 sealing resin 34 solder ball (external connection terminal) 40 semiconductor device SP… Separation part (of mold gate part)

Claims (7)

[Claims] 1. A BGA type wiring board on which a semiconductor chip is mounted, comprising: a board made of an insulating material; and a first board formed with a required pattern shape on one surface and the other surface of the board. A wiring layer and a second wiring layer, a first solder resist layer formed on one surface of the substrate by covering the first wiring layer, and a second solder layer covering the second wiring layer. A second solder resist layer formed on the other surface of the substrate, wherein the first solder resist layer seals a semiconductor chip to be mounted on a portion corresponding to a predetermined region on one surface of the substrate. An opening of a mold gate portion for injecting a resin when stopping, wherein the second solder resist layer is substantially symmetric with the mold gate portion at a portion which is plane-symmetric with the mold gate portion with the substrate interposed therebetween. It is characterized by having openings of the same shape. BGA-type wiring board and. 2. The semiconductor device according to claim 1, wherein the first wiring layer has a pad for connecting a wire connected to an electrode of a semiconductor chip to be mounted, and the second wiring layer has a solder ball as an external connection terminal. The first solder resist layer has an opening at a portion corresponding to the pad of the first wiring layer; and the second solder resist layer has the second solder resist layer. 2. The BGA type wiring board according to claim 1, wherein an opening is provided in a portion corresponding to a pad of the wiring layer. A step of forming a wiring layer having a required pattern shape on each side of the substrate made of an insulating material; and a step of forming a solder resist layer on each side of the substrate by covering the wiring layer. Patterning each solder resist layer so as to follow a predetermined shape. In the patterning step, the solder resist layer on one side corresponds to a portion corresponding to a predetermined region of the substrate. An opening of a mold gate portion for injecting a resin when sealing a semiconductor chip to be mounted is formed, and a solder resist layer on the other surface is plane-symmetric with the mold gate portion across the substrate. Wherein an opening having substantially the same shape as the mold gate portion is formed in the portion B
Manufacturing method of GA type wiring board. 4. In the step of forming the wiring layer, a first wiring layer having a pad for connecting a wire connected to an electrode of a semiconductor chip to be mounted is formed on one surface of the substrate, Forming a second wiring layer having a pad for bonding a solder ball as an external connection terminal on the other surface of the substrate, and performing the patterning in the second step; An opening is formed in a portion corresponding to the pad of the first wiring layer, and an opening is formed in a portion of the solder resist layer on the other surface side corresponding to the pad of the second wiring layer. The method for manufacturing a BGA type wiring board according to claim 3. 5. A method for manufacturing a semiconductor device using a BGA type wiring board manufactured by the method for manufacturing a BGA type wiring board according to claim 4, wherein the one side of the BGA type wiring board is provided. A step of mounting a semiconductor chip in a chip mounting area; and electrically connecting an electrode of the semiconductor chip to a pad of the first wiring layer exposed from the solder resist layer on the one surface side by a bonding wire. Performing a step of injecting a resin from the mold gate portion and sealing the semiconductor chip and the bonding wires with the resin; and a step of exposing the second surface exposed from the solder resist layer on the other surface side. Joining a solder ball to a pad of a wiring layer, and dividing the BGA type wiring board obtained through the above steps into each semiconductor device unit The method of manufacturing a semiconductor device according to claim. 6. A BGA type wiring board on which a semiconductor chip is mounted, comprising: a substrate made of an insulating material; and a first pattern formed on one surface and the other surface of the substrate, each having a required pattern shape. A wiring layer and a second wiring layer, a first solder resist layer formed on one surface of the substrate by covering the first wiring layer, and a second solder layer covering the second wiring layer. A second solder resist layer formed on the other surface of the substrate, wherein the first solder resist layer seals a semiconductor chip to be mounted on a portion corresponding to a predetermined region on one surface of the substrate. It has an opening of a mold gate portion for injecting a resin when stopping, and a separation portion formed by a part of the first solder resist layer is provided in at least one place of the mold gate portion. Characteristic BGA type wiring Plate. 7. The semiconductor device according to claim 7, wherein the second solder resist layer has an opening having substantially the same shape as the mold gate portion at a portion which is plane-symmetric with the mold gate portion provided with the separation portion. The BGA type wiring board according to claim 6.