JPH0964543A - Production of multilayered flexible printed wiring board - Google Patents

Production of multilayered flexible printed wiring board

Info

Publication number
JPH0964543A
JPH0964543A JP22001895A JP22001895A JPH0964543A JP H0964543 A JPH0964543 A JP H0964543A JP 22001895 A JP22001895 A JP 22001895A JP 22001895 A JP22001895 A JP 22001895A JP H0964543 A JPH0964543 A JP H0964543A
Authority
JP
Japan
Prior art keywords
circuit
printed wiring
flexible printed
wiring board
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22001895A
Other languages
Japanese (ja)
Inventor
Hiroyuki Fukai
弘之 深井
Yuji Tosaka
祐治 登坂
Shin Takanezawa
伸 高根沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP22001895A priority Critical patent/JPH0964543A/en
Publication of JPH0964543A publication Critical patent/JPH0964543A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To interconnect the circuit layers through via holes of a small diameter by producing a multilayer flexible printed wiring board continuously according to a roll-to-roll system. SOLUTION: A photosensitive insulation layer 5 is formed on the circuit face 4 of a flexible printed wiring board on which a circuit 41 is formed. A via hole 6 is then made through the insulation layer by a photo process followed by formation of a circuit 42 on the surface of the insulation layer and the interlayer connection through a via hole. When a multilayered flexible printed wiring board comprising three layers or more is produced, a circuit face 4a including the circuit 42 is formed, as a next circuit face, on the surface of the insulation layer and the process is repeated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、多層フレキシブル
プリント配線板の製造方法に関する。さらに詳細にいえ
ば、バイアホールによって異なる回路層間を接続する多
層フレキシブルプリント配線板の製造方法に関し、前記
バイアホールをフォトプロセスにより形成する多層フレ
キシブルプリント配線板の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer flexible printed wiring board. More specifically, it relates to a method for manufacturing a multilayer flexible printed wiring board that connects different circuit layers by via holes, and to a method for manufacturing a multilayer flexible printed wiring board in which the via holes are formed by a photo process.

【0002】[0002]

【従来の技術】フレキシブルプリント配線板は、接着剤
を塗布乾燥したベースフィルムに銅はくラミネート、レ
ジストパターン形成、エッチングによる回路パターン形
成、カバーレイ形成、端子及びランド部めっきの工程で
製造される。片面のフレキシブルプリント配線板は、長
尺でロール状に巻かれた原材料を連続処理し、ロール状
に巻きとり、次工程に供するいわゆるロールツーロール
方式によって製造効率を高めている。
2. Description of the Related Art Flexible printed wiring boards are manufactured by the steps of copper foil laminating on a base film coated with an adhesive, drying, resist pattern formation, circuit pattern formation by etching, coverlay formation, and terminal and land plating. . The one-sided flexible printed wiring board is manufactured by a so-called roll-to-roll method in which raw materials which are long and wound in a roll shape are continuously processed, wound in a roll shape, and used in the next step.

【0003】[0003]

【発明が解決しようとする課題】ところが、両面フレキ
シブルプリント配線板を製造するときには、レジストパ
ターン形成の前に、スルーホール接続用の穴あけ及びス
ルーホールめっきの工程がある。スルーホール接続用の
穴あけは、ベースフィルムを貫通する必要上、メカニカ
ルドリリングによる。このメカニカルドリリングは、所
定のワークサイズに切断して行う必要があり、ロールツ
ーロール方式によって連続的に加工できない。また、直
径が0.2mm以下の小径加工もメカニカルドリリング
では困難である。
However, when manufacturing a double-sided flexible printed wiring board, there is a step of forming holes for through-hole connection and a step of through-hole plating before forming a resist pattern. Drilling for through hole connection is performed by mechanical drilling because it needs to penetrate the base film. This mechanical drilling needs to be performed by cutting into a predetermined work size, and cannot be continuously processed by the roll-to-roll method. Further, it is difficult to perform small diameter machining with a diameter of 0.2 mm or less by mechanical drilling.

【0004】本発明は、ロールツーロール方式によって
連続作業が可能な多層フレキシブルプリント配線板の製
造方法を提供することを目的とする。
It is an object of the present invention to provide a method for manufacturing a multilayer flexible printed wiring board which enables continuous work by a roll-to-roll method.

【0005】[0005]

【課題を解決するための手段】本発明は、回路41を形
成したフレキシブルプリント配線板の回路面4に感光性
の絶縁層5を形成し、フォトプロセスによりこの絶縁層
にバイアホール6を形成し、絶縁層表面に回路42形成
及びバイアホール6による層間接続を行うことを特徴と
する多層フレキシブルプリント配線板の製造方法であ
る。3層以上の多層フレキシブルプリント配線板を製造
するときには、絶縁層表面に回路42を含む回路面4a
を次の回路面として、同じ工程を繰り返す。
According to the present invention, a photosensitive insulating layer 5 is formed on a circuit surface 4 of a flexible printed wiring board on which a circuit 41 is formed, and a via hole 6 is formed in this insulating layer by a photo process. The method for producing a multilayer flexible printed wiring board is characterized in that the circuit 42 is formed on the surface of the insulating layer and the interlayer connection is performed by the via hole 6. When manufacturing a multilayer flexible printed wiring board having three or more layers, the circuit surface 4a including the circuit 42 on the insulating layer surface.
The same process is repeated with the next circuit surface.

【0006】[0006]

【発明の実施の形態】以下図面を参照しながら、説明す
る。まず、ベースフィルム1に接着剤層2を介して銅は
く3をラミネートする(図1(a)参照)。
DETAILED DESCRIPTION OF THE INVENTION A description will be given below with reference to the drawings. First, the copper foil 3 is laminated on the base film 1 via the adhesive layer 2 (see FIG. 1A).

【0007】次に、回路41となる部分を覆うようにエ
ッチングレジストを形成し、エッチング法により回路4
1を形成する(図1(b)参照)。
Next, an etching resist is formed so as to cover the portion to be the circuit 41, and the circuit 4 is formed by the etching method.
1 is formed (see FIG. 1B).

【0008】次に、回路41を含む回路面4全面に感光
性の絶縁層5を形成する(図1(c)参照)。感光性の
絶縁層5を形成する方法としては、液状の樹脂を用いる
ロールコート法やカーテンコート法、フィルム状にした
樹脂を用いるラミネート法がある。絶縁層5との接着性
を良くするために、回路41の表面に微細な凹凸を形成
するのが好ましい。回路41の表面を酸化したり、酸化
した後、水素化ホウ素ナトリウム又はジメチルアミンボ
ランのような還元剤で還元することにより、回路41の
表面に微細な凹凸を形成することができる。
Next, a photosensitive insulating layer 5 is formed on the entire circuit surface 4 including the circuit 41 (see FIG. 1C). As a method for forming the photosensitive insulating layer 5, there are a roll coating method using a liquid resin, a curtain coating method, and a laminating method using a film-shaped resin. In order to improve the adhesiveness with the insulating layer 5, it is preferable to form fine irregularities on the surface of the circuit 41. Fine irregularities can be formed on the surface of the circuit 41 by oxidizing the surface of the circuit 41 or by oxidizing the surface of the circuit 41 with a reducing agent such as sodium borohydride or dimethylamineborane.

【0009】次に、感光性の絶縁層5の表面に、バイア
ホール6を形成したい部分に光線が当たらないようにし
たフォトマスクを置き、露光し、露光しない部分を現像
液で食刻して、バイアホール6を形成する(図1(d)
参照)。
Next, a photomask is formed on the surface of the photosensitive insulating layer 5 so that the light beam does not hit the portion where the via hole 6 is to be formed, exposed, and the unexposed portion is etched with a developing solution. , Via hole 6 is formed (FIG. 1D).
reference).

【0010】次に、感光性の絶縁層5の表面に回路42
を形成し、バイアホール6の内壁にめっきして層間回路
を電気的に接続する(図1(e)参照)。感光性の絶縁
層5の表面に回路42を形成する方法としては、感光性
の絶縁層5の表面全面に無電解めっき銅を析出させ、必
要により電解めっきにより回路導体を所定の厚さにして
回路とならない部分をエッチングで除去する方法、感光
性の絶縁層5の表面の回路とならない部分にめっきレジ
ストを形成して、必要な個所に無電解めっきする方法い
ずれによってもよい。無電解めっきに先立って、感光性
の絶縁層5の表面を酸化性の粗化液で処理して粗化す
る。また、全面無電解めっき又は必要な個所に無電解め
っきのいずれによるにしても、感光性の絶縁層5にめっ
き触媒を含有させておくか、粗化した後にめっき触媒を
付着させることが必要である。
Next, a circuit 42 is formed on the surface of the photosensitive insulating layer 5.
Are formed and plated on the inner wall of the via hole 6 to electrically connect the interlayer circuit (see FIG. 1E). As a method of forming the circuit 42 on the surface of the photosensitive insulating layer 5, electroless plated copper is deposited on the entire surface of the photosensitive insulating layer 5, and if necessary, the circuit conductor is made to have a predetermined thickness by electrolytic plating. Either a method of removing a portion that does not become a circuit by etching or a method of forming a plating resist on a portion of the surface of the photosensitive insulating layer 5 that does not become a circuit and performing electroless plating at a necessary portion may be used. Prior to electroless plating, the surface of the photosensitive insulating layer 5 is roughened by treating it with an oxidizing roughening solution. In addition, whether by electroless plating on the entire surface or electroless plating at a required place, it is necessary to contain a plating catalyst in the photosensitive insulating layer 5 or to attach the plating catalyst after roughening. is there.

【0011】2層のフレキシブルプリント配線板とする
ときは、この後、端子及びランド部を除いて、回路面を
保護するカバーレイを形成し、端子及びランド部にはん
だめっき、ニッケルめっき又は金めっきを施す。
In the case of a two-layer flexible printed wiring board, a cover lay for protecting the circuit surface is formed thereafter except the terminals and lands, and the terminals and lands are solder-plated, nickel-plated or gold-plated. Give.

【0012】感光性の絶縁層5の表面に形成した回路4
2を含む回路面を次の回路面4として工程を繰り返すこ
とにより、3層以上のフレキシブルプリント配線板を製
造できる。
The circuit 4 formed on the surface of the photosensitive insulating layer 5.
By repeating the process with the circuit surface including 2 as the next circuit surface 4, a flexible printed wiring board having three or more layers can be manufactured.

【0013】[0013]

【実施例】【Example】

実施例1 厚さ35μmの接着剤層を設けた厚さ25μmのポリイ
ミドフィルムの接着剤層表面に、厚さ18μmの電解銅
はくを重ね、温度170℃、圧力3MPaで30分間加
熱加圧した。次に、この銅はく面をエッチングして回路
を形成した。次に、フタル酸変性ノボラック型エポキシ
アクリレート(日本化薬株式会社製、商品名R−525
9を使用)70部(重量部、以下同じ)、アクリロニト
リルブタジエンゴム(日本合成ゴム株式会社製、商品名
PNR−1Hを使用)20部、アルキルフェノール樹脂
(日立化成工業株式会社製、商品名ヒタノール2400
を使用)3部、光重合開始剤(チバガイギー社製、商品
名イルガキュア651を使用)7部、水酸化アルミニウ
ム(昭和電工株式会社製、商品名ハイジライトH−42
Mを使用)10部からなる組成物を回路面にロールコー
トにより塗布し、80℃で10分間乾燥して、厚さ50
μmの絶縁層を形成した。次に、バイアホールとなる個
所に遮蔽部を設けたフォトマスクを通して、400mJ
/cm2 の紫外線を照射、1%炭酸ナトリウム水溶液で
30℃、2分間現像処理してバイアホールを形成し、後
露光のため、2J/cm2 の紫外線を照射した。次に、
50℃に加温した粗化液(KMnO4 :60g/l、N
aOH:40g/l水溶液)に3分間浸漬し、SnCl
2 :30g/l、HCl:300ml/l水溶液に3分
間浸漬して中和して、絶縁層表面を粗化した。次に、P
dCl2 を含む無電解めっき触媒液(日立化成工業株式
会社製、商品名HS−202Bを使用)に常温で10分
間浸漬、水洗、無電解めっき液(日立化成工業株式会社
製、商品名CUST201を使用)に常温で25分間浸
漬、水洗、その後、硫酸銅の電解めっきをして、厚さ2
0μmの導体層を形成し、150℃で30分間アニーリ
ングした。次に、回路として残す部分にエッチングレジ
スト形成、エッチング、エッチングレジスト除去の順に
処理して回路を形成した。
Example 1 An electrolytic copper foil having a thickness of 18 μm was superposed on the adhesive layer surface of a polyimide film having a thickness of 25 μm provided with an adhesive layer having a thickness of 35 μm, and heated and pressed at a temperature of 170 ° C. and a pressure of 3 MPa for 30 minutes. . Next, the copper foil surface was etched to form a circuit. Next, phthalic acid-modified novolac type epoxy acrylate (Nippon Kayaku Co., Ltd., trade name R-525
9 parts) 70 parts (parts by weight, the same applies hereinafter), acrylonitrile butadiene rubber (manufactured by Japan Synthetic Rubber Co., Ltd., product name PNR-1H is used) 20 parts, alkylphenol resin (manufactured by Hitachi Chemical Co., Ltd., product name Hitanol 2400)
3 parts, a photopolymerization initiator (made by Ciba Geigy, trade name Irgacure 651) 7 parts, aluminum hydroxide (manufactured by Showa Denko KK, trade name Heidilite H-42)
10 parts by weight of the composition is applied to the circuit surface by roll coating and dried at 80 ° C. for 10 minutes to give a thickness of 50.
A μm insulating layer was formed. Then, through a photomask with a shielding part at the via hole, 400 mJ
/ Cm 2 of ultraviolet ray was irradiated, and a 1% sodium carbonate aqueous solution was developed at 30 ° C. for 2 minutes to form a via hole, and for post-exposure, 2 J / cm 2 of ultraviolet ray was irradiated. next,
Roughening solution heated to 50 ° C. (KMnO 4 : 60 g / l, N
aOH: 40 g / l aqueous solution) for 3 minutes, SnCl
The surface of the insulating layer was roughened by immersing it in an aqueous solution of 2:30 g / l and HCl: 300 ml / l for 3 minutes for neutralization. Then P
Immerse in an electroless plating catalyst solution containing dCl 2 (using Hitachi Chemical Co., Ltd., trade name HS-202B) for 10 minutes at room temperature, wash with water, electroless plating solution (manufactured by Hitachi Chemical Co., Ltd., trade name CUST201) (Use) at room temperature for 25 minutes, rinse with water, and then electrolytically plate copper sulfate to a thickness of 2
A 0 μm conductor layer was formed and annealed at 150 ° C. for 30 minutes. Next, a circuit was formed by processing etching resist formation, etching, and etching resist removal in the order to leave the circuit.

【0014】実施例2 厚さ35μmの接着剤層を設けた厚さ25μmのポリイ
ミドフィルムの接着剤層表面に、厚さ18μmの電解銅
はくを重ね、温度170℃、圧力3MPaで30分間加
熱加圧した。次に、この銅はく面をエッチングして回路
を形成した。次に、フタル酸変性ノボラック型エポキシ
アクリレート(日本化薬株式会社製、商品名R−525
9を使用)70部(重量部、以下同じ)、アクリロニト
リルブタジエンゴム(日本合成ゴム株式会社製、商品名
PNR−1Hを使用)20部、アルキルフェノール樹脂
(日立化成工業株式会社製、商品名ヒタノール2400
を使用)3部、光重合開始剤(チバガイギー社製、商品
名イルガキュア651を使用)7部、水酸化アルミニウ
ム(昭和電工株式会社製、商品名ハイジライトH−42
Mを使用)10部、無電解めっき用触媒(パラジウム付
加充填剤、日立化成工業株式会社製、商品名Cat#1
4を使用)5部からなる組成物を回路面にロールコート
により塗布し、80℃で10分間乾燥して、厚さ50μ
mの絶縁層を形成した。次に、バイアホールとなる個所
に遮蔽部を設けたフォトマスクを通して、400mJ/
cm2 の紫外線を照射、1%炭酸ナトリウム水溶液で3
0℃、2分間現像処理してバイアホールを形成し、後露
光のため、2J/cm2 の紫外線を照射した。次に、5
0℃に加温した粗化液(KMnO4 :60g/l、Na
OH:40g/l水溶液)に3分間浸漬し、SnCl
2 :30g/l、HCl:300ml/l水溶液に3分
間浸漬して中和して、絶縁層表面を粗化した。次に、無
電解めっき液(日立化成工業株式会社製、商品名CUS
T201を使用)に常温で25分間浸漬、水洗、その
後、硫酸銅の電解めっきをして、厚さ20μmの導体層
を形成し、150℃で30分間アニーリングした。次
に、回路として残す部分にエッチングレジスト形成、エ
ッチング、エッチングレジスト除去の順に処理して回路
を形成した。
Example 2 An electrolytic copper foil having a thickness of 18 μm was superposed on the adhesive layer surface of a polyimide film having a thickness of 25 μm provided with an adhesive layer having a thickness of 35 μm, and heated at a temperature of 170 ° C. and a pressure of 3 MPa for 30 minutes. Pressurized. Next, the copper foil surface was etched to form a circuit. Next, phthalic acid-modified novolac type epoxy acrylate (Nippon Kayaku Co., Ltd., trade name R-525
9 parts) 70 parts (parts by weight, the same applies hereinafter), acrylonitrile butadiene rubber (manufactured by Japan Synthetic Rubber Co., Ltd., product name PNR-1H is used) 20 parts, alkylphenol resin (manufactured by Hitachi Chemical Co., Ltd., product name Hitanol 2400)
3 parts, a photopolymerization initiator (made by Ciba Geigy, trade name Irgacure 651) 7 parts, aluminum hydroxide (manufactured by Showa Denko KK, trade name Heidilite H-42)
10 parts, catalyst for electroless plating (palladium addition filler, manufactured by Hitachi Chemical Co., Ltd., trade name Cat # 1)
4) is applied to the circuit surface by roll coating and dried at 80 ° C. for 10 minutes to give a thickness of 50 μm.
m insulating layer was formed. Next, pass through a photomask with a shielding part at the via hole to 400 mJ /
Irradiate with cm 2 of ultraviolet rays and 3 with 1% sodium carbonate solution
It was developed at 0 ° C. for 2 minutes to form a via hole, and for post-exposure, it was irradiated with 2 J / cm 2 of ultraviolet rays. Next, 5
The roughening solution heated to 0 ° C. (KMnO 4 : 60 g / l, Na
OH: 40g / l aqueous solution) for 3 minutes, SnCl
The surface of the insulating layer was roughened by immersing it in an aqueous solution of 2:30 g / l and HCl: 300 ml / l for 3 minutes for neutralization. Next, an electroless plating solution (made by Hitachi Chemical Co., Ltd., trade name CUS
(T201 is used) at room temperature for 25 minutes, washed with water, and then electrolytically plated with copper sulfate to form a conductor layer having a thickness of 20 μm, and annealed at 150 ° C. for 30 minutes. Next, a circuit was formed by processing etching resist formation, etching, and etching resist removal in the order to leave the circuit.

【0015】以上の各工程は、すべてロールツーロール
方式で実施した。また、バイアホールの直径を0.1m
mとしても、回路層相互間を電気に接続できた。さら
に、回路層の導体厚みを20μmとすることができ、ラ
イン/スペース=0.08mm/0.08mmの回路を
精度良く形成できた。
All the above steps were carried out by a roll-to-roll system. The diameter of the via hole is 0.1m.
Even with m, the circuit layers could be electrically connected to each other. Furthermore, the conductor thickness of the circuit layer can be set to 20 μm, and a circuit of line / space = 0.08 mm / 0.08 mm can be formed accurately.

【0016】[0016]

【発明の効果】本発明によれば、回路を形成したフレキ
シブルプリント配線板の回路面に感光性の絶縁層を形成
し、フォトプロセスによりこの絶縁層にバイアホールを
形成し、絶縁層表面の回路形成及びバイアホールによる
層間接続を行うことにより、ロールツーロール方式で連
続的に作業でき、かつ小径のバイアホールにより回路層
相互間を電気に接続できる。
According to the present invention, a photosensitive insulating layer is formed on the circuit surface of a flexible printed wiring board on which a circuit is formed, and a via hole is formed in this insulating layer by a photo process to form a circuit on the surface of the insulating layer. By forming and connecting the layers by via holes, the roll-to-roll method can be continuously performed, and the circuit layers can be electrically connected to each other by the small diameter via holes.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例に関し、(a)、(b)、
(c)、(d)及び(e)の順に製造過程による変化を
示す概略図である。
FIG. 1 relates to an embodiment of the present invention, (a), (b),
It is the schematic which shows the change by a manufacturing process in order of (c), (d), and (e).

【符号の説明】[Explanation of symbols]

1:ベースフィルム 2:接着剤層 3:銅はく 4、4a:回路面 41、42:回路 5:絶縁層 6:バイアホール 1: Base film 2: Adhesive layer 3: Copper foil 4, 4a: Circuit surface 41, 42: Circuit 5: Insulating layer 6: Via hole

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 回路を形成したフレキシブルプリント配
線板の回路面に感光性の絶縁層を形成し、フォトプロセ
スによりこの絶縁層にバイアホールを形成し、絶縁層表
面の回路形成及びバイアホールによる層間接続を行うこ
とを特徴とする多層フレキシブルプリント配線板の製造
方法。
1. A flexible printed wiring board on which a circuit is formed, a photosensitive insulating layer is formed on a circuit surface, a via hole is formed in the insulating layer by a photo process, and a circuit is formed on the surface of the insulating layer and an interlayer is formed by the via hole. A method for manufacturing a multilayer flexible printed wiring board, which comprises connecting.
JP22001895A 1995-08-29 1995-08-29 Production of multilayered flexible printed wiring board Pending JPH0964543A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22001895A JPH0964543A (en) 1995-08-29 1995-08-29 Production of multilayered flexible printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22001895A JPH0964543A (en) 1995-08-29 1995-08-29 Production of multilayered flexible printed wiring board

Publications (1)

Publication Number Publication Date
JPH0964543A true JPH0964543A (en) 1997-03-07

Family

ID=16744649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22001895A Pending JPH0964543A (en) 1995-08-29 1995-08-29 Production of multilayered flexible printed wiring board

Country Status (1)

Country Link
JP (1) JPH0964543A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000151047A (en) * 1998-11-05 2000-05-30 Sony Chem Corp Double-sided flexible wiring board and manufacture thereof
KR100396866B1 (en) * 2001-02-26 2003-09-03 산양전기주식회사 manufacturing method of flexible printed circuit board used photosensitivity insulating material
JP2012511828A (en) * 2008-12-12 2012-05-24 ネーデルランドセ・オルガニサティ・フォール・トゥーヘパスト−ナトゥールウェテンスハッペライク・オンデルズーク・テーエヌオー Electronic circuit deposition method
WO2012086219A1 (en) * 2010-12-21 2012-06-28 パナソニック株式会社 Flexible printed wiring board, and laminate for use in production of flexible printed wiring board
WO2018131285A1 (en) * 2017-01-13 2018-07-19 東レエンジニアリング株式会社 Method for producing flexible printed board, and flexible printed board

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000151047A (en) * 1998-11-05 2000-05-30 Sony Chem Corp Double-sided flexible wiring board and manufacture thereof
KR100396866B1 (en) * 2001-02-26 2003-09-03 산양전기주식회사 manufacturing method of flexible printed circuit board used photosensitivity insulating material
JP2012511828A (en) * 2008-12-12 2012-05-24 ネーデルランドセ・オルガニサティ・フォール・トゥーヘパスト−ナトゥールウェテンスハッペライク・オンデルズーク・テーエヌオー Electronic circuit deposition method
WO2012086219A1 (en) * 2010-12-21 2012-06-28 パナソニック株式会社 Flexible printed wiring board, and laminate for use in production of flexible printed wiring board
JP2012134279A (en) * 2010-12-21 2012-07-12 Panasonic Corp Flexible printed wiring board and laminate for manufacturing flexible printed wiring board
CN103270820A (en) * 2010-12-21 2013-08-28 松下电器产业株式会社 Flexible printed wiring board, and laminate for use in production of flexible printed wiring board
US9232636B2 (en) 2010-12-21 2016-01-05 Panasonic Intellectual Property Management Co., Ltd. Flexible printed wiring board and laminate for production of flexible printed wiring board
WO2018131285A1 (en) * 2017-01-13 2018-07-19 東レエンジニアリング株式会社 Method for producing flexible printed board, and flexible printed board

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