JPH0951507A - Video recording and reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To output videos of slow reproduction continuously from a normal mode by providing a memory and field indicating means for a write, a normal read, and a slow read field which succeed in a ring shape. SOLUTION: This device is equipped with the memory M1 which stores video data of plural fields, the write field indicating means M2 which increases a field number for writing input video data to the memory M1 in order, a normal read field indicating means M3 which increases a field number for a read from the memory M1 in normal mode equally to the write field indicating means M2, and a slow read field indicating means M4 which increases the field number for the read from the memory M1 in slow mode in order according to a slow double speed. Then those succeed in a ring shape. Therefore, input videos are outputted almost without any delay in the normal mode and when the mode is switched from the normal mode to the slow mode, videos of continuous slow reproduction are outputted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video recording / reproducing apparatus, and more particularly to a video recording / reproducing apparatus for slow reproduction of recorded video.

[0002]

2. Description of the Related Art Conventionally, in the case of slow-playing a video at a decisive moment in sports broadcasting, the video is recorded on a video-recording / reproducing device such as a video tape recorder and a cue signal is recorded at a desired time. deep. afterwards,
When necessary, the recorded video tape is rewound until a cue signal is detected, and slow reproduction is started from the cue signal recording position.

Recently, although a video recording / reproducing apparatus for recording an image in a semiconductor memory instead of a video tape has been developed, a cue signal is recorded at a desired time and then, when needed. Starting slow playback from the cue signal recording position is the same as in a device using a video tape recorder.

[0004]

In the conventional video recording / reproducing apparatus, when performing slow reproduction, after recording is performed from the time when the slow reproduction is started to the time when the slow reproduction is finished, the slow reproduction start position is searched. Since slow playback is performed during this time, it takes time to switch from the live video supplied by the video camera for recording to the slow playback video, and it is not possible to switch from live video to slow playback video continuously. It was possible.

The present invention has been made in view of the above points,
It is an object of the present invention to provide a video signal recording / reproducing apparatus capable of continuously switching from live video to slow playback video.

[0006]

According to a first aspect of the present invention, there is provided a ring-shaped video recording / reproducing apparatus for performing slow reproduction at a reproduction speed slower than a recording speed of an input video as shown in FIG. 1 (A). A memory M1 for storing video data of a plurality of fields, a write field indicating means M2 for sequentially advancing field numbers for writing input video data in the memory, and a field number read from the memory in the normal mode. Is provided with the normal read field indicating means M3 for advancing in the same manner as the write field indicating means, and the slow read field indicating means M4 for sequentially running the field number read from the memory in the slow mode according to the slow double speed.

Therefore, in the normal mode, the input video can be output with almost no delay, and when the normal mode is switched to the slow mode, the slow-played video can be output continuously from that point. According to a second aspect of the present invention, as shown in FIG. 1B, in the video recording / reproducing apparatus according to the first aspect, the field number to be incremented by the write field instructing means in the slow mode is the slow read field instructing means. Has a prohibiting means M5 for prohibiting overtaking the field number to be advanced.

Therefore, it is possible to prevent the video data of the unplayed field from being overwritten on the input video data, and it is possible to perform continuous slow playback for a long period of time. According to a third aspect of the invention, in the video recording / reproducing apparatus according to the first or second aspect, when a video switching instruction signal is supplied from the outside, the normal mode is switched to the slow mode.

Therefore, slow reproduction can be automatically performed in accordance with the video switching in the subsequent circuit.

[0010]

2 is a block diagram showing an embodiment of a video signal recording / reproducing apparatus of the present invention. In the figure, terminal 10
For example, a video signal captured by a video camera comes in,
This video signal is supplied to the low-pass filter 14 and the timing generator 16 through the buffer amplifier 12. The low-pass filter 14 removes unnecessary high frequency components of the video signal due to A / D conversion, and the video signal is supplied to the clamp circuit 20 through the buffer amplifier 18, where the pedestal level in the back porch of the horizontal synchronizing signal is predetermined. It is clamped to the electric potential. After this, the video signal is digitized by the A / D converter 22 and the field memory 2
4 is supplied.

The clock generator 16 is a timing signal for instructing the clamp timing in synchronization with the vertical and horizontal synchronizing signals of the video signal and the color subcarrier, and the frequency is 4 fsc (fs).
c is a color subcarrier frequency) and generates a sampling pulse and supplies it to the clamp circuit 20 and the A / D converter 22. The timing generator 16 also generates a vertical synchronizing pulse, a horizontal synchronizing pulse, and a dot pulse and supplies them to the write control circuit 26.

Field memory 2 corresponding to memory M1
4 stores, for example, a video signal for 720 fields, that is, a video signal for 12 seconds when there are 60 fields per second. Writing and reading are controlled by a write control circuit 26 and a read control circuit 28. Be seen. The write control circuit 26 and the read control circuit 2
8 receives an operation command from the microcomputer 30 and operates. A main operation panel 32 is connected to the microcomputer 30, a remote operation panel 34 is connected via an interface circuit 36, and a tally terminal 38 to which a tally signal is supplied from a switcher (not shown) is connected to the interface circuit 36. Has been done.

Further, the master synchronizing signal is input to the terminal 40, and the timing generator 42 generates vertical and horizontal synchronizing signals synchronized with the master synchronizing signal and supplies them to the read control circuit 28. The timing generator 42 has a frequency of 4
Generates a fsc clock to generate D / A converters 46, 5
Supply 0. The video data read from the field memory 24 according to the address designation of the read control circuit 28 is supplied to the Y / C separation circuit 44 and separated into a luminance component Y and a chroma component C. Luminance component is D / A converter 4
It will be analogized in 6. The chroma component is supplied to the chroma phase circuit 48, and after the chroma phase is switched according to the odd / even field instruction signal from the read control circuit 28,
It is converted to analog by the D / A converter 50.

Luminance signals and chroma signals from the D / A converters 46 and 50 are mixed by a mixer 52 and supplied to a low pass filter 56 through a buffer amplifier 54, where unnecessary high frequency components are removed and a buffer amplifier is supplied. It is output from the terminal 60 through 58. To explain the operation of the present invention, as shown in the schematic diagram of FIG.
4 is used in a structure in which the first field # 0 to the last field # 719 are continuous in a ring shape. The microcomputer 30 uses the write field counter Wn to instruct the write control circuit 26 to specify the field number in which the field memory 24 is to be written, and uses the read field counter Rn to the read control circuit 28. Specifies the field number for reading.

In the normal mode, the write field counter Wn is incremented and the value of the read field counter Rn is set to the same value as Wn each time the video data for one field is written, and the written video data is read in real time. As a result, the video signal input from the terminal 10 is hardly delayed and the terminal 6
Output from 0.

Here, as shown in FIG. 4A, a write field counter Wn and a read field counter Rn.
Is 1 at the time t _n when both are field numbers Fn
When the / 2 speed slow reproduction is instructed, the light field counter Wn is incremented every 1/60 seconds as shown in FIG. 7B, but the same field is read twice, so the read field counter Rn Is incremented every 2/60 seconds as shown in FIG. Therefore, the read field counter Rn lags behind the write field counter Wn as shown in FIG.

FIG. 5 shows a flowchart of the slow double speed setting process executed by the microcomputer. This process is executed by interruption every predetermined time. In FIG.
At 10, the reproduction speed selected by the key operation on the main operation panel 32 or the remote operation panel 34 is read.

Next, in step S12, it is determined whether or not the 1/5 speed is selected, and if so, the variable Sn is set to 5 which is the reciprocal of the slow speed in step S14. 1
If it is not / 5 × speed, it is determined in step S16 whether 1/4 × speed is selected, and if so, step S1
At 8, the variable Sn is set to 4, which is the reciprocal of the slow speed. If it is not 1/4 speed, it is determined in step S20 whether or not 1/3 speed is selected, and if so, the variable Sn is set to 3 which is the reciprocal of the slow speed in step S22.

Here, if it is not 1/3 speed, step S
In step 24, it is determined whether or not the 1/2 speed is selected, and if so, the variable Sn is set to 2 which is the reciprocal of the slow speed in step S26. If it is not 1/2 speed, it is determined in step S28 whether or not 1x speed (normal reproduction) is selected, and if so, the variable Sn is set to 1 which is the reciprocal of slow speed in step S30. If it is not 1 × speed, it is determined in step S32 whether or not 2 × speed is selected, and if so, the variable Sn is set to 1/2 which is the reciprocal of the double speed in step S34. Step S above
When any one of S14, S18, S22, S30, and S34 is executed, or when the double speed is not selected in step S32, this process ends.

FIGS. 6 and 7 are flowcharts of the normal and live slow reproduction processes executed by the microcomputer. This process is executed when the normal mode is selected by the operation of the operation panels 32 and 34, the live slow mode is selected, or when the tally signal is supplied to the tally terminal 38 and the live slow mode is selected. To be done.

In FIG. 6, in step S40, the write field counter Wn, the read field counter Rn, and the variable i are reset to 0, and the stop flag Wn.
Reset STP, to 0. Next, in step S42, the input video data is written into the field number designated by the counter Wn of the field memory 24, and then in step S42.
At 44, the counter Wn is incremented by 1. Next, in step S46, it is determined whether or not the value of the counter Wn is 720. When Wn = 720, the process proceeds to step S48 to reset the counter Wn to 0. The above steps S42 to S48 correspond to the write field designating means M2.

Next, in step S50, the flag WnSTP is set.
Is 1, and the value of the counter Wn is the same as the counter Rn. If this condition is not satisfied,
Of the live slow mode (LS
M) or not. If it is not the live slow mode, that is, if it is the normal mode, step S54.
Then, the video data is read from the field number designated by the counter Rn of the field memory 24, and the counter Rn is incremented by 1 in step S56. Next, in step S58, it is determined whether or not the value of the counter Rn is 720. When Rn = 720, the process proceeds to step S60 to reset the counter Rn to 0, and step S42
Then, the above process is repeated. Step S54 above
~ S60 corresponds to the normal read field indicating means M3.

As a result, in the normal mode, the values of the counters Wn and Rn are the same when step S42 is executed, and the video data written in the field memory 24 is immediately read out and output from the terminal 60. The video signal is a live video.

On the other hand, when the live slow mode is determined in step S52, the process proceeds to step S62, the video data is read from the field number designated by the counter Rn of the field memory 24, and the variable i is incremented by 1 in step S64. To do. Next in step S66.
It is determined whether or not the value of the variable i exceeds the variable Sn which is the reciprocal of the slow double speed. If Sn ≧ i, step S4
Then, the process proceeds to 2 and steps S42 to S52 and S62 to S66 are repeated. As a result, the counter Wn is incremented, but the counter Rn is equal to the number of times indicated by the variable Sn, which is the reciprocal of the slow speed (for example, if the speed is 1/2, it is 2
Read) without incrementing.

When Sn <i in step S66, step S68 follows and the variable i is reset to 0.
At 70, the counter Rn is incremented by 1. Next, in step S72, it is determined whether or not the value of the counter Rn is 720. When Rn = 720, the counter Rn is reset to 0 in step S74. Step S62 above
S74 corresponds to the slow read field designating means M4.

Thereafter, in step S76, it is determined whether the value of the counter Rn is the same as the value of the counter Wn plus one. If Rn = Wn + 1, the flag WnSTOP is set to 1 in step S78 to prohibit the increment of the counter Wn, and the write field counter Wn that is counted up first is the read field counter R.
The process proceeds to step S52 without overtaking n. The above steps S76 and S78 correspond to the prohibiting means M5.

The read field counter Rn is incremented even after the flag WnSTOP is set to 1. However, if the counter Rn catches up with the counter Wn whose increment is prohibited, the continuity of the image is lost in the future. So slow playback has to be stopped. This is controlled in steps S50 and S80. If the flag WnSTP is 1 and Wn = Rn in step S50, the process proceeds to step S80 and the process is terminated. After entering this waiting state, when another mode such as a stop mode is set by operating the keys of the operation panels 32 and 34, the processing of the set other mode is executed.

Even if the processes of FIGS. 5 and 6 are being executed, if the clear key of the operation panels 32 and 34 is operated, control is forcibly moved to step S40 of FIG. 5 at that point.
The processing from step S40 is sequentially executed. As described above, in the normal mode, the values of the counter Wn and the counter Rn are the same, so that after the input video is written in the field memory 24, it is immediately read and output as a live video with almost no delay. Operation panel 3 in this state
When the live slow mode keys 2, 34 are pressed, the mode is switched to the live slow mode, and the slow playback can be continuously started from the live image at that time.

In the 1 / N double speed live slow mode, the number of fields Tws capable of slow playback is until the counter Wn, which is incremented in advance, makes one turn to catch up with the counter Rn. Given. Tws = {n / (n-1)} · A where A is the number of fields in the field memory 24.

For example, in the case of 1/2 speed, Tws = 2 · A
Therefore, when A = 720, Tws = 1440 fields. Since this is played back in slow speed at 1/2 speed,
The slow playback time is 48 seconds. For example, when performing live broadcasting of sports and the like, the slow reproduction time is usually about 10 seconds, and the memory capacity of the field memory 24 is sufficient. Of course, this memory capacity may be increased if necessary.

FIG. 8 is a block diagram of a video system to which the present invention is applied.
FIG. In the figure, terminal 70 ₀~ 70_nTo each
A video signal of another system is supplied. Terminal 70₀Video of
The signal is the terminal 1 of the video recording / reproducing apparatus 71 of the present invention shown in FIG.
0 and is output from the terminal 60 of the video recording / reproducing device 71.
The input video signal is input terminal I of the switcher 72.₀To serve
Be paid. Also, the terminal 70₁~ 70_nVideo coming into each
The signal is the input terminal I of the switcher 72.₁~ I_nSupply to each
Is done.

The switcher 72 is an output terminal 0 by selecting one of the video signals supplied to the terminals I ₀ ~I _n
Output through the terminal 73. Also, the switcher 72
Outputs a tally signal from the control terminal C ₀ corresponding to the terminal I ₀ is when selecting a video signal supplied to the terminal I _0,
This tally signal is the tally terminal 3 of the video recording / reproducing apparatus 71.
8 is supplied.

With the above arrangement, in the video recording / reproducing apparatus 71, the tally signal is supplied from the switcher 72 at the same time when the switcher 72 selects the terminal I ₀ input, whereby the live slow mode is set and the preset double speed is set. Start slow playback. That is, simply by selecting the output of the video recording / playback apparatus 71 with the switcher 72, the video recording / playback apparatus 71 automatically starts slow playback, and this slow playback video is output from the switcher 72.

[0034]

As described above, the invention according to claim 1 is a video recording / reproducing apparatus for performing slow reproduction at a reproduction speed slower than the recording speed of an input video, and is configured to be continuous in a ring shape and to have a plurality of fields. Memory for storing the video data, the writing field indicating means for sequentially advancing the field numbers for writing the input video data in the memory, and the step for making the field numbers read from the memory in the normal mode coincide with the writing field indicating means. Normal read field indicating means for advancing,
Slow read field instruction means for sequentially running the field numbers read from the memory in the slow mode according to the slow double speed.

Therefore, in the normal mode, the input video can be output with almost no delay, and when the normal mode is switched to the slow mode, the slow-played video can be output continuously from that point. According to a second aspect of the present invention, in the video recording / reproducing apparatus according to the first aspect, the field number of the write field instructing unit that advances in slow mode exceeds the field number of the slow read field instructing unit that advances. It has prohibition means to prohibit that.

Therefore, it is possible to prevent the video data of the unplayed field from being overwritten on the input video data, and it is possible to perform continuous slow playback for a long period of time. According to a third aspect of the invention, in the video recording / reproducing apparatus according to the first or second aspect, when a video switching instruction signal is supplied from the outside, the normal mode is switched to the slow mode.

Therefore, the slow reproduction can be automatically performed according to the video switching in the subsequent circuit.

[Brief description of drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a block diagram of the present invention.

FIG. 3 is a schematic diagram for explaining the present invention.

FIG. 4 is a schematic diagram for explaining the present invention.

FIG. 5 is a flowchart of a slow double speed setting process.

FIG. 6 is a flowchart of normal and live slow reproduction processing.

FIG. 7 is a flowchart of normal and live slow playback processing.

FIG. 8 is a block diagram of a video system using the present invention.

[Explanation of symbols]

 16, 42 Timing generator 22 A / D converter 24 Field memory 26 Write control circuit 28 Read control circuit 30 Microcomputer 32 Main operation panel 34 Remote operation panel 36 Interface circuit 38 Tally terminal 44 Y / C separation circuit 46, 48 D / A converter M1 memory M2 write field instruction means M3 normal read field instruction means M4 slow read field instruction means M5 prohibition means

Claims (3)

[Claims] 1. A video recording / reproducing apparatus for performing slow reproduction at a reproduction speed slower than the recording speed of input video, wherein the memory is configured to be continuous in a ring shape and stores video data of a plurality of fields, and input video data. Write field indicating means for sequentially stepping the field numbers to be written in the memory, a normal read field indicating means for making the field number read from the memory in the normal mode coincident with the write field indicating means, and a normal read field indicating means in the slow mode A video recording / reproducing apparatus comprising: a slow read field instructing means for sequentially running field numbers read from the memory according to slow double speed. 2. The video recording / reproducing apparatus according to claim 1, wherein in the slow mode, the field number of the write field instructing means to be stepped over is prohibited from overtaking the field number of the slow read field instructing step to advance. A video recording / reproducing apparatus having a prohibition unit. 3. The video recording / reproducing apparatus according to claim 1, wherein when a video switching instruction signal is supplied from the outside, the normal mode is switched to the slow mode.