JPH0945764A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a high-melting-point metallic silicide in the bottom portion of the opening portion of a semiconductor device without increase of its resistance and its junction leakage. SOLUTION: A manufacturing method comprises a process for forming titanium 6 both on the inner wall and bottom surface of an opening portion 5 on an insulation film 4 on a silicon substrate 1 and on the insulation film 4 itself, a process for forming in succession titanium nitride 7 and tungsten 8 on the formed titanium 6 including the one inside the opening portion 5 in the temperature region wherein the formed titanium 6 and the silicon substrate 1 are not monocrystallized or polycrystallized by them reacting on each other, and a process for monocrystallizing or polycrystal silicifying at least one portion of the formed titanium 6 by a heat treatment.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a contact electrode for a semiconductor device and a method for manufacturing the same, and particularly, the depth / diameter ratio of an opening (hereinafter referred to as an aspect ratio) is 3.
The present invention provides a semiconductor device having stable contact characteristics of low resistance and low junction leakage current in the opening and the opening having different aspect ratios, and a manufacturing method thereof.

[0002]

2. Description of the Related Art With the miniaturization of semiconductor devices, in the opening for connecting the semiconductor substrate and the upper wiring, the contact resistance increases due to the decrease in the area of the bottom of the opening.
It has come to affect the characteristics of semiconductor devices. As a countermeasure, a high melting point metal is reacted with a substrate silicon to form a high melting point metal silicide on the bottom surface of the opening to reduce the resistance (for example, JP-A-63-84).
024). This conventional contact formation process will be described with reference to FIG.

In FIG. 7, 1 is a silicon substrate, 2 is an impurity diffusion layer formed by ion implantation of As (arsenic), P (phosphorus), B (boron) and the like into the silicon substrate 1 and activation heat treatment, 4 Is an insulating film formed on the silicon substrate 1, 5 is an opening formed in the insulating film 4 on the impurity diffusion layer 2, and 6 is titanium (Ti) formed on the surface of the insulating film 4 including the inside of the opening 5. , 7 and 8 are titanium nitride (TiN) and tungsten (W) formed on Ti, respectively, and 9 is a monocrystalline or polycrystalline titanium disilicide film (TiSi ₂ ) formed by the reaction of the silicon substrate 1 and Ti _6.
Membrane).

First, the insulating film 4 is formed on the silicon substrate 1 by the CVD method, and the opening 5 is formed on the impurity diffusion layer 2 region by using the photolithography technique and the dry etching technique (FIG. 7A). Next, as shown in FIG. 7 (b), titanium 6 and titanium nitride 7 are sequentially deposited by a sputtering method, and then heat treatment at about 700 ° C. using a lamp annealer or the like as shown in FIG. 7 (c). Thus, TiSi ₂ 9 is formed at the bottom of the opening 5. Further, CVD
Method is used to deposit tungsten 8 and the tungsten 8, titanium nitride 7 and titanium film 6 in the portion other than the opening 5 are removed by etching back to form an electrode made of titanium nitride 7 and tungsten 8 (FIG. 7D). . Next, the aluminum alloy wiring 12 is formed to obtain a highly reliable contact (FIG. 7E).

Since Ti has a strong reducing property, it has a function of removing a natural oxide film on the silicon substrate 1.
Normally, Ti reacts with the silicon substrate by the sintering process at about 400 ° C. after the formation of the aluminum wiring to form amorphous Ti silicide (TiSi) and, at the same time, remove the natural oxide film. Due to this reduction action of Ti, Ti
A natural oxide film existing on the Si / Si interface is amorphous Ti.
It is incorporated into Si, and as a result, the TiSi / Si interface becomes a clean interface and has low resistance. In the p + impurity diffusion layer, the barrier height of the TiSi ₂ / p + Si junction is lower than that of TiSi / p + Si.
A lower contact resistance can be realized by forming TiSi ₂ by heat treatment at about ° C.

FIG. 10 shows p + formed by the formation of TiSi ₂ .
The effect of reducing the contact resistance with respect to the impurity diffusion layer is shown. In FIG. 10, solid and dotted lines are TiSi, respectively.
₂ shows the contact resistance of ₂ / p + Si and Ti / p + Si. As shown in the area (a) in FIG.
It can be seen that the contact resistance is lowered by forming TiSi ₂ on the bottom.

Here, regarding the n + impurity diffusion layer, T
The formation of iSi ₂ increases the barrier height of the TiSi 2 / n + Si junction, and conversely increases the contact resistance. However, this is not a problem because the contact resistance is lower than that of the p + impurity diffusion layer.

[0008]

However, according to the above-mentioned conventional technique, the inventors of the present invention have shown the area (a) in FIG.
That is, when the aspect ratio of the opening is 3 or more, Ti
It has been found that the contact resistance of Si ₂ / p + Si rapidly increases.

The above cause will be described with reference to FIG. 8, (a) is a cross-sectional view after Ti and TiN deposition, (b) is a cross-sectional view after heat treatment for silicidation, 11
Is aggregated titanium disilicide (TiSi ₂ ). 8, those having the same functions as those in FIG. 7 are designated by the same reference numerals, and detailed description thereof will be omitted.

When Ti6 is deposited by the sputtering method, as shown in FIG.
As shown in (a), the film thickness of the Ti film 6 is smaller at the bottom of the opening 5 than the film thickness deposited on the insulating film 4. The film thickness of Ti6 deposited on the bottom of the opening 5 becomes smaller as the aspect ratio of the opening 5 increases. Therefore, when the heat treatment for silicidation is performed in the state where Ti6 is thin as shown in FIG. 8A, TiSi ₂ is further aggregated after forming TiSi ₂ as shown in FIG. 8B. The formation of the aggregated TiSi ₂ 11 is considered to be the cause of the resistance increase in the region (a) of FIG. T where this aggregation occurs
The i thickness depends on the heat treatment condition for silicidation, but is considered to be about 10 nm or less at the bottom of the opening.

This TiSi ₂ agglomeration phenomenon is well known in the salicide process, and as one of the countermeasures, generally, Ti having a thickness of about 30 nm or more is used. However, in the openings that have become finer,
It is difficult to form Ti having a thickness of about 30 nm at the bottom of the opening. On the other hand, even if Ti is too thick, there is a problem that a junction leak occurs.

The occurrence of junction leak due to the formation of TiSi ₂ will be described with reference to FIG. 9 in the case where openings having different aspect ratios are mixed. In FIG. 9, (a) is a cross-sectional view after Ti and TiN deposition, (b) is a cross-sectional view after heat treatment for silicidation, 3 is LOCOS isolation, 14 is an opening having a large aspect ratio, and 15 is a small aspect ratio. The opening is shown. 9, those having the same functions as those in FIG. 7 are designated by the same reference numerals, and detailed description thereof will be omitted.

When Ti6 and TiN7 having a film thickness capable of obtaining good characteristics are deposited in the opening 14 having a large aspect ratio by a sputtering method, the opening 15 having a small aspect ratio is formed at the bottom of the opening 15 having a small aspect ratio. A thicker Ti is deposited (FIG. 9A).

Therefore, when the heat treatment for forming TiSi _{2 is} continued, a very thick TiSi ₂ is formed, and the TiSi ₂ reaches the vicinity of the interface between the impurity diffusion layer 2 and the silicon substrate 1 as shown in FIG. 9B. , The joint will be destroyed. As described above, there is a problem that a junction leak occurs even if the Ti thickness at the bottom of the opening becomes too thick. This becomes remarkable in a semiconductor device having a shallow impurity diffusion layer.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a semiconductor capable of obtaining good contact characteristics regardless of whether the Ti thickness at the bottom of the opening is thin or thick. An object is to provide a device and a manufacturing method thereof.

[0016]

According to the present invention, there is provided a semiconductor device comprising:
By forming a refractory metal silicide by heat-treating a part of the refractory metal at a portion where the refractory metal contacts the silicon substrate at the bottom of the opening of the insulating film formed on the silicon substrate having the transistor, The purpose is achieved.

A method of manufacturing a semiconductor device according to the present invention comprises a step of forming an opening in an insulating film on a silicon substrate having a transistor, a step of forming a refractory metal at least inside the opening, and the silicon substrate. A step of forming a conductive film on the refractory metal including the inside of the opening at a temperature equal to or lower than a temperature at which the refractory metal reacts with the refractory metal to form a single crystal or polycrystal refractory metal silicide; And a step of reacting the refractory metal with the refractory metal to form a refractory metal silicide crystal or polycrystal, and a step of forming a wiring layer on the opening, whereby the above object is achieved.

Another method of manufacturing a semiconductor device according to the present invention is a step of forming an opening in an insulating film on a silicon substrate, a step of forming a refractory metal at least inside the opening, and the silicon substrate. A step of forming a conductive film on the refractory metal including the inside of the opening at a temperature equal to or lower than a temperature at which the refractory metal reacts to form a single crystal or polycrystalline refractory metal silicide; and dry etching or polishing or the like. A step of removing the conductive film or the conductive film and the refractory metal on the surface of the insulating film to form an electrode of the conductive film and the refractory metal only inside the opening; and a heat treatment for the silicon substrate and the refractory metal. To form a single crystal or a polycrystal of a refractory metal silicide, and a step of forming a wiring layer on the opening. The above-mentioned object can be achieved.

In another semiconductor device of the present invention, the silicon substrate and the refractory metal are reacted by heat treatment at the bottom of the opening of the insulating film formed on the silicon substrate having the transistor to form a refractory metal silicide. The depth / diameter of the opening is constant, or the depth / diameter
The above-described object is achieved by having an opening in which the variation in the diameter value is ± 10% or less.

[0020]

In another semiconductor device of the present invention, since all refractory metal is not silicided at the bottom of the opening formed in the insulating film on silicon having a transistor, agglomeration of refractory metal silicide does not occur. Moreover, the destruction of the joint does not occur.

According to the method of manufacturing a semiconductor device of the present invention, the inside of the opening is electrically conductive at a temperature not higher than the temperature at which a refractory metal silicide having a single crystal or polycrystalline structure is formed at the bottom of the opening by the reaction of the silicon substrate and the refractory metal. Form a film. After that, a refractory metal silicide is formed by heat treatment. However, since the openings are filled with the conductive film, not all of the refractory metal silicide is agglomerated, so that the refractory metal silicide does not aggregate and the refractory metal thickness is increased. Regardless of this, since the refractory metal silicide having a constant film thickness is formed, the destruction of the junction due to excessive silicidation does not occur.

In another semiconductor device of the present invention, the value of the opening depth / opening diameter of the opening of the insulating film is constant or has a variation of ± 10% or less. Alternatively, when formed by the CVD method or the like, the film thickness of the refractory metal at the bottom of the opening is constant in each opening, and the film thickness of the refractory metal silicide formed by the heat treatment is also uniform in each opening. It is possible to form an electrode in which no leak occurs.

[0023]

【Example】

(Embodiment 1) A semiconductor device according to a first embodiment of the present invention will be described below with reference to the drawings.

1 and 2 are sectional views of a semiconductor device according to the first embodiment of the present invention. 1 and 2, 1 is a silicon substrate having a transistor, 2 is an impurity diffusion formed by ion implantation of As (arsenic), P (phosphorus), B (boron) and the like into the silicon substrate 1 and activation heat treatment. Layer, 3 is LOCOS isolation, 4 is an insulating film formed on the silicon substrate 1, 6 is titanium (Ti) formed on the surface of the insulating film 4 including the inside of the opening, and 7 and 8 are formed on Ti, respectively. Titanium nitride (TiN) and tungsten (W), 9 are monocrystalline and polycrystalline titanium disilicide (T) formed by the reaction of the silicon substrate 1 and Ti6.
iSi ₂ ), 10 is an amorphous titanium silicide film (TiSi) formed by the reaction of the silicon substrate 1 and Ti 6.
Film), 14 is an opening having a large aspect ratio, and 15 is an opening having a small aspect ratio. Although transistors are formed on the silicon substrate by a known method, they are omitted in FIG. This point also applies to FIGS. 3, 4, and 5 described later.

In FIGS. 1 and 2, the difference from FIGS. 8 and 9 for explaining the problem in the conventional example is that all Ti6 at the bottoms of the openings 14 and 15 do not become TiSi ₂ and a substantially constant film is formed. Thick TiSi ₂ film and Ti and amorphous TiS
It is composed of i.

Therefore, as in the conventional example shown in FIG. 9, the openings 14 and 15 having different Ti film thicknesses at the bottoms.
Even There exist, only a part of Ti is TiSi _2, TiSi ₂ is thick is not formed, the result can be prevented the destruction of the joint.

Even when the Ti film thickness at the bottom of the opening is thin as shown in FIG.
No increase in contact resistance occurs.

(Embodiment 2) Hereinafter, a second method of manufacturing a semiconductor device of the present invention will be described with reference to the drawings.

3A to 3D are process sectional views for explaining the method for manufacturing a semiconductor device of the present invention. In FIG. 3, those having the same functions as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 3A, impurities such as As, P and B are ion-implanted into the silicon substrate 1 and heat treatment for activation is performed to form the impurity diffusion layer 2. Then, the insulating film 4 is deposited on the silicon substrate 1, and the opening 5 is formed by using photolithography and dry etching techniques.

Next, titanium (Ti) is formed by the sputtering method.
6 is deposited (FIG. 3B). Subsequently, as shown in FIG. 3C, titanium nitride (TiN) 7 is formed by a sputtering method.
And tungsten (W) 8 are deposited by the chemical vapor deposition method (CVD method).

Here, Ti6, TiN7 and W8 are T
The formation of TiSi ₂ is prevented by forming iSi 6 and silicon substrate 1 at a temperature of about 500 ° C. or lower, which is a temperature for forming single crystal or polycrystal TiSi ₂ by reaction. Because T
When heated to about 500 ° C. or higher during or after forming i, Ti 6 reacts with the silicon substrate 1 in a silicidation reaction to form TiSi ₂ . As a result, TiSi ₂
This is because it causes aggregation of 9 and destruction of the joint.

Next, after forming a metal electrode of TiN7 and W8, a silicon substrate 1 is formed by a halogen lamp or the like.
Is heated to at least 550 ° C. or higher to form TiSi ₂ 9 (FIG. 3D). Here, the reaction of Ti6 and silicon is first formed an amorphous TiSi, growth of TiSi ₂ starts from thereafter the silicon substrate 1 side. Further, the reaction is a reaction involving deposition expansion. Therefore, when heat treatment is performed after the opening 5 is filled with the metal electrode, TiS
The reaction ends when the force for forming and expanding i ₂ and the force for pressing the metal electrode are balanced. In this way, TiSi ₂ 9 is formed only in the extremely thin area in contact with the silicon substrate 1 at the bottom of the opening 5, and it is possible to prevent the TiSi ₂ from agglomerating or breaking. Since the contact resistance is determined by the interface between the TiSi ₂ 9 and the silicon substrate 1, an extremely thin TiSi ₂ is sufficient for reducing the resistance.

Finally, Ti6, TiN7 and W8 are patterned to obtain a semiconductor device having low resistance and no junction leakage.

Here, wirings were formed by patterning Ti6, TiN7 and W8. However, each film except the inside of the opening 5 is removed by dry etching, chemical mechanical polishing (CMP) or the like, and as shown in FIG. The wiring may be formed of a low resistance metal such as an aluminum alloy.

(Embodiment 3) A method of manufacturing a semiconductor device according to a third embodiment of the present invention will be described below with reference to the drawings.

FIG. 5 is a process sectional view for explaining a method of manufacturing a semiconductor device according to the third embodiment of the present invention. 5, those having the same functions as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 5A, impurities such as As, P and B are ion-implanted into the silicon substrate 1 and heat treatment for activation is performed to form the impurity diffusion layer 2. Then, the insulating film 4 is deposited on the silicon substrate 1, and the opening 5 is formed by using photolithography and dry etching techniques.

Next, titanium (Ti) is formed by the sputtering method.
6 is deposited (FIG. 5B). Subsequently, as shown in FIG. 5C, titanium nitride (TiN) 7 was formed by a sputtering method.
And tungsten (W) 8 are deposited by the chemical vapor deposition method (CVD method). Then, each film other than the inside of the opening 5 is removed by dry etching, polishing or the like to form a metal electrode made of Ti6, TiN7 and W8. Here, for the same reason as in the second embodiment, the deposition temperature of Ti6, TiN7, and W8 is 500 ° C.
The following is assumed.

Then, after forming a metal electrode inside the opening 5, the silicon substrate 1 is heated to at least 550 ° C. or higher by a halogen lamp or the like to form TiSi ₂ 9. In this way, the silicon substrate 1 at the bottom of the opening 5 is
TiSi ₂ is formed in an extremely thin area in contact with (see FIG. 5).
(D)).

Finally, as shown in FIG. 5E, the aluminum alloy is patterned to obtain a semiconductor device having low resistance and no junction leakage.

As described above, also in this embodiment, as in the second embodiment, the TiSi ₂ 9 is formed after the inside of the opening 5 is filled with TiN 7 or W8.
It is possible to prevent agglomeration and junction breakage due to iSi ₂ .

(Embodiment 4) A semiconductor device according to a fourth embodiment of the present invention will be described below with reference to the drawings.

FIG. 6 is a sectional view for explaining a semiconductor device according to the fourth embodiment of the present invention. In FIG. 6, 16 is an opening (A) having a depth of A μm and a diameter of a μm, and 17 is an opening (B) having a depth of B μm and a diameter of b μm. Components having the same functions as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 6, openings 16 and 17 are formed in the insulating film 4 on the silicon substrate 1 on which transistors and the like are formed by using photolithography and dry etching techniques. Then, titanium (Ti), titanium nitride (TiN), tungsten (W), and aluminum alloy wiring are formed. At this time, since the value (aspect ratio) of (depth / diameter) of each opening is formed to be equal (for example, A / a = B / b in FIG. 6), the sputtering method or the CVD method is used. The film thickness of Ti formed by the above is almost equal at the bottom of the opening. Then, by forming TiSi ₂ with Ti 6 having an optimum film thickness, a contact having no junction leak and low resistance can be formed. Here, the value of (depth / diameter) is set to be constant, but in actuality, the value of (depth / diameter) is ± 1 in consideration of variations in trial production.
It should be 0% or less.

As described above, by adjusting the error of the (depth / diameter) value of each opening by 10%, it is possible to more reliably form TiSi ₂ having no junction leak.

In the first to fourth embodiments, the refractory metal silicide is formed by the reaction of the refractory metal with the silicon substrate at the bottom of the opening.
Polysilicon wiring and tungsten silicide (WSix)
Wiring containing silicon may be used.

Although the refractory metal is Ti, V, Cr, Fe, Co, Ni, Zr, which can form a silicide,
A refractory metal such as Nb, Mo, Ru, Rh or Pt may be used.

[0049]

According to the present invention, a refractory metal is formed at least inside the opening, and the inside of the opening is filled with a metal electrode at a temperature not higher than the temperature at which single crystal or polycrystalline silicide is formed. By forming a crystalline or polycrystalline refractory metal silicide, a low resistance contact without junction leakage can be formed even when openings having a high aspect ratio or openings having different aspect ratios are mixed.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 3 is a process sectional view showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a process sectional view showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 7 is a process sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 8 is a sectional view of a conventional semiconductor device.

FIG. 9 is a sectional view of a conventional semiconductor device.

FIG. 10 is a diagram showing the relationship between the opening diameter of a contact formed by a conventional technique and the contact resistance.

[Explanation of Codes] 1 Silicon substrate 2 Impurity diffusion layer 3 LOCOS 4 Insulating film 5 Opening 6 Titanium (Ti) 7 Titanium nitride (TiN) 8 Tungsten (W) 9 Single crystal or polycrystalline titanium disilicide (T
iSi ₂ ) 10 Amorphous titanium silicide (TiSi) 11 Aggregated titanium disilicide (TiSi ₂ ) 12 Aluminum wiring 14 High aspect ratio opening 15 Low aspect ratio opening 16 Opening 17 Opening

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takeshi Harada 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (6)

[Claims] 1. A silicon substrate having a transistor, an insulating film having an opening on the silicon substrate, and a refractory metal silicide film having a single crystal or polycrystal structure in contact with the silicon substrate at the bottom of the opening, Amorphous refractory metal silicide film or refractory metal which is the same as the refractory metal silicide in contact with the single crystal or polycrystal structure refractory metal silicide film, and the conductivity formed at least inside the opening. A semiconductor device comprising: a film. 2. A step of forming an opening in an insulating film formed on a semiconductor substrate, a step of forming a refractory metal on an inner wall, a bottom surface of the opening and the insulating film, and a refractory metal. Forming a conductive film on at least the refractory metal in the opening in a temperature range where refractory metal silicide is not formed by the reaction of the silicon substrate, and then performing a heat treatment to part of the refractory metal with the silicon substrate. And a step of reacting to form a refractory metal silicide film. 3. A step of forming an opening in an insulating film formed on a semiconductor substrate, a step of forming a refractory metal on an inner wall, a bottom surface of the opening and the insulating film, and a refractory metal. Forming a conductive film on the refractory metal in at least the opening in a temperature region where refractory metal silicide is not formed by the reaction of the silicon substrate; and the conductive film or the conductive film on the surface of the insulating film by dry etching or polishing. Removing the conductive film and the refractory metal to form an electrode made of the conductive film and the refractory metal only in the opening,
And a step of reacting a part of the refractory metal with the silicon substrate by heat treatment to form a refractory metal silicide film. 4. The method of manufacturing a semiconductor device according to claim 2, wherein the refractory metal is titanium. 5. The method of manufacturing a semiconductor device according to claim 2, wherein the conductive film is made of titanium nitride and tungsten formed on the titanium nitride. 6. A silicon substrate having a transistor, an insulating film having an opening on the silicon substrate, and a portion of a refractory metal formed in a region including at least the inside of the opening in contact with the silicon substrate. In a semiconductor device in which a refractory metal silicide having a crystalline or polycrystalline structure is formed by a reaction between the refractory metal and a silicon substrate, a value of (depth / diameter) of the opening is constant within the wafer or within the wafer. Variation is ±
A semiconductor device characterized by being 10% or less.