JPH0945741A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable the reduction of the cost for tests and inspections maintaining the features for special use by providing test terminals respectively connected to signal terminals at fixed positions common to various types different in specified parameters, including the locations of analog circuits and signal terminals. SOLUTION: A semiconductor integrated circuit 10 for special use has analog circuits 1a and 1b which are disposed at specified positions and connected to outer circuits disposed at specified positions and signal terminals TS1 and TS2 for transmitting signals between the outer circuits and analog circuits 1a and 1b. Test terminals TT1 and TT2 respectively connected to the signal terminals TS1 and TS2 are provided at predetermined fixed position common to several types different in parameters, including the locations of the circuits 1a and 1b and terminal TS1 and TS2. At usual operation, for example, the terminals TT1 and TT2 are set to the open state.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit, and more particularly to a special purpose semiconductor integrated circuit including an analog circuit and performing a predetermined inspection on the analog circuit.

[0002]

2. Description of the Related Art Semiconductor integrated circuits (ASI) for special applications
Since C) is characterized in that the customer can freely configure the circuit, not only are the circuit configurations different,
The positions of input / output terminals for signals etc. are also different. Among such semiconductor integrated circuits for special purposes, those including analog circuits have been increasing in recent years.

A general example of a conventional semiconductor integrated circuit of this type is shown in FIGS. 4 (A) and 4 (B).

This semiconductor integrated circuit 10x includes a plurality of first
And the second analog signal terminals TS1 and TS2 and a signal from a predetermined terminal of the plurality of first analog signal terminals TS1 to perform predetermined analog processing, and output the analog processed signal. A first analog circuit 1a that outputs from a predetermined terminal of the plurality of signal terminals TS1 and a signal from a predetermined terminal of the plurality of second analog signal terminals TS2 receive predetermined analog processing. The second analog circuit 1b outputs the analog-processed signal from a predetermined terminal of the plurality of signal terminals TS2.

In this semiconductor integrated circuit 10x, the first and second analog circuits 1a and 1b are arranged at arbitrary positions on the semiconductor chip by the customer.
a, 1b a plurality of signal terminals TS1 and T connected to each
S2 is usually arranged in the vicinity of the vicinity.

In order to inspect whether such a semiconductor integrated circuit 10x normally operates, an inspection apparatus including a test board is usually used, but in order to inspect an analog circuit, its signal terminal is used. It is necessary to connect a special measuring circuit and measuring equipment different from the inspection for the digital circuit in this case. In this case, the test circuit also has different analog circuit and signal terminal positions for each product, so prepare for each product. Had to do.

[0007]

The conventional semiconductor integrated circuit described above is intended for a special purpose, and the analog circuit and its signal terminals are arranged at arbitrary positions. Therefore, the test board of the inspection device for each product. Must be prepared,
There is a problem that the cost for the test board and the cost for changing the test program and the test specifications are generated, and the cost for the test and the inspection is increased.

The object of the present invention is to provide features for special applications,
An object of the present invention is to provide a semiconductor integrated circuit that can reduce costs for testing and inspection while continuing.

[0009]

A semiconductor integrated circuit of the present invention includes an analog circuit arranged at a predetermined position, and an analog circuit connected to the analog circuit and arranged at a predetermined position between an external circuit and the analog circuit. In a semiconductor integrated circuit for a special purpose having a plurality of signal terminals for transmitting the signal of
A configuration is provided in which a plurality of test terminals, which are arranged at preset and fixed positions common to a plurality of types having different specifications including arrangement positions of the analog circuit and the signal terminal and which are correspondingly connected to the plurality of signal terminals, are provided. To be done.

Further, a plurality of analog circuits are arranged, a plurality of signal terminals are arranged for each of the plurality of analog circuits, a plurality of test terminals shared by the plurality of analog circuits are provided, and the plurality of analog circuits are provided. And a selection switching circuit for selecting one set of corresponding signal terminals and connecting it to the plurality of test terminals, and further controlling the control from an external circuit in the vicinity of the plurality of test terminals. A terminal for inputting a signal is provided, and one set of a plurality of analog circuits and a corresponding set of signal terminals is selected by the control signal and connected to the plurality of test terminals.

[0011]

Embodiments of the present invention will now be described with reference to the drawings.

1A and 1B are a circuit diagram and an arrangement schematic diagram showing a first embodiment of the present invention.

This embodiment is different from the conventional semiconductor integrated circuit shown in FIGS. 4A and 4B in that it includes specifications including an arrangement position of an analog circuit and a signal terminal connected to the analog circuit. The plurality of different types of semiconductor integrated circuits are provided with a plurality of test terminals TT1 and TT2 arranged at preset and fixed positions common to the plurality of different types of semiconductor integrated circuits and correspondingly connected to the plurality of signal terminals TS1 and TS2.

Next, the operation and inspection method of the first embodiment will be described.

During normal operation, the test terminals TT1,
The TT2 is opened, the signal terminals TS1 and TS2 are connected to an external circuit, and signals are exchanged between the external circuit and the analog circuits 1a and 1b.

Next, when the analog circuits 1a and 1b are inspected, the signal terminals TS1 and TS2 are opened and the test terminals TT1 and TT2 are connected to the external circuit TS1 and TS2.
Is opened and the test terminals TT1 and TT2 are connected to an external circuit, that is, a test board of the inspection device, and signals are exchanged between the analog circuits 1a and 1b and the inspection device.

In the first embodiment, the test terminals TT1 and TT2 have a plurality of specifications (hereinafter referred to as analog specifications) including an arrangement position of an analog circuit and a signal terminal connected to the analog circuit. Since the semiconductor integrated circuits are arranged in a preset and fixed position, which is shared with the semiconductor integrated circuits of different types, it is sufficient to prepare one test board for these plural types of semiconductor integrated circuits. Programs and test specifications can also be shared.

Therefore, the cost for these tests and inspections can be reduced as compared with the conventional example in which a test board, a program, and a test specification are prepared for each of a plurality of different types of semiconductor integrated circuits. Moreover, the characteristics of the semiconductor integrated circuit for special purposes can be inherited as they are.

2 (A) and 2 (B) are circuit diagrams showing a second embodiment of the present invention, and FIG. 3 is a layout schematic diagram thereof.

The second embodiment is different from the first embodiment in that the analog circuit 1a and its signal terminal T are provided.
S1 set, analog circuit 1b and its signal terminal T
A test terminal TT shared by two sets of S2 and a test terminal T for a control signal in the vicinity of these test terminals TT.
Ta is provided, and a selection switching circuit 2 for selecting one of the above two sets and connecting it to the test terminal TT is provided in accordance with a control signal input to the test terminal TTa.

The selection switching circuit 2 includes transfer gates TG1 to TG4, as shown in FIG.
It has a configuration including an inverter IV1.

In the second embodiment, when the analog circuits 1a and 1b are inspected, the test terminal TT is used.
By the control signal input to a, the analog circuits 1a, 1
Select one of b and perform one by one. In this case, the inspection time is slightly longer, but the total number of test terminals is
Since the number is smaller than that of the embodiment, the size of the entire semiconductor integrated circuit can be reduced. The second embodiment is extremely effective when the total number of terminals including the signal terminals and the test terminals is limited.

Incidentally, also in the second embodiment,
It has the same effect as the first embodiment.

[0024]

As described above, according to the present invention, a signal terminal for signal transmission of an analog circuit is provided which is common to a plurality of types of semiconductor integrated circuits having different analog specifications and which is arranged at a preset and fixed position. A set of test boards, programs, and test specifications for a common inspection device for the above-mentioned semiconductor integrated circuits of multiple types is prepared by providing a plurality of test terminals that are connected directly or through a selection switching circuit. Therefore, the cost for these tests and inspections can be reduced while inheriting the features for special applications.

[Brief description of drawings]

FIG. 1 is a circuit diagram and an arrangement schematic diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

FIG. 3 is an arrangement schematic diagram showing a second embodiment of the present invention.

FIG. 4 is a block diagram and an arrangement schematic diagram showing an example of a conventional semiconductor integrated circuit.

[Explanation of symbols]

 1a, 1b Analog circuit 2 Selection switching circuit 10, 10a, 10x Semiconductor integrated circuit TS1, TS2 Signal terminal TT, TT1, TT2, TTa Test terminal

Claims (3)

[Claims] 1. An analog circuit arranged at a predetermined position, and a plurality of signal terminals connected to the analog circuit and arranged at a predetermined position for transmitting a signal between an external circuit and the analog circuit. In a semiconductor integrated circuit for special use, the semiconductor integrated circuit is arranged at a preset and fixed position common to a plurality of types having different specifications including the arrangement positions of the analog circuit and the signal terminal, and corresponding connection with each of the plurality of signal terminals. A semiconductor integrated circuit having a plurality of test terminals provided therein. 2. A plurality of analog circuits are arranged, a plurality of signal terminals are arranged for each of the plurality of analog circuits, a plurality of test terminals shared by the plurality of analog circuits are provided, and the plurality of analog circuits are provided. 2. The semiconductor integrated circuit according to claim 1, further comprising a selection switching circuit that selects one set of the corresponding signal terminals and connects it to the plurality of test terminals. 3. A terminal for inputting a control signal from an external circuit is provided close to the plurality of test terminals, and one of the plurality of analog circuits and the corresponding signal terminal group is set by the control signal. 3. The semiconductor integrated circuit according to claim 2, wherein the semiconductor integrated circuit is selected and connected to the plurality of test terminals.