JPH0944372A - Adjustment device for electronic control unit and its using method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the erroneous control caused by communication abnormality and to perform ROM emulation and RAM monitor from the start of an electronic control unit by not only checking communication but also transferring data between the electronic control unit and a controller before turning on the power system switch on the electronic control unit side. SOLUTION: An electronic control unit 1 which has the engine controlled by a CPU for control and a controller 22 communicatably connected to the CPU for control of the electronic control unit are provided. The electronic control unit 1 is provided with at least an Eva board 2, to which the CPU for control is attached, and an input/output board 41 to which input/output terminals of various signals are attached, and this unit is so constituted that power is supplied to it by the turning-on operation of an ignition switch 44. Power is supplied to only the Eva board 2 of the electronic control unit 1 through the controller 22 when a power switch 46 on the controller 22 side is turned on.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic control unit for controlling a controlled object such as an electronically controlled fuel injection engine, a transmission or the like, and an adjusting device for changing and adjusting the control data at a trial production stage or the like. And its usage.

[0002]

2. Description of the Related Art Generally, for example, in an electronically controlled fuel injection engine mounted on a vehicle, an electronic control unit having a control CPU and a ROM is provided for the control, and a control program and various types of programs are stored in the ROM. Predetermined control data such as constants and coefficients are stored, and the fuel injection amount of the engine is controlled by a control signal from the control CPU.

The ROM data such as various constants and coefficients stored in the ROM is fixed to a predetermined value at the product stage, but at the stage of engine design or trial production, the engine is mounted for tuning or mounting the engine. It is changed according to the type of vehicle to be
The optimum value is decided according to the noise and the like.
Therefore, in the design stage and the like, there is a demand for so-called ROM emulation in which the ROM data in the electronic control unit is rewritten while the engine is operating.
As an apparatus for performing this ROM emulation, for example, as disclosed in Japanese Patent Laid-Open No. 6-259284,
A controller such as a personal computer connected to the terminal of the electronic control unit is provided, and an emulation RAM capable of emulating the ROM data of the electronic control unit is built in this controller, and after the ROM data is transferred to and written in this RAM, It is known that the ROM emulation can be easily and exclusively performed by rewriting the data in the RAM while allowing the control CPU of the electronic control unit to access the RAM.

The control CP for the electronic control unit
The internal RAM built into the U or the external RAM external to the control CPU temporarily stores variables and other parameters necessary for control that are detected by sensors and change every moment, but engine design and prototype At the stage of, it is necessary to perform so-called RAM monitoring for monitoring the stored contents of this RAM. As a device for performing this RAM monitoring, for example, Japanese Patent Laid-Open No. 6-
As disclosed in Japanese Patent No. 291662, a controller connected to a terminal of an electronic control unit is provided with a collecting unit for collecting RAM monitor data, and the RA collected by the collecting unit is collected.
It is known that M monitor data is displayed on the screen of a personal computer.

[0005]

By the way, the above-mentioned RO
In a conventional electronic control unit adjustment device that performs M emulation, RAM monitoring, etc., the electronic control unit and the controller are communicably connected, but the power supply systems are configured separately, and the power switch of the controller is used. Even if the switch is turned on, no current is supplied to the electronic control unit. Therefore, unless the power switch of the controller is turned on and the switch of the power system on the electronic control unit side (for example, the ignition switch in the case of the engine control unit) is turned on, for example, communication between the electronic control unit and the controller is performed. Therefore, it is impossible to check whether it is normally performed or transfer ROM data or RAM monitor data. Therefore, there is a risk that the controlled object is erroneously controlled due to an abnormality in the communication between the electronic control unit and the controller, and for example, in the case of engine control, the fuel is left blown. There is also a problem that ROM emulation and RAM monitoring cannot be performed immediately after turning on the switch of the power supply system on the electronic control unit side.

The present invention has been made in view of the above points, and an object thereof is to turn on the power switch of the controller before turning on the switch of the power system of the electronic control unit side. By supplying a current to the control CPU side of the electronic control unit, it becomes possible to inspect communication and transfer data between the electronic control unit and the controller, and prevent erroneous control due to communication abnormality in advance. The ROM emulation and the RAM monitor can be performed immediately before or after turning on the switch of the power supply system on the control unit side.

[0007]

In order to achieve the above object, the invention according to claim 1 is, as an adjusting device of an electronic control unit, an electronic control unit for controlling a predetermined control target by a control CPU, and the electronic control unit. C for controlling the control unit
And a controller communicatively connected to the PU, wherein the electronic control unit includes at least a control CPU
It is assumed that there is an evaluation board to which is attached and an input / output board to which input / output terminals for various signals are attached, and that both boards are energized by turning on a common switch. Then, only the evaluation board of the electronic control unit is configured to be energized via the controller when the controller is energized.

According to a second aspect of the present invention, in the adjusting device for the electronic control unit according to the first aspect, the control C is further provided.
A communication inspection means for inspecting whether communication between the PU and the controller is normally performed, and O of a switch common to both boards of the electronic control unit according to the inspection result of the communication inspection means.
A display means for displaying the propriety of N operation is provided.

The invention according to claim 3 shows a mode in which the adjusting device for an electronic control unit according to claim 2 is applied to the case of engine control. That is, the electronic control unit controls the engine as a predetermined control target, and the display means displays whether or not the ON operation of the ignition switch is appropriate as a switch common to both boards of the electronic control unit.

According to a fourth aspect of the present invention, in the electronic control unit adjusting apparatus according to any one of the first to third aspects, a system down occurs on the electronic control unit side, and a reset signal is sent from the control CPU to the controller. When output to, the correspondence by the controller is shown. That is, when the controller receives a reset signal from the control CPU, the controller stops the command transmission to the CPU, and the control C
It is configured to restart command transmission to the CPU after a predetermined time has elapsed from the time of receiving the reset release signal from the PU.

The invention according to claim 5 shows a mode in which the adjusting device for an electronic control unit according to claim 1 is applied to a case where ROM emulation is performed. That is, the electronic control unit includes, on the evaluation board, in addition to the control CPU, at least a ROM for storing control data and the RO.
The controller has an emulation RAM capable of emulating M control data, and the controller changes and adjusts the control data written in the emulation RAM. Then, the control CPU is
Regardless of whether the power supply to the evaluation board is performed by turning on the switch common to both boards of the electronic control unit or the power supply from the controller, the control data stored in the ROM is transferred to the emulation RAM and written immediately after the power is supplied. Has been done.

According to a sixth aspect of the present invention, there is provided a method of using the adjusting device for an electronic control unit according to the first aspect, wherein the power switch of the controller is turned on before turning on a switch common to both boards of the electronic control unit. It is configured to be turned on to energize.

According to a seventh aspect of the present invention, there is provided a method of using the electronic control unit adjusting device according to the first aspect,
Before turning on the switch common to both boards of the electronic control unit, first turn on the power switch of the controller.
It is operated to energize, and then it is inspected whether the communication between the controller and the control CPU of the electronic control unit is normally performed, and the switch common to both boards of the electronic control unit is checked according to the inspection result. It is configured to display the suitability of the ON operation.

The invention according to claim 8 shows a mode in which the method of using the adjusting device for an electronic control unit according to claim 7 is applied to the case of engine control. That is, the electronic control unit controls the engine as a predetermined control target, and the switch is an ignition switch.

A ninth aspect of the present invention shows a mode in which the method of using the electronic control unit adjusting device according to the first aspect is applied to a case where ROM emulation is performed. That is, the electronic control unit stores at least control data on the evaluation board in addition to the control CPU.
M and an emulation RAM capable of emulating control data of the ROM are provided, and the controller changes and adjusts the control data written in the emulation RAM. Then, prior to turning on the switch common to both boards of the electronic control unit, first, the power switch of the controller is turned on to energize, and then the control data stored in the ROM is transferred to the emulation RAM. It is configured to write.

According to a tenth aspect of the invention, in the method of using the electronic control unit adjusting apparatus according to any one of the sixth to eighth aspects, the following configuration is further added. That is,
When a system down occurs on the electronic control unit side, a reset signal is output from the control CPU to the controller side, and command transmission from the controller to the control CPU is stopped.

According to an eleventh aspect of the present invention, in the method of using the electronic control unit adjusting apparatus according to the tenth aspect, when the system returns to the normal state after the system goes down, the control CPU outputs a reset release signal to the controller side, The controller side is configured to restart command transmission to the control CPU after a predetermined time has elapsed from the time when the signal was received.

According to a twelfth aspect of the present invention, an electronic control unit comprises an electronic control unit for controlling a predetermined control target by the control CPU, and a controller communicably connected to the control CPU of the electronic control unit. As a method of using the adjusting device, the control CPU outputs a reset signal to the controller side when the system down occurs on the electronic control unit side, and the command transmission from the controller to the control CPU is stopped.

According to a thirteenth aspect of the present invention, in the method of using the electronic control unit adjusting apparatus according to the twelfth aspect, when the system returns to a normal state after the system goes down, the control CPU outputs a reset release signal to the controller side, The controller side is configured to restart command transmission to the control CPU after a predetermined time has elapsed from the time when the signal was received.

(Operation) With the above configuration, in the invention according to claim 1, when the controller is energized, the controller board is also energized via the controller, so that both boards of the electronic control unit are common. Before the switch is turned on, it is possible to perform communication inspection and data transfer between the controller and the control CPU on the evaluation board of the electronic control unit.

According to the second aspect of the present invention, before the switch common to both boards of the electronic control unit is turned on, the communication inspection means inspects whether the communication between the control CPU and the controller is normally performed. At the same time, by displaying the suitability of the ON operation of the switch common to both boards of the electronic control unit on the display means according to the inspection result,
The erroneous control due to the communication abnormality, for example, the fuel blowing in the case of the engine control as in the invention according to claim 3, is prevented before and surely.

In the invention according to claim 4, when a system down occurs on the electronic control unit side and a reset signal is output from the control CPU to the controller, the command transmission from the controller to the CPU is temporarily stopped and the control C
Since the command transmission to the CPU is restarted after a predetermined time has elapsed from the time when the reset release signal was received from the PU, the command transmission that cannot be processed is not issued when the system goes down on the electronic control unit side, and the control reliability is high. Become.

In the invention according to claim 5, not only when the power is supplied to the evaluation board by turning on the switch common to both boards of the electronic control unit, but also when the power is supplied to the controller, the power is supplied to the evaluation board through the controller. Even when the power is turned on, the control data is transferred from the ROM on the evaluation board to the emulation RAM immediately after the power is turned on by the control of the control CPU on the evaluation board. ROM emulation can be performed, and experimental / test control can be performed based on the ROM data changed immediately after the switch is turned ON.

In the invention according to claim 6, before turning on the switch common to both boards of the electronic control unit, the power switch of the controller is turned on to energize the electronic control unit to turn on the electronic control unit. Since power is also supplied to the evaluation board, it becomes possible to perform communication inspection and data transfer between the control CPU and controller on the evaluation board.

According to the seventh aspect of the present invention, prior to the ON operation of the switch common to both boards of the electronic control unit, first, the power switch of the controller is turned ON to energize the electronic control unit so that the evaluation board is also installed. It is energized, and then it is inspected whether communication between the control CPU on the evaluation board and the controller is normally performed, and whether or not the ON operation of the switch common to both boards of the electronic control unit is appropriate according to the inspection result. By displaying, the erroneous control due to the communication abnormality, for example, the blowing of the fuel in the case of the engine control as in the invention according to the eighth aspect, is prevented in advance.

In the invention according to claim 9, prior to the ON operation of the switch common to both boards of the electronic control unit, first, the power switch of the controller is turned on to energize the electronic control unit so that the evaluation board is also installed. By energizing and then transferring the control data stored in the ROM on the evaluation board to the emulation RAM to write it, ROM emulation can be performed before the switch of the power supply system on the electronic control unit side is turned on. Yes, the RO changed immediately after the switch was turned ON
Experimental / test control based on M data can be performed.

According to the tenth aspect of the present invention, when the system goes down on the electronic control unit side, the control CPU outputs a reset signal to the controller side to stop the command transmission from the controller to the control CPU. The command transmission that cannot be processed is not issued when the system of the electronic control unit side is down, and the reliability of control is improved. In particular, in the invention according to claim 11, the reset release signal is output from the control CPU to the controller side when the system returns to normal after the system goes down, and the controller side sends the reset release signal to the control CPU after a predetermined time has elapsed from the time when the signal was received. By restarting the command transmission, the command transmission at the time of system down on the electronic control unit side can be reliably prevented, and the non-execution of command processing can be prevented.

According to the twelfth aspect of the invention, as in the case of the tenth aspect of the invention, when the system goes down on the electronic control unit side, a reset signal is output from the control CPU to the controller side to control from the controller. For CP
By stopping the command transmission to U, it is possible to prevent the command transmission that cannot be processed when the system is down on the electronic control unit side and improve the control reliability. Particularly, in the invention according to claim 13, when the system returns to the normal state after the system goes down, the control CPU outputs the reset release signal to the controller side, and the controller side sends the reset CPU a predetermined time after the signal is received to the control CPU. By restarting the command transmission of, the command transmission at the time of system down on the electronic control unit side is surely prevented,
It is possible to prevent non-execution of command processing.

[0029]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a tool as an adjusting device or a monitor device of an electronic control unit according to an embodiment of the present invention,
This tool is used at the stage of development of a controlled object and is composed of an electronic control unit (ECU) 1, a relay box 13 as a relay means, and a controller 22, of which the electronic control unit 1 Is provided in association with the controlled object, but the relay box 13 and the controller 22 are provided separately from the electronic control unit 1.

That is, in FIG. 1, an electronic control unit 1 controls an electronically controlled fuel injection engine of an engine as a control target, and an electronic board 2 is mounted on the electronic control unit 1 and the electronic board 2 controls the engine. CPU3, program ROM4, emulation RA
M5, memory ROM 6 for switching between these program ROM 4 and emulation RAM 5, unit side DPR
An AM (dual port RAM) 7 and a 16-bit relay terminal 8 as a connector located at the end of the evaluation board 2 are attached. Further, as shown in FIG. 2, the electronic control unit 1 has an I / O separate from the evaluation board 2.
An O (input / output) board (input / output board) 41 is mounted, and the I / O boat 41 has various signal input / output terminals and associated circuits (both not shown), a current limiting device 42 and A voltage converter 43 is attached.

The control CPU 3 performs original engine control (specifically, fuel injection control), and in the meantime, it is a tool in the last priority order having lower priority than the original engine control and other controls. Signal processing. The control CPU 3 stores variables necessary for control which are detected by sensors (not shown) and change every moment.
AM and ROM (both not shown) are built in.

The program ROM 4 constitutes the ROM or the external ROM in the invention according to claim 5 or 9, and includes a control program required when the control CPU 3 performs engine control, and various constants and coefficients. Predetermined basic control data is stored. On the other hand, the emulation RAM 5 temporarily stores the control data in order to rewrite the control data in the program ROM 4 and also temporarily stores the control program in order to speed up the control. . These programs RO
The M4 and the emulation RAM 5 are connected to the control CPU 3 via a data bus 9 and an address bus 10. Then, the memory switching unit 6 functions as a switching means by the program R according to a command from the control CPU 3.
The OM 4 and the emulation RAM 5 are selectively switched. By outputting a ROM selection signal from the memory switching section 6 to the program ROM 4, the program ROM 4
By outputting the RAM selection signal to the emulation RAM5.

Further, unlike the normal RAM, the unit-side DPRAM 7 has two ports and is bidirectionally accessible to each port, and has a predetermined capacity (for example, 32 kbytes). One of the ports is connected to the control CPU 3 via the data bus 9 and the address bus 10. The other port of the unit side DPRAM 7 is connected to the relay terminal 8 via a 16-bit bus 11, for example.

The program RO on the evaluation board 2 is
M4, emulation RAM5, memory switching unit 6, D
The PRAM 7 and the relay terminal 8 are provided on the evaluation board 2 until the control data (including the control program in some cases) of the program ROM 4 is fixed at the development stage of the control target, and the control of which the data of the program ROM 4 is determined. For the target mass-produced product, the electronic control unit 1 is equipped with an evaluation board in which the program ROM 4 and the like are not installed and only the control CPU 3 is installed, and the finalized control data and control program are stored in the control CPU 3. Stored in internal ROM.

The relay box 13 is equipped with parallel communication and serial communication relay terminals 14 and 18 arranged at the end of the board, a communication CPU 16, and a serial receiver / driver 17. . The relay terminal 14 for parallel communication has, for example, 16 bits, and the relay terminal 8 on the evaluation board 2 of the electronic control unit 1 has, for example, 16 bits (16 lines) and has a relatively short length (for example, 10 to 20 cm). Parallel communication cable 1
, 2, ... Can be connected.

The communication CPU 16 converts parallel communication data and serial communication data, one port of which is connected to the parallel communication relay terminal 14 via a 16-bit bus 15, and the other port. The port is connected to the relay terminal 18 for serial communication via the serial receiver / driver 17. The serial receiver / driver 17 is attached to the communication CPU 16 and is used to match the input / output data of the communication CPU 16 with the standard of the serial communication cable 20 described later. Further, one end of one serial communication cable 20 can be connected to the relay terminal 18 for serial communication, and the other end of the serial communication cable 20 can be connected to the controller 22. Then, in the relay box 13, when, for example, current-driven serial communication data is transmitted from the controller 22 to the electronic control unit 1, the communication CPU 16 converts the serial communication data into parallel communication data to convert the serial communication data to the electronic control unit 1. Unit side DPRA on EVA board 2
While writing to the specified address in M7, C for communication
The PU 16 reads parallel communication data at a predetermined address of the DPRAM 7 of the electronic control unit 1 and converts it into serial communication data, and then the controller 2
It is designed to be sent to 2.

The controller 22 includes an I / F box (interface box) 23 and a personal computer 30 connected to it. The personal computer 30 includes a personal computer main body 31 having a built-in CPU (not shown) for data analysis (for monitoring), a display 33 connected to the personal computer main body 31, and an external input device 32 such as a keyboard. The I / F box 23 is for performing serial communication with the relay box 13, and has a relay terminal 24 for serial communication arranged at an end portion of the board, a communication CPU 26, and a serial receiver / driver 25. ,
An I / F board side DPRAM 27 and a system bus 28 are mounted. Relay terminal 24 for serial communication
As described above, can be connected to the serial communication relay terminal 18 of the relay box 13 via the serial communication cable 20. This serial communication cable 20
Is, for example, a current-driven type that converts data into the magnitude of current and transmits the data, and the cable length is, for example, 5 to 6 m.
Therefore, the length is set longer than the cable length of each parallel communication cable 12.

The communication CPU 26 is the same as the communication CPU 16 in the relay box 13 and converts parallel communication data and serial communication data. One port of the communication CPU 26 is connected to the communication CPU 2
It is connected to the relay terminal 24 for serial communication via the serial receiver / driver 25 attached to the terminal 6.

The I / F board side DPRAM 27 has the same structure as the DPRAM 7 in the electronic control unit 1 and has the same structure.
It is composed of a RAM having two ports and having a predetermined capacity capable of bidirectionally accessing each port, the other port of the communication CPU 26 is connected to one port, and the other port of the DPRAM 27 is a system bus. 28
It is connected to the.

Further, the system bus 28 of the I / F box 23 is connected to the personal computer 30, so that the control data stored in the program ROM 4 of the electronic control unit 1 by the personal computer 30 (specifically, in the emulation RAM 5 ROM emulation and electronic control unit 1 for rewriting written control data)
When a command is issued to monitor various data in the RAM (RAM monitor) in the control CPU 3, the ROM emulation or the RAM monitor is performed according to the command.

The control CPU 3 on the evaluation board 2 and the personal computer 30 in the electronic control unit 1 are the DPRAM 7 and the relay terminal 8 on the evaluation board 2, the parallel communication relay terminal 14 on the relay box 13, and the communication CPU 1.
6 and serial communication relay terminal 18, serial communication relay terminal 24 of I / F box 23, communication CPU 2
6, the DPRAM 27 and the system bus 28 are connected by a 1-channel interrupt cable 35, and the interrupt cable 35 is used to transmit and receive an interrupt command.

Now, the power supply system of the electronic control unit 1, the relay box 13 and the controller 22 will be described with reference to FIG. With respect to electronic components such as input terminals on the I / O board 41 of the electronic control unit 1, when the ignition switch 44 is turned on, a current is supplied from the power supply 45 to the I / O.
It is supplied via a current limiting device 42 and a voltage converter 43 provided on the board 41 (the electric circuit of this supply portion is shown by a virtual line in the figure), and its voltage is 5V. Further, to the controller 22 and the relay box 13, when the power switch 46 of the personal computer 30 is turned on, current is supplied from the power source 45 through the current limiting device 47 and the voltage converter 48 provided in the personal computer 30 (this supply The electric circuit of the part is shown by a solid line in the figure), and its voltage is 5V. Further, for the electronic parts such as the control CPU 3 on the evaluation board 2 of the electronic control unit 1, the O of the ignition switch 44 is set.
It is provided so that current is supplied from the I / O board 41 side at the time of N and from the controller 22 side when the power switch 46 of the personal computer 30 is turned on, and the voltage is 5V in each case. In FIG. 2, reference numeral 49 denotes a diode provided in the wiring between the I / O board 41 of the electronic control unit 1 and the evaluation board 2, and the controller 2
It prevents current from flowing from the 2 side to the I / O board 41. Reference numeral 50 denotes a diode provided in the wiring between the relay box 13 and the electronic control unit 1, and a current is supplied from the electronic control unit 1 side to the relay box 1
3 and the controller 22.

The configuration of the DPRAMs 7 and 27 will be specifically described. The DPRAMs 7 and 27 are shown in FIG.
, A command block used for command processing for the electronic control unit 1 and the electronic control unit 1
Are assigned to the monitor block used for the RAM monitor and the status block used for the interrupt processing from the personal computer 30.

A command area, an option area, a data area and a status area are assigned to the command block. The command area is an area for writing a command code from the personal computer 30 side to the electronic control unit 1, and in order to prevent a reading error on the electronic control unit 1 side, the personal computer 30 side uses the same code as the upper code (H) and While writing in the lower code (L), the electronic control unit 1 side reads them twice.

The option area is an area for storing options (address, data number, etc.) as auxiliary information for the command. In addition, the data area is the data for commands (ROM data, monitor address, etc.)
Is an area for storing. The status area stores status codes such as an end result and an error after processing the command on the electronic control unit 1 side.

A monitor setting area, a monitor address area, and a monitor data area are assigned to the monitor block. Monitor setting area turns the monitor ON / OF
The switch for switching to F and the monitor switch / channel number area for setting the number of channels, and the preset value set on the electronic control unit 1 side from the personal computer 30 side (the electronic control unit 1 side reads this data,
Change monitor cycle and trigger mode) Monitor cycle /
It is composed of a trigger mode area, an address setting mode switch area for designating a monitor address setting mode, and a page area for storing the number of pages (upper address) when the monitor address setting mode switch is in the standard mode.

The monitor address area includes an extended mode area for designating a monitor address in 4 bytes including a spare for each channel and a standard mode for designating a monitor address in 3 bytes. The monitor data area is an area for storing monitor data.

A status area and an interrupt area are assigned to the status block. The status area includes a status code area, a monitor status code area, a monitor status area, a command check counter, and a monitor check counter. The status code area stores a status code (return code) processed by a command. When the personal computer 30 receives an interrupt from the DPRAMs 7 and 27, this code determines the processing system.

The monitor status code area is an area for storing a monitor status code in the monitor processing. When the personal computer 30 receives an interrupt from the DPRAMs 7 and 27, this code determines the processing system of the monitor.
The monitor status area is an area for writing the status after the monitor service routine processing.

The command check counter is read during the interrupt process on the personal computer 30 side.
In order to check the number of communication errors of commands,
This represents information for determining the priority of the interrupt process on the personal computer 30 side when the time difference between the monitor system and command system interrupts from the electronic control unit 1 is small. Then, on the electronic control unit 1 side, a command service routine, which will be described later, is activated, and the counter is incremented each time the status is returned.

The monitor check counter is also a personal computer 3.
This is read during interrupt processing on the 0 side, and is used to check for monitor errors, etc.
Indicates the information for determining the priority of the interrupt processing on the side. Then, the counter is incremented each time a monitor service routine described later on the electronic control unit 1 side is activated.

On the other hand, in the interrupt area, data for generating an interrupt signal on the electronic control unit 1 side is written. The command on the electronic control unit 1 side and the processing end timing of the monitor are set to the personal computer 30.
Used to communicate to the side. That is, when data is written in this interrupt area, the DPRAM 7, 2
Interrupt flag is set in 7 and DPRAM
An interrupt signal is output from 7, 27, and this interrupt signal is transmitted to the personal computer 30 side by the interrupt cable 35. Upon receiving this interrupt signal, the personal computer 30 executes either command-based processing or monitor-based processing, and then reads the interrupt area. At this time, the interrupt signals of the DPRAMs 7 and 27 are reset. This interrupt area includes a command interrupt identification code area, a monitor interrupt identification code area, and an interrupt code area.

(Transfer of control data and control program)
Next, in the evaluation board 2 of the electronic control unit 1, a program ROM based on the control of the control CPU 3
An operation procedure for transferring the control data and the control program stored in No. 4 to the emulation RAM 5 will be described with reference to the flowchart shown in FIG.

First, it is determined in step S1 whether or not the ignition switch 44 is ON, and in step S2 whether or not the power switch 46 of the personal computer 30 is ON. That is, it is determined whether or not a current is supplied from the power supply 45 to the evaluation board 2 of the electronic control unit 1 via the I / O board 41 or the controller 2. When a current is supplied, the control data and control program stored in the program ROM 4 are immediately transferred to the emulation RAM 5 and written in the RAM 5 in step S3. After this transfer, both the ignition switch 44 and the power switch 46 of the personal computer are turned off.
When the answer is N, the control CPU 3 is a ROM described later.
Except for emulation R above emulation R
The AM 5 is accessed, and the engine is controlled based on the control data and the control program written in the AM 5.

As described above, not only when the ignition switch 44 on the electronic control unit 1 side is turned on to energize the evaluation board 2 of the electronic control unit 1, the power switch 46 of the personal computer 30 is turned on and the controller 22 and Even when the evaluation board 2 of the electronic control unit 1 is energized via the relay box 13, the control data is transferred from the program ROM 4 on the evaluation board 2 to the emulation RAM 5 immediately after energization by the control of the control CPU 3 on the evaluation board 2. Will be written as
ROM emulation can be performed before the ignition switch 44 on the electronic control unit 1 side is turned on, and experimental / test engine control can be performed based on the control data changed immediately after the ignition switch 44 is turned on. . Further, since the control CPU 3 on the evaluation board 2 and the controller 22 can communicate with each other before the ignition switch 44 is turned on, the RAM monitor can be performed immediately after the engine is started. Therefore, a cold start test can be easily dealt with.

(Starting of Tool) Next, in order to describe a desirable operation procedure at the time of starting the tool, the power switch 46 of the personal computer 30 is turned on prior to turning on the ignition switch 44 on the electronic control unit 1 side. The controller 22, the relay box 13, and the evaluation board 2 of the electronic control unit 1 are energized. Then, at the start of the energization, the failure diagnosis is performed by communicating between the analysis CPU of the personal computer 30 of the controller 22 and the control CPU 3 of the electronic control unit 1. The personal computer 30
Analysis CPU and control CPU 3 of the electronic control unit 1
Communication between the DPRAMs 7 and 27 is performed via the two DPRAMs 7 and 27 and the communication CPUs 16 and 26. Basically, the analysis CPU and the control CPU 3 access and write data to the DPRAMs 7 and 27, respectively. It is designed to be performed by reading it. In the following explanation, the communication C
The operation of the PUs 16 and 26 is omitted in the description.

C for analysis of the personal computer 30 for fault diagnosis
The control flow in the PU is shown in FIGS. 5 to 7, and the control flow in the control CPU 3 of the electronic control unit 1 is shown in FIGS. 8 and 9.
Shown in Note that the control flow of FIG. 5 is performed every 5 msec by the analysis CPU startup program.
The control flow of (1) is similarly performed by the startup program of the control CPU 3 every 5 msec.

That is, in the analysis CPU of the personal computer 30, as shown in FIG. 5, after the start, a failure diagnosis is first performed in step S11. This failure diagnosis system command processing is performed according to the flow shown in FIG. Then, in step S12, it is determined whether or not the communication is normal based on the diagnosis result. If the communication is normal, the display 3 is displayed in step S13.
3 "IG (ignition switch 44) can be turned on"
Is displayed, on the other hand, if there is an abnormality, steps S14 and S15
The "IG cannot be turned on" and the error message are displayed on the display 33, respectively. Then, step S16
The main process is performed with and the process ends. Above steps S11, S
According to claim 12, the control CPU 3 according to the invention of claim 2
The communication inspection means 61 for inspecting whether the communication between the controller 22 and the controller 22 is normally performed is configured, and the communication inspection according to the invention according to claim 2 is also performed by the steps S12 to S15 and the display 33. A display unit 62 is configured to display whether or not the ON operation of the ignition switch 44 on the electronic control unit 1 side is appropriate according to the inspection result of the unit 61.

In the failure diagnosis system command processing, as shown in FIG. 6, first, in step S21, it is confirmed that there is a request for the ECU model code, and then in step S22, the command C2 for requesting the model code is issued to the DPRAM 7, 27. The command block is written in the upper and lower command code areas of the command area, and a reply waiting process is performed in step S23. This reply waiting process is performed according to the flow shown in FIG. Succeedingly, in a step S24, it is determined whether or not the error flag Ferr is set, and the determination is YES.
If the failure occurs, the process ends after performing a predetermined command error process in step S25, while if the determination is NO, the process ends.

The response waiting process is as shown in FIG.
First, after resetting the counter to zero in step S31,
In step S32, it is determined whether or not there is a reply of the model code from the control CPU 3 of the electronic control unit 1, and if there is a reply, the error flag Ferr is reset in step S36 and the processing ends. On the other hand, when there is no reply, after incrementing the counter in step S33, step S33
At 34, it is determined whether the counter is 2 msec or more. If the determination is NO, the process returns to step S32, but the determination is Y.
In the case of ES, that is, when there is no reply for 2 msec or more, the error flag Ferr is set in step S35, and the process ends.

On the other hand, the control CPU of the electronic control unit 1
In step 3, as shown in FIG. 8, first, in step S41, DP
The upper command code (H) of the command area in the command block of the RAM 7, 27 is read, and the lower command code (L) is read in the next step S42, and both command codes (H), (L) are read in step S43. Determine if they are different (double check). When this determination is YES, the process proceeds to step S45, a predetermined code is written in the status area of the command block, and then the process proceeds to step S50.

If the determination in step S43 is NO, command determination processing is performed in step S44, each command processing according to the determination result is performed in step S46, and then it is determined in step S47 whether an error has occurred. judge. If this determination is YES, after the error code is written in the status area of the command block in step S48 as in step S45, the determination is NO.
In case of, in step S49, after writing a predetermined code in the status area, the process proceeds to step S50. In this step S50, the command code write processing command is written in the status code area in the status area of the status block. In the next step S51, the command check counter in the status area of the status block is incremented,
In step S52, a predetermined code is written in the command interrupt identification code area in the interrupt area of the status block, and in the last step S53, the predetermined code is written in the interrupt code area of the interrupt area, and then the process ends.

As one of the command processes in step S46, there is a process for the model code request command C2 from the personal computer 30 side (C2 command process), and this C2 command process is performed according to the flow shown in FIG. . That is, the model code is DP in the first step S61.
Write to the data area in the command block of RAM7, 27, and in the next step S62, error flag Ferr
Reset and exit.

As described above, prior to turning on the ignition switch 44 on the electronic control unit 1 side, the power switch 46 of the personal computer 30 is turned on to control the controller 22, the relay box 13 and the evaluation board 2 of the electronic control unit 1. When energized, the controller 2
Analysis CPU and electronic control unit 1 of the second personal computer 30
The failure diagnosis is performed by communicating with the control CPU 3 for requesting and replying the model code, and the suitability of the ON operation of the ignition switch 44 is displayed on the display 33 of the personal computer 30 according to the diagnosis result. Before the ON operation of the ignition switch 44, erroneous control of the engine by the electronic control unit 1 due to a communication error between the controller 22 and the electronic control unit 1, for example, the fuel is kept blown, can be prevented in advance. You can

(Method of ROM Emulation and RAM Monitor) Subsequently, a method of ROM emulation in which the control data stored in the program ROM 4 of the electronic control unit 1 is rewritten from the personal computer 30 side, and stored in the RAM of the control CPU 3. A specific description will be given of a RAM monitor method for monitoring the data on the personal computer 30 side.

(ROM Emulation) The ROM emulation is performed in the processing sequence described below, and the D
The processing order for the PRAMs 7 and 27 is shown by numbers in FIG. A flowchart of ROM emulation is shown in FIG. When performing ROM emulation, the control CPU 3 of the electronic control unit 1 performs command processing according to the control flow (command service routine) shown in FIG. 8 already described.

(1) First, from the personal computer 30 side of the tool,
Prior to the ROM data change command, the change address to be changed and the number of data (how many bytes of data), etc.
DPRAM7,27 option to rewrite data
Is written in the option area of the command block (step S71 in FIG. 11).

(2) Next, the personal computer 30 side writes the ROM data to be changed into the data area in the command block of the DPRAM 7, 27 (step S
72).

(3) The personal computer 30 side writes the ROM data transfer change command in the command area in the command block of the DPRAM 7, 27 (step S73).

(4) Write a predetermined code from the personal computer 30 side to the interrupt code areas of the DPRAMs 7 and 27 using the interrupt cable 35, and write the DPRAM.
After sending an interrupt command to the control CPU 3 of the electronic control unit 1 from 7, 27, the control C that has received this interrupt command
The PU 3 reads the command code in the command areas of the DPRAMs 7 and 27 and recognizes the command for rewriting data (step S74).

(5) Next, the control CPU 3 of the electronic control unit 1 reads the options of the DPRAMs 7 and 27 and obtains options such as the changed address and the number of data (step S75).

(6) The control CPU 3 reads the data in the data areas in the command blocks of the DPRAMs 7 and 27 based on the read options and writes them in the data area of the specified address on the emulation RAM 5, The ROM data is rewritten (steps S76 and S77). At this time, the control CPU 3
The current load (for example, when the control target of the electronic control unit 1 is an engine, the engine speed stored in the RAM thereof) is read, and the number of changeable data is read from the load of the control CPU 3. This control CPU 3
The relationship between the load (engine speed etc.) and the number of changeable data is set such that the number of data changes decreases as the load of the control CPU 3 increases, as shown in FIG. By doing so, even if the number of changed data increases, the processing in the electronic control unit 1 will not be delayed.

(7) The control CPU 3 sets the status (processing result) to DPRAM after the processing of (4) to (6) is completed.
Write to the status area in the command blocks 7 and 27. At this time, for example, each code is changed depending on whether it ends normally or abnormally (error code) (step S78).

(8) The control CPU 3 uses the DPRAMs 7, 27
Write the command code write processing code in the status code area of the status area in the status block.

(9) The control CPU 3 uses the DPRAMs 7, 27
Increment the command check counter in the status area of the status block.

(10) The control CPU 3 writes a predetermined data value in the interrupt code area in the status blocks of the DPRAMs 7 and 27 in order to notify the personal computer 30 of the end of the command. This makes DPRAM
An interrupt signal is output from 7, 27 to the personal computer 30 side (step S79).

(11) The personal computer 30 side has the above DPRAM
After receiving the interrupt signals from 7 and 27 through the interrupt cable 35, the command check counter and the monitor check counter of the DPRAMs 7 and 27 are read to determine which of the command system and monitor process is to be performed.

(12) The following processes (12) to (15) are for the case where the above determination is a command system process, and the personal computer 30 side executes DPRA.
The status code in the status area in the status block of M7, 27 is read to determine the command processing code. In addition, the number of changed data N on the personal computer 30 side
t and the change data Ne on the electronic control unit 1 side are compared, the remaining data number and the start address are obtained from the change data number in the electronic control unit 1 until Nt> Ne, and then the process (1 ) To (9) are repeated (step S80
~ S83).

(13) The personal computer 30 side reads the status of the status area in the command block to determine whether it is a normal end or an abnormal end.

(14) The personal computer 30 side writes the unprocessed code in the command code area in the command block.

(15) Finally, the personal computer 30 side reads the interrupt code in the interrupt area in the status block and clears the interrupt signal.

(RAM Monitor) In order to perform this RAM monitoring, a monitor service routine as a communication program is provided in the control CPU 3 of the electronic control unit 1. In the monitor service routine, as shown in FIG. The processing operation of is performed. Note that the monitor service routine is executed every 5 msec by the startup program of the control CPU 3 as in the command service routine of FIG.

That is, DPRA is performed in the first step S91.
In the monitor setting area of the monitor block of M7, 27, the monitor switch for deciding whether to start or stop the monitor (whether to send the information) is read, and it is determined whether the monitor switch is ON in the next step S92. To do. If this determination is NO, that is, if the monitor is in a stopped state, the process ends, but if YES, the process proceeds to step S93 to set the monitor channel number N, and then in step S94, the counter n of the channel number N is set to n = N.
And in step S95, the upper, middle, and lower monitor addresses for n channels are set to the DPRAMs 7, 2
Read from the monitor address area of 7. Step S96
Then, the upper data of n channels are written in the monitor data areas of the DPRAMs 7 and 27, and the lower data of n channels are written respectively in step S97, and the counter n of the number of channels is subtracted to n-1 in step S98.

Then, in step S99, it is determined whether or not all of the n channels have ended and n≤0. If this determination is NO, the process returns to step S95,
Repeat steps S95 to S98. Therefore, step S95
S99 are repeated for the number of channels n.

Then, when all n channels are completed, n≤
When it becomes 0, the basic monitor processing ends, and the post-processing proceeds. First, in step S100, the DPRAMs 7 and 2 are
A monitor status (for example, the number of monitor channels when normal, a predetermined code when abnormal) is written in the monitor status area of the status area in the status block 7 of FIG. Next, in step S101, the monitor status code is written in the monitor status code area of the same status area, and in step S102, the monitor check counter of the same status area is incremented. This confirms the execution of the monitor process. After that, in step S103, a predetermined code is written in the monitor interrupt identification code area of the interrupt area,
After writing a predetermined code in the interrupt code area in step S104, the process ends.

The RAM monitoring is performed in the order described below. Basically, so-called software is carried out while confirming transmission / reception of data between the analysis CPU of the personal computer 30 and the control CPU 3 of the electronic control unit 1. It is a handshake method. The processing order for the DPRAMs 7 and 27 is shown by numbers in FIG.

(1) First, the personal computer 30 side monitors the monitor cycle data / trigger, address setting mode switch, page,
The monitor command such as the monitor address, the number of channels, and the monitor switch is output and is written in the data area in the command block of the DPRAM 7, 27 (monitor condition setting write).

(2) Control CPU 3 of electronic control unit 1
Receiving the monitor command, the DPRAM 7, 2
The value of the data area in the command block 7 is read.

(3) The control CPU 3 uses the DPRAMs 7, 2
Write the set value in the monitor setting area corresponding to the command in the monitor block of 7.

(4) The control CPU 3 reads the monitor set values from the DPRAMs 7 and 27 by the monitor service routine start program, and starts the monitor service routine (see FIG. 13).

(5) The control CPU 3 reads the monitor address in the monitor address areas of the DPRAMs 7 and 27 by the above monitor service routine.

(6) Next, the control CPU 3 sends the monitor data to the DPRAMs 7, 2 based on the monitor address.
Repeatedly write in the monitor data area of 7 for the number of channels.

(7) The control CPU 3 uses the DPRAMs 7, 2
Predetermined status in the status area of status block 7 (for example, monitor data transmission code at normal end, monitor data error code at abnormal end)
Write.

(8) The control CPU 3 uses the DPRAMs 7, 27
Write the following monitor status code in the status area in the status block of.

(9) The control CPU 3 uses the DPRAMs 7, 27
The monitor check counter of the status area in the status block of is incremented.

(10) The control CPU 3 sends the DPRAMs 7 and 27 to notify the personal computer 30 of the end of the monitor processing.
Write a predetermined data value in the interrupt code area in the status block of This makes DPRA
An interrupt signal is output from M7, 27 to the personal computer 30 side.

(11) The personal computer 30 side has the above DPRAM
After receiving the interrupt signal from 7, 27 through the interrupt cable 35, the command check counter and the monitor check counter of the DPRAM 7, 27 are read, and it is determined whether the command system or the monitor system is to be processed.

(12) DPRAM 7, 27 on the personal computer 30 side
Read the status code in the status area of the status block to obtain the monitor processing code.

(13) DPRAM 7, 27 on the personal computer 30 side
Read the monitor status of the status area in the status block of.

(14) The personal computer 30 side performs processing (acquisition of monitor data, etc.) based on the processing code of the status area in the command block.

(15) Finally, the personal computer 30 side reads the interrupt code in the interrupt area in the status block and clears the interrupt signal. With the above, one sampling is completed and the monitor switch is turned off.
The above processes (4) to (15) are repeated until F is reached.

ROM emulation and RAM described above
The monitoring methods are summarized in Table 1.

[0104]

[Table 1]

(Processing at the time of system down) Next, the processing operation at the time of system down in the electronic control unit 1 in which the voltage from the power supply 45 is lowered by driving a starter or the like during engine control will be described.

At the time of system down, the reset pulse generated from the reset pulse oscillator (not shown) mounted on the I / O board 41 of the electronic control unit 1 changes from Hi level to Lo level as shown in FIG. Fall. When the system returns to normal after the system goes down, the reset pulse rises from Lo level to Hi level and returns to the original level. During the period from the system down to the normal return, the control CPU 3 of the electronic control unit 1 operates as shown in FIG.
Analysis CPU of the personal computer 30 according to the control flow shown in
While communication is performed with the
The PU performs reset detection processing according to the control flow shown in FIG.

That is, the control C of the electronic control unit 1
In the communication control by the PU3, after confirming that the reset pulse is the falling edge in the first step S111, that is, when the system is down, the command C3 requesting the stop of the command transmission is used as the reset signal in the DPRAM7 in the step S112. While writing in the command area in the 27 command block, D in step S113
The reset code (h'9B) is written in the status code area in the status blocks of the PRAMs 7 and 27, an interrupt issuance is issued to the controller 22 side in step S114, and the process ends. When the system returns to normal after the system goes down and the reset pulse rises, the process proceeds from step S115 to step S116, and the command C5 requesting the restart of the command transmission is set as the reset release signal in the DPRAM 7, 27.
Writing to the command area in the command block, the reset code (h'9B) is written to the status code area in the status blocks of the DPRAMs 7 and 27 in step S113, and an interrupt issuance is issued to the controller 22 side in step S114 to finish.

In the reset detection process by the analyzing CPU of the personal computer 30, the DPR is executed in the first step S121.
The command code of the command area in the command block of AM7, 27 is read, and it is determined whether it is the C3 command, that is, whether the C3 command (reset signal) is received. If the determination is YES, further step S122 is executed. The reset code in the status code area in the status blocks of the DPRAMs 7 and 27 is read, and it is determined whether the code is h'9B. The determination in both steps S121 and S122 is to determine whether or not the electronic control unit 1 side is requesting cancellation of command transmission at the falling edge of the reset pulse. When it is requested to stop the command transmission, the command transmission flag Fxcmd is output in step S123.
After resetting, shifts to step S128.

On the other hand, when the determination in step S121 or S122 is NO, the DPRAM 7, 27 is determined in step S124.
The command code in the command area in the command block is read, and it is determined whether or not it is the C5 command, that is, whether or not the C5 command (reset release signal) is received. If the determination is YES, further step S
At 125, the reset code in the status code area in the status block of the DPRAM 7, 27 is read, and it is determined whether the code is h'9B. The determination in both steps S124 and S125 is to determine whether or not the electronic control unit 1 side is requesting restart of command transmission at the rising edge of the reset pulse. Then, when restart of command transmission is requested, after waiting for a fixed time ta in step S126, the command transmission flag Fxcmd is set in step S127, and then the process proceeds to step S128.

Then, in step S128, it is determined whether or not the command transmission flag Fxcmd is set, and if the determination is YES, the command transmission is possible, that is, the operation is terminated in step S128, while if the determination is NO, the step is executed. In S130, the command transmission is disabled, that is, prohibited, and the process ends.

Thus, when the system of the electronic control unit 1 is down, the control CPU of the electronic control unit 1
3 sends a command transmission stop request to the analysis CPU of the controller 22, and the analysis CPU prohibits command transmission immediately after the system goes down (that is, immediately after the reset panel falls). When the system returns to normal after the system goes down, the control CPU 3 of the electronic control unit 1
Sends a command transmission restart request to the analysis CPU of the controller 22, and the analysis CPU restarts command transmission after a predetermined time ta has elapsed. Therefore, it is possible to prevent a situation in which the control CPU 3 of the electronic control unit 1 cannot execute the command processing received during the system down due to the system down, and enhance the reliability of the control. it can.

The present invention is not limited to the above embodiment, but includes various other modifications.
For example, in the above embodiment, the case where the emulation RAM 5 for ROM emulation is provided in the electronic control unit 1 has been described, but the present invention discloses the emulation RAM 5 as disclosed in Japanese Patent Laid-Open No. 6-259284. The same can be applied to the case where it is provided on the controller 22 or the tool side.

[0113]

As described above, according to the first and sixth aspects of the present invention, when the controller is energized, the controller board is also energized, so that the electronic control unit Before turning on the switch common to both boards, it becomes possible to perform communication inspection and data transfer between the controller and the control CPU on the evaluation board of the electronic control unit, thus preventing erroneous control. In addition, the ROM emulation and the RAM monitor can be executed immediately before or after turning on the switch of the power supply system on the electronic control unit side.

According to the second and seventh aspects of the invention, the switch common to both boards of the electronic control unit is turned on.
Before the operation, the communication inspection means inspects whether the communication between the control CPU and the controller is normally performed, and the ON operation of the switch common to both boards of the electronic control unit is appropriate according to the inspection result. By displaying on the display means, it is possible to prevent erroneous control due to communication abnormality, for example, fuel blowing in the case of engine control.

According to the fourth and tenth to thirteenth aspects, when the system down occurs in the electronic control unit side, the command from the controller to the CPU is issued based on the reset signal from the control CPU. By stopping the transmission, non-execution of command processing can be prevented and the reliability of control can be improved. Particularly, in the inventions according to claims 4, 11 and 13, the control C
By restarting the command transmission to the CPU after a lapse of a predetermined time from the time of receiving the reset release signal from the PU, it is possible to reliably prevent non-execution of the command processing and further improve the control reliability.

According to the fifth and ninth aspects of the invention, ROM emulation can be performed before the switch of the power supply system on the electronic control unit side is turned on. For example, a cold start test under engine control can be performed. Can also be easily dealt with.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an electronic control unit according to an embodiment of the present invention and a tool for performing ROM emulation and RAM monitoring of the electronic control unit.

FIG. 2 is a power supply system diagram of the electronic control unit and the tool.

FIG. 3 is an explanatory diagram showing each block and its area in the DPRAM.

FIG. 4 is a flowchart showing a transfer operation of control data and a control program.

FIG. 5 is a flowchart showing a control flow in an analysis CPU of a personal computer for failure diagnosis at the time of starting a tool.

FIG. 6 is a flow chart of a failure diagnosis system command process by the analysis CPU.

FIG. 7 is a flowchart of a reply waiting process.

FIG. 8 is a flowchart showing a monitor service routine.

FIG. 9 is a flowchart of C2 command processing.

FIG. 10 is a diagram showing a sequence of processing operations for the DPRAM during ROM emulation.

FIG. 11 is a flowchart showing a processing operation of ROM emulation.

FIG. 12 is a characteristic diagram showing the relationship between the load on the control CPU during ROM emulation and the number of data that can be changed in the emulation RAM.

FIG. 13 is a flowchart showing a monitor service routine.

FIG. 14 is a diagram showing the sequence of processing operations for the DPRAM during RAM monitoring.

FIG. 15 is a time chart showing the relationship between reset pulse levels and command transmission.

FIG. 16 is a flowchart showing a control flow of a control CPU of an electronic control unit for communication when the system is down.

FIG. 17 is a flowchart of reset detection processing.

[Explanation of symbols]

 1 electronic control unit (ECU) 2 evaluation board 3 control CPU 4 program ROM (ROM) 5 emulation RAM 22 controller 30 personal computer 33 display 41 I / O board (input / output board) 44 ignition switch 46 personal computer power switch 61 communication inspection means 62 display means

Claims (13)

[Claims] 1. An electronic control unit for controlling a predetermined control target by a control CPU, and a controller communicably connected to the control CPU of the electronic control unit, wherein the electronic control unit is at least An electronic control unit having an evaluation board to which a control CPU is attached and an input / output board to which various signal input / output terminals are attached, and configured to energize both boards by turning on a common switch. 2. The adjusting device for an electronic control unit according to claim 1, wherein only the evaluation board of the electronic control unit is energized via the controller when the controller is energized. 2. The adjusting device for an electronic control unit according to claim 1, further comprising a communication inspection means for inspecting whether communication between the control CPU and the controller is normally performed, and an inspection of the communication inspection means. An adjusting device for an electronic control unit, comprising: a display unit that displays whether or not an ON operation of a switch common to both boards of the electronic control unit is displayed according to a result. 3. The electronic control unit is for controlling an engine as a predetermined control target, and the display means is a switch common to both boards of the electronic control unit, and indicates whether or not an ON operation of an ignition switch is appropriate. The adjusting device for an electronic control unit according to claim 2. 4. The controller suspends command transmission to the CPU when receiving a reset signal from the control CPU, and transmits the command to the CPU after a predetermined time has elapsed from the time when the reset release signal was received from the control CPU. 4. The electronic control unit adjustment device according to claim 1, wherein the adjustment device is configured to restart. 5. The electronic control unit has, on its evaluation board, a ROM for storing at least control data and an emulation RAM capable of emulating the control data of the ROM, in addition to the control CPU. The controller changes and adjusts the control data written in the emulation RAM, and the control CPU energizes the evaluation board either by turning on a switch common to both boards of the electronic control unit or energizing from the controller. 2. The adjusting device for an electronic control unit according to claim 1, wherein the control data stored in the ROM is transferred to and written in the emulation RAM immediately after energization. 6. A method of using the electronic control unit adjusting device according to claim 1, wherein the power switch of the controller is turned on to energize the switch before turning on a switch common to both boards of the electronic control unit. A method of using an adjusting device for an electronic control unit, which is characterized by performing. 7. A method of using the electronic control unit adjusting device according to claim 1, wherein the power switch of the controller is first turned on prior to turning on a switch common to both boards of the electronic control unit.
It is operated to energize, and then it is inspected whether the communication between the controller and the control CPU of the electronic control unit is normally performed, and the switch common to both boards of the electronic control unit is checked according to the inspection result. A method of using an adjusting device for an electronic control unit, which displays whether or not an ON operation is performed. 8. The method of using the electronic control unit adjusting device according to claim 7, wherein the electronic control unit controls an engine as a predetermined control target, and the switch is an ignition switch. 9. A method of using the adjusting device for an electronic control unit according to claim 1, wherein the electronic control unit has a control C on its evaluation board.
ROM storing at least control data in addition to PU
And an emulation RAM capable of emulating the control data of the ROM, and the controller changes and adjusts the control data written in the emulation RAM, and a switch common to both boards of the electronic control unit. First, turn on the power switch of the controller before the ON operation of
A method of using an adjusting device for an electronic control unit, characterized in that it is operated to energize and then the control data stored in the ROM is transferred to an emulation RAM and written. 10. A method of using the adjusting device for an electronic control unit according to claim 6, wherein when the system down occurs on the electronic control unit side, the control CPU transfers to the controller side. A method of using an adjusting device for an electronic control unit, characterized in that a reset signal is output to stop command transmission from the controller to the control CPU. 11. A method of using the adjusting device for an electronic control unit according to claim 10, wherein the control CPU is used when the system returns to a normal state after the system goes down.
A reset release signal is output from the controller to the controller side, and the controller side restarts command transmission to the control CPU after a lapse of a predetermined time from the time when the signal is received. 12. A method of using an adjusting device for an electronic control unit, comprising: an electronic control unit for controlling a predetermined control target by a control CPU; and a controller communicatively connected to the control CPU of the electronic control unit. A control signal is output from the control CPU to the controller side when a system down occurs on the electronic control unit side, and command transmission from the controller to the control CPU is stopped. How to use the adjusting device. 13. A method of using the electronic control unit adjusting device according to claim 12, wherein the control CPU is used when the system returns to a normal state after the system goes down.
A reset release signal is output from the controller to the controller side, and the controller side restarts command transmission to the control CPU after a lapse of a predetermined time from the time when the signal is received.