JPH0943640A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH0943640A
JPH0943640A JP21538595A JP21538595A JPH0943640A JP H0943640 A JPH0943640 A JP H0943640A JP 21538595 A JP21538595 A JP 21538595A JP 21538595 A JP21538595 A JP 21538595A JP H0943640 A JPH0943640 A JP H0943640A
Authority
JP
Japan
Prior art keywords
film
liquid crystal
pixel
alignment
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21538595A
Other languages
Japanese (ja)
Inventor
Yoshihiro Hashimoto
Toshihiko Iwanaga
Takuo Sato
拓生 佐藤
利彦 岩永
芳浩 橋本
Original Assignee
Sony Corp
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp, ソニー株式会社 filed Critical Sony Corp
Priority to JP21538595A priority Critical patent/JPH0943640A/en
Publication of JPH0943640A publication Critical patent/JPH0943640A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To prevent a short-circuit defect due to the rubbing treatment between micronized pixel electrodes. SOLUTION: A liquid crystal display is provided with a counter substrate 2 having an oriented surface 20T, a picture element substrate 1 having similarly the oriented surface 20B and a panel structure equipped with a liquid crystal layer 3 held between both oriented surfaces 20T, 20B. The counter substrate 2 is equipped with a counter electrode 5 continuously formed along the oriented surface 20T. The picture substrate 1 is equipped with at least plural numbers of switching element 7, a flattened film 18 for levelling rugged parts by coating the switching elements 7, and a picture element electrode 6 which is dividedly formed on the flattened film 18 along the oriented surface 20B and is individually driven by the switching elements 7. The picture element electrode 6 is constituted of a transparent electrically conductive film which is made thin within the thickness range of 10nm to 60nm, thereby preventing the generation of fiber chips in the course of rubbing process.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device. More specifically, it relates to the structure of the pixel electrode.

[0002]

2. Description of the Related Art Liquid crystal display devices are widely used in televisions and graphic displays. Among them, especially active matrix type liquid crystal display devices have high-speed response and are suitable for increasing the number of pixels, and are expected to realize high image quality, large size, and color display screens. Some have been developed and have already been put to practical use. An active matrix type liquid crystal display device generally has a flat panel structure including a pixel substrate, a counter substrate, and a liquid crystal layer held between them. FIG. 2 shows a conventional structure of a pixel substrate. The pixel substrate 101 uses a transparent plate material such as glass, and a switching element 102 such as a thin film transistor is integratedly formed thereon. In the figure, for simplicity, only one switching element is shown.
The switching element 102 is covered with a flattening film 103, on which the pixel electrode 1 made of a transparent conductive film is formed.
The pattern 04 is formed. The surface of the pixel electrode 104 is rubbed in a predetermined direction by a cloth material (buff) 105 and constitutes an alignment surface with respect to the liquid crystal layer. Depending on the case, rubbing is performed after the pixel electrode 104 is covered with a predetermined alignment film. In this structure, the flattening film 103 is used to fill the irregularities of the switching element 102 and the wiring. The flattening film 103 has become an indispensable constituent element along with the miniaturization of pixels. Since the pixel electrode 104 is patterned on the flattening film 103, the alignment surface is extremely flat. Therefore, the rubbing using the cloth material 105 can be performed uniformly, and the abnormal alignment of the liquid crystal layer can be significantly suppressed.

[0003]

However, since the alignment surface is flattened, the pixel electrode 10 which is patterned in the opposite direction is formed.
The step 106 at the end of No. 4 became noticeable.
The fibers 107 of the cloth material 105 are caught in the step 106 and are scraped off, and minute organic dust (buffs) 10
8 was generated. The buff residue 108 adheres to the alignment surface and is interposed between the adjacent pixel electrodes 104 in some cases. The buff residue 108 has, for example, cellulose as a main component and adsorbs moisture or the like, which causes a current leak. If the buff residue 108 adheres between the adjacent pixel electrodes 104, a current leak occurs and it appears as a pixel point defect, resulting in a problem that the display quality is significantly impaired. The thin film transistor forming the switching element 102 has a leak current level of, for example, about 10 −13 A, while
The leak current amount of 08 reaches about 10 -10 A, which is a serious cause of point defects. Since this buff residue 108 cannot be easily removed by ultrasonic cleaning or the like, countermeasures have been desired.

[0004]

The following means have been taken in order to solve the above-mentioned problems of the prior art. That is, the liquid crystal display device according to the present invention has, as a basic structure, a panel structure including a counter substrate having an alignment surface, a pixel substrate having the same alignment surface, and a liquid crystal layer held between both alignment surfaces. Have. The counter substrate includes a counter electrode continuously formed along the alignment surface. The pixel substrate is formed with at least a plurality of switching elements, a flattening film that covers the switching elements and fills the unevenness, and is dividedly formed on the flattening film along the alignment plane, and the switching elements individually And a pixel electrode driven to. Characteristically, the pixel electrode is made of a transparent conductive film thinned in the range of 10 nm to 60 nm. In an embodiment of the present invention, the pixel electrodes are separated from each other by a distance of 5 μm or less. According to another aspect, the pixel substrate includes an alignment film that covers the pixel electrode, and the alignment film is rubbed to form an alignment surface.

According to the present invention, the pixel electrode formed by patterning on the flattening film is made of a transparent conductive film thinned in a thickness range of 10 nm to 60 nm. By thinning the pixel electrode located on the uppermost layer along the alignment surface, the step appearing on the alignment surface is suppressed. This makes it possible to prevent buffing (dust of organic matter) from occurring during the rubbing process and suppress short-circuit defects between pixel electrodes.

[0006]

BEST MODE FOR CARRYING OUT THE INVENTION The best embodiment of the liquid crystal display device according to the present invention will be described in detail below with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing the basic configuration of the present liquid crystal display device. As shown in the figure, the present liquid crystal display device is assembled using a pair of pixel substrate 1 and counter substrate 2 facing each other with a predetermined gap. Pixel substrate 1 has alignment surface 2
0B, and the counter substrate 2 also has an alignment surface 20T. The liquid crystal layer 3 is injected into the gap between the substrates 1 and 2, and is sandwiched by the alignment surfaces 20T and 20B from above and below, and the alignment state thereof is controlled. For example, the nematic liquid crystal layer 3 sandwiched by the alignment surfaces 20T and 20B rubbed in directions orthogonal to each other exhibits a twist alignment state as is well known. The counter substrate 2 includes a counter electrode 5 continuously formed along the alignment surface 20T. The pixel substrate 1 includes at least a plurality of switching elements 7 and a flattening film 1 that covers the switching elements 7 and fills irregularities.
8 and the pixel electrodes 6 formed separately on the planarization film 18 along the alignment surface 20B and individually driven by the switching elements 7. The switching element 7 is composed of, for example, a thin film transistor. As a feature of the present invention, the pixel electrode 6 is composed of a thin transparent conductive film having a thickness of 10 nm to 60 nm. Also, this pixel electrode 6
Are separated from each other at intervals of 5 μm or less and are miniaturized. Furthermore, the pixel substrate 1 includes an alignment film that covers the pixel electrode 6, and the alignment film is subjected to a rubbing treatment to form the alignment surface 20B.

Conventionally, the film thickness of the transparent conductive film forming the pixel electrode 6 has been set to about 100 to 150 nm. For example, a film thickness of 130 to 140 nm is often used. The reason why the relatively thick transparent conductive film is used is that optimization of visible light transmittance due to interference and step coverage are emphasized.
That is, when the film thickness is set to about 100 to 150 nm, the reflection of visible light due to thin film interference can be suppressed, and the transmittance can be optimized. Further, a relatively thick film thickness of about 100 to 150 nm has been adopted in order to sufficiently cover the step appearing on the base and maintain the flatness of the alignment surface. However, with this film thickness, the fibers of the cloth material for rubbing are caught at the ends of the pixel electrodes, and a large amount of buffs are generated, so that short-circuit defects between pixels occur. Therefore, in the present invention, the thickness of the transparent conductive film is 6
The pixel electrode was formed by controlling to 0 nm or less. With the film thickness of this level, the fibers of the cloth material were not caught on the end of the transparent conductive film. The transmittance is slightly lowered due to interference, but within the liquid crystal panel structure, about 95% or more can be secured in the visible light region, and there is no practical problem. As for the step coverage, since the base of the transparent conductive film is previously flattened by the flattening film, there is no particular problem even if the pixel electrode is thinned. By the way, the orientation film covering the pixel electrodes is generally made of a polyimide film or the like, and the thickness thereof is about 30 nm to 100 nm. It is preferably controlled to about 40 nm to 50 nm. On the other hand, if the thickness of the transparent conductive film forming the pixel electrode is suppressed to 60 nm or less, the step on the end face is substantially alleviated by the alignment film, so that almost no buff residue is generated. On the other hand, if the thickness of the transparent conductive film is made thinner than 10 nm, it is difficult to obtain a uniform composition. Therefore, in the present invention, 10 nm to 60 nm is set as the optimum film thickness range of the transparent conductive film. For example, a transparent conductive film such as ITO is 30 nm ± 5
If the film is formed by sputtering in the thickness range of nm, the film thickness condition of the present invention can be sufficiently satisfied. In this case, the fibers of the cloth material are hardly caught on the end portion of the pixel electrode and buffing does not occur, so that a short circuit defect between pixels can be prevented. In addition, since buffs are generally small, the effect of the present invention is high especially when the distance between pixel electrodes is reduced to 5 μm or less.
Point defects can be greatly suppressed. The material of the transparent conductive film is ITO
However, tin oxide or an organic transparent conductive material may be used.

The configuration of the present liquid crystal display device will be concretely described with reference to FIG. The pixel substrate 1 has pixels 4 arranged in rows and columns. In the figure, only one pixel is extracted and shown. The pixel substrate 1 is divided into an upper layer portion, a middle layer portion and a lower layer portion. The upper layer portion includes the pixel electrode 6 formed for each pixel 4, and is patterned on the flattening film 18. As described above, the pixel electrode 6 is made of a transparent conductive film having a thickness of 10 nm to 60 nm. The pixel electrode 6 is covered with an alignment film made of polyimide or the like, and this alignment film is rubbed with a cloth material or the like to form an alignment surface 20B. On the other hand, the lower layer portion includes switching elements 7 that drive the individual pixel electrodes 6, scanning lines 8 that scan the rows of the switching elements 7 corresponding to the rows of the pixels 4 and switching elements that correspond to the columns of the pixels 4. The column 7 includes signal wiring 9 for supplying a predetermined image signal. The switching element 7 is composed of a thin film transistor, and a semiconductor thin film 10 made of polycrystalline silicon or the like is used as an active layer. A gate electrode G is patterned on the semiconductor thin film 10 via a gate insulating film. The gate electrode G is continuous with the scan wiring 8 described above. The thin film transistor includes a source region S and a drain region D on both sides of the gate electrode G. One extraction electrode 11 is connected to the source region S side and is continuous with the above-mentioned signal wiring 9. The other extraction electrode 12 is connected to the drain region D. The semiconductor thin film 1
At 0, an auxiliary capacitor 13 is formed in addition to the above-mentioned thin film transistor. The auxiliary capacitor 13 uses the semiconductor thin film 10 as one electrode and the auxiliary wiring 14 as the other electrode. A dielectric film in the same layer as the gate insulating film is interposed between both electrodes 10 and 14. The gate electrode G, the scanning wiring 8 and the auxiliary wiring 14 are formed of the same layer, and are electrically insulated from the extraction electrodes 11 and 12 by the first interlayer insulating film 15.

A light-shielding film having conductivity is interposed in the middle layer portion between the upper layer portion and the lower layer portion. The light shielding film is divided into a mask light shielding film 16M and a pad light shielding film 16P.
These light shielding films 16M and 16P are made of metal films. The mask light-shielding film 16M is continuously patterned in the row direction of the pixels to shield the switching element 7 from light at least partially. The mask light-shielding film 16M is sandwiched from above and below by the second interlayer insulating film 17 and the flattening film 18, and is insulated from the lower layer portion and the upper layer portion. The mask light-shielding film 16M is held at a fixed potential equal to the potential of the counter electrode 5, for example. On the other hand, the pad light shielding film 16P is discretely patterned for each pixel 4. The pad light shielding film 16P is a contact portion C between the corresponding pixel electrode 6 and the switching element 7.
To intervene in order to electrically connect and shield the light.

Finally, a method of manufacturing the active matrix type liquid crystal display device shown in FIG. 1 will be described in detail. The pixel substrate 1 is made of glass, quartz, or the like, and the semiconductor thin film 10 is formed on the pixel substrate 1 by the low pressure CVD method. For example,
This semiconductor thin film 10 is made of polycrystalline silicon deposited to a film thickness of about 50 nm and is used as an active layer of a thin film transistor. After the semiconductor thin film 10 is formed, it is patterned in an island shape. A gate insulating film made of, for example, SiO 2 is formed on the semiconductor thin film 10. here,
As the material of the semiconductor thin film 10, amorphous silicon or the like may be used in addition to polycrystalline silicon. Further, as the material of the gate insulating film, SiN, tantalum oxide, a laminated film of these, or the like may be used in addition to SiO 2 .

Next, the scanning line 8, the gate electrode G, the auxiliary line 14 and the like are simultaneously formed on the pixel substrate 1. For example,
After depositing polycrystalline silicon with a film thickness of about 350 nm by the low pressure CVD method, impurities are doped to reduce the resistance, and then patterned into a predetermined shape. As materials for the scan line 8, the gate electrode G, and the auxiliary line 14, metal such as Ta, Mo, Al, or Cr, silicides thereof, polycide, or the like may be used in addition to polycrystalline silicon. In this way, a thin film transistor including the semiconductor thin film 10, the gate insulating film and the gate electrode G is formed,
It becomes the switching element 7. In this example, this thin film transistor is a planar type, but a normal stagger type, an inverted stagger type, or the like may be adopted. At the same time, the auxiliary capacitor 13 is also formed on the semiconductor thin film 10.

Next, PSG or the like is deposited by atmospheric pressure CVD to a thickness of about 600 nm to form a first interlayer insulating film 15.
The first interlayer insulating film 15 covers the above-described scanning wiring 8, gate electrode G, auxiliary wiring 14, and the like. Contact holes reaching the source region S and the drain region D of the thin film transistor are opened in the first interlayer insulating film 15. The signal wiring 9 and the lead electrodes 11 and 12 are patterned on the first interlayer insulating film 15. For example, aluminum is deposited to a film thickness of about 600 nm by a sputtering method, patterned into a predetermined shape, and processed into the signal wiring 9 and the extraction electrodes 11 and 12. One extraction electrode 11 is connected to the source region S of the thin film transistor through the contact hole, and the other extraction electrode 12 is connected to the drain region D of the thin film transistor through the contact hole. As a material for the signal wiring 9 and the extraction electrodes 11 and 12, Ta, Cr, Mo, Ni or the like may be used in addition to Al.

A second interlayer insulating film 17 is formed on the signal wiring 9 and the extraction electrodes 11 and 12 and covers them. For example, PSG is deposited to a thickness of about 600 nm by the atmospheric pressure CVD method to form the second interlayer insulating film 17. A contact hole C reaching the extraction electrode 12 is opened in the second interlayer insulating film 17. This second interlayer insulating film 17
A mask light shielding film 16M and a pad light shielding film 16P are formed on the above. For example, 25 by sputtering method
Ti is deposited to a film thickness of about 0 nm, patterned into a predetermined shape, and processed into a mask light-shielding film 16M and a pad light-shielding film 16P. The mask light shielding film 16M is in contact with a fixed potential in a region outside the display pixel. On the other hand, the pad light-shielding film 16P
Contacts the extraction electrode 12 through the contact hole C described above. The mask light shielding film 16M is connected to each other over the entire display pixel region.

Mask light-shielding film 16M and pad light-shielding film 16
A flattening film 18 is formed so as to cover P. The flattening film 18 has a sufficient thickness to fill the unevenness of the switching element and each wiring and to flatten it. Flattening film 18
The surface of the pixel electrode is in a substantially completely flat state, and the pixel electrode 6 is formed thereon.
Are patterned. Therefore, there is no unevenness at the level of the pixel electrode 6 except for the step on the end face thereof. The flattening film 18 is generally required to be colorless and transparent.
Further, since it is necessary to provide the contact hole C, it is necessary that fine processing be possible. Further, since a chemical is used for etching the pixel electrode 6, etc., desired chemical resistance is required. In addition, since it is exposed to a high temperature in a later process, a predetermined heat resistance is required. A desired organic material or inorganic material is selected in order to satisfy such required characteristics. Examples of the organic material include acrylic resin and polyimide resin. Polyimide has excellent heat resistance but is slightly colored. On the other hand, acrylic resin is almost completely colorless and transparent. These resins are applied by, for example, a spin coat method or a transfer method. Examples of the inorganic material include inorganic glass containing silicon dioxide as a main component. In this example, an acrylic resin having a predetermined viscosity and suitable for filling irregularities is used.

Thereafter, the pixel electrode 6 is formed on the flattening film 18. For example, 30 ± 5 nm by sputtering method
A transparent conductive film such as ITO is formed to a film thickness of, and patterned into a predetermined shape to form the pixel electrode 6. Further, an alignment film such as polyimide is formed so as to cover the pixel electrode 6. The alignment film is rubbed in a predetermined direction to form an alignment surface 20B. Finally, the counter substrate 2 made of glass or the like and having the counter electrode 5 formed on the entire surface is bonded to the pixel substrate 1. The liquid crystal layer 3 is sealed in the gap between the substrates 1 and 2. At this time, the facing surface 20T is also formed in advance on the counter substrate 2. Therefore, the liquid crystal layer 3 has the alignment surfaces 20T and 20B from above and below.
Held by, for example, twisted orientation.

In the above-described embodiment, a three-terminal element made of a thin film transistor is used as the switching element 7, but instead of this, a two-terminal element such as a diode, a varistor and a metal-insulator-metal (MIM) element. Can be used as a switching element. When a two-terminal element is used, a plurality of pixel electrodes in a matrix, two-terminal elements, a first electrode group, etc. are provided on the pixel substrate 1 side, and a second electrode group intersecting the first electrode group is provided on the counter substrate. Provide on the 2 side.
In the above-described embodiment, the pixel electrode 6 is connected to the drain region D of the thin film transistor, and the signal line 9 is connected to the source region S. However, in reality, the liquid crystal layer 3
, The source region S and the drain region D of the thin film transistor are alternately switched in their roles.

[0017]

As described above, according to the present invention, the pixel electrode is formed on the flattening film that covers the switching elements and fills the irregularities, and the pixel electrode has a thickness of 1 mm.
It is thinned in the range of 0 nm to 60 nm. In this way, by thinning the pixel electrode located on the top layer of the pixel substrate,
The buffing generated during the rubbing process is suppressed, and the short circuit defect between the pixel electrodes is effectively prevented.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing an embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is a schematic view showing an example of a conventional liquid crystal display device.

[Explanation of symbols]

 1 Pixel Substrate 2 Counter Substrate 3 Liquid Crystal Layer 5 Counter Electrode 6 Pixel Electrode 7 Switching Element 20B Alignment Surface 20T Alignment Surface

Claims (3)

[Claims]
1. A panel structure comprising: a counter substrate having an alignment surface; a pixel substrate having the same alignment surface; and a liquid crystal layer held between the alignment surfaces, wherein the counter substrate has the alignment surface. The pixel substrate includes at least a plurality of switching elements, a planarization film that covers the switching elements to fill irregularities, and the planarization film that extends along an alignment surface. A liquid crystal display device comprising: a pixel electrode formed separately on the above and individually driven by the switching element, wherein the pixel electrode is made of a transparent conductive film thinned in a range of 10 nm to 60 nm.
2. The liquid crystal display device according to claim 1, wherein the pixel electrodes are separated from each other by an interval of 5 μm or less.
3. The liquid crystal display device according to claim 1, wherein the pixel substrate includes an alignment film that covers the pixel electrode, and the alignment film is subjected to a rubbing treatment to form an alignment surface.
JP21538595A 1995-07-31 1995-07-31 Liquid crystal display device Pending JPH0943640A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21538595A JPH0943640A (en) 1995-07-31 1995-07-31 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21538595A JPH0943640A (en) 1995-07-31 1995-07-31 Liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH0943640A true JPH0943640A (en) 1997-02-14

Family

ID=16671433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21538595A Pending JPH0943640A (en) 1995-07-31 1995-07-31 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH0943640A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7221339B2 (en) 1997-02-17 2007-05-22 Seiko Epson Corporation Display apparatus
JP2014102519A (en) * 2006-12-26 2014-06-05 Semiconductor Energy Lab Co Ltd Liquid crystal display device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7221339B2 (en) 1997-02-17 2007-05-22 Seiko Epson Corporation Display apparatus
US7253793B2 (en) 1997-02-17 2007-08-07 Seiko Epson Corporation Electro-luminiscent apparatus
US7710364B2 (en) 1997-02-17 2010-05-04 Seiko Epson Corporation Display apparatus
US7880696B2 (en) 1997-02-17 2011-02-01 Seiko Epson Corporation Display apparatus
JP2014102519A (en) * 2006-12-26 2014-06-05 Semiconductor Energy Lab Co Ltd Liquid crystal display device

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