JPH09330141A - Fault recovery processing system for dynamic reconstitution processing - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restore input/output constitution information to the state before alteration and carry on the altering process of the input/output constitution information without stopping a virtual computer system in the case of hardware fault occurrence in system operation by storing the input/output constitution information before alteration in a stand-by storage area. SOLUTION: A main storage device (MS) 3 stores a hardware control area for a program, input/output constitution information, etc., and a control program (hypervisor) for the virtual computer. An input/output processor(IOP) 6 discriminates a request to alter the input/output constitution information from the hypervisor, saves the constitution information to be actually altered in the stand-by storage area in the MS4 prior to an actual altering process, and performs the actual altering process. If a fault occurs during this input/output constitution altering process, the IOP6 restores the altered input/output constitution information on the basis of the constitution information, saved in the stand-by storage area, with an instruction for fault recovering operation from the hypervisor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dynamic reconfiguration processing method capable of changing the configuration information of an input / output device without stopping the computer system, and executing the changing process of the input / output configuration information during system operation. The present invention relates to a virtual computer system suitable for recovering the input / output configuration information to the state before the change and continuing the process of changing the input / output configuration information without stopping the virtual computer system when a hardware failure occurs.

[0002]

2. Description of the Related Art In recent years, in the new trend of information systems such as network function expansion and speed increase, workstation / personal computer performance improvement, end user department processing increase, and distributed processing technology sophistication. Therefore, the information processing system plays an important role as the central system of a company. On the other hand, the opportunities to change the configuration of the input / output device are also increasing with the increase in the amount of work handled. Therefore, there is an increasing demand for 24-hour operation, continuous operation, or maintenance during operation, and it has become an important issue to improve the operation efficiency of the information processing system.

As a countermeasure against such a demand, in a conventional information processing system, particularly in an information processing system in which hardware controls input / output path selection and queuing of input / output requests, input / output change during system operation. The operating system (hereinafter abbreviated as OS) issues an operator command for changing the input / output configuration information loaded on the main memory to the hardware, and the hardware changes the input / output configuration information. It is realized by this. However, if a hardware failure occurs during the process of changing the I / O configuration information, the information processing system is temporarily stopped and the I / O configuration information is initialized to recover the I / O configuration information. I was going.

As a known document related to this type of technique, for example, Japanese Patent Application Laid-Open No. 1-255912 can be cited.

[0005]

In the above conventional method,
When the hardware detects a failure during the process of changing the I / O configuration information, the recovery method is to suspend the information processing system, perform the initial setting process of the I / O configuration information again, and There was no choice but to read the I / O configuration information into the wear control area. Therefore, by simulating the configuration information at the time of initialization to a program (hereinafter referred to as guest OS) that operates under the control of the control program, in the virtual machine in which a plurality of guest OSs operate on the control program, the failure At the time of occurrence, there is a problem that all guest OSs on the control program are stopped at the same time.

On the other hand, the role of the information processing system in a company in recent years has become more and more important, and the influence on society by the stoppage of the information processing system is great, and the reliability in the work of changing the input / output configuration information during system operation is improved. It is important to improve.

Therefore, the present invention solves the above-mentioned conventional drawbacks, and an object of the present invention is to provide a hardware system in a computer system in which a virtual computer operates on one or a plurality of information processing devices. Even if a failure is detected during the process of changing the I / O configuration information, the hardware recovery process of the I / O configuration information performed by the hardware under the control program is performed without stopping the virtual machine. May allow the modification process to continue.

[0008]

In order to achieve the above object, in the virtual computer system of the present invention, a hardware has a spare storage area for storing information indicating the contents of change of input / output configuration information in a main storage device. Means for storing the input / output configuration information before the change in the spare storage area, and the main memory in response to a request from the control program when a failure occurs during the process of changing the input / output configuration information. An instruction is newly set to change the input / output configuration information on the device to the hardware, and when the hardware receives the instruction from the control program, the instruction is input based on the information indicating the changed content stored in the spare storage area. The means for recovering the output configuration information to the state before the change and the control program continue the change processing of the input / output configuration information based on the processing report contents of the instruction from the hardware. It is characterized in further comprising a means for determining Luke. According to the present invention, when the operator changes the input / output configuration information assigned to each guest OS during operation of the virtual computer system, the hardware accepts a request from the control program and changes the input / output configuration information. In the process of performing, the information indicating the changed contents is stored in the spare storage area in the system. Then, when a failure occurs during execution of the input / output configuration information change processing, the control program issues a new instruction newly established in the present invention.
When this command is received, the input / output configuration information on the main storage device is restored to the state before the change, based on the information indicating the changed contents stored in the spare storage area. Then, the control program determines whether to continue the process of changing the input / output configuration information after the occurrence of the failure, based on the completion report of the instruction from the hardware.

[0009]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows the configuration of the virtual computer system described in this embodiment.

The computer system of the present invention includes instruction processors 1 and 2 (hereinafter abbreviated as IP) that issue instructions such as input / output instructions, programs, hardware control areas such as input / output configuration information, and control of virtual computers. Program (hereinafter,
A main storage device 3 (hereinafter abbreviated as MS) that stores a hypervisor, a service processor 5 (hereinafter abbreviated as SVP) that mediates between an operator and a control program,
The input / output processor 6 (hereinafter referred to as IO
Abbreviated as P), a system controller 4 (hereinafter abbreviated as SC) for connecting these processors and MS, IOP
The input / output devices 100 to 109 (hereinafter abbreviated as IOD) connected to the respective channels (hereinafter abbreviated as CH) and the file device 40 connected to the SVP5.

In the virtual computer system of this embodiment, CH
The hardware mainly including the IOP executes the selection of the input / output path to the IOD via the. Therefore, the computer system powers on the system by inputting / outputting configuration information that defines the input / output configuration such as the physical connection relationship between the CH and the IOD, which is stored in the file device 40 of the SVP 5 prior to system operation. It is stored in the hardware control area, which is a specific area on the MS 3, at the time of initial setting (loading of a microprogram, etc.). The input / output configuration information is IO
It is read and used by P or IP.

FIG. 2 shows the configuration of a logical virtual computer system focusing on programs in the virtual computer system configuration of FIG. Under the control of the hypervisor 9, the IODs 100 to 109 are virtual computers A (hereinafter, LPA).
R-A) and virtual computer B (hereinafter, LPAR-
B) and is connected to the guest OS 1-7 and the guest OS 2-8. The guest OS 1-7 and the guest OS 2-8 receive the IOD 100 via the hypervisor 9.
To 109 respectively.

3 and 4 show the configuration of the virtual computer system viewed from the guest OS 1 and the guest OS 2. In the guest OS 1-7, the hypervisor 9 is the guest OS 1-7.
Connected to the IOD assigned to. This shows a state in which the hypervisor 9 allocates the hardware resources set in the MS 3 to the guest OS 1-7 and the guest OS 2-8 before starting the operation of the hypervisor 9. Conventional hardware resource allocation is performed by the hypervisor 9 according to a request from the operator via the service processor 5 when the guest OS starts operation.

FIG. 5 shows a table of input / output configuration information expanded in the main memory of FIG. The input / output configuration information is roughly divided into three tables, which are channel control information (hereinafter abbreviated as PCW), logical input / output control device information (hereinafter abbreviated as LCUW), and input / output device control information (hereinafter UCW). Abbreviated) and the like.

The PCW is set corresponding to each CH, and the number (CHNO) for identifying each CH and the CH
It has entry information such as the number of IODs (UACNT) connected to the channel, information for identifying the operation type of the CH (CHTYPE), and a validity flag (V) indicating whether the CH information is valid or invalid. When V = 1, it indicates that the entry information is valid, and when V = 0, it indicates that the entry information is invalid.

The LCUW defines one or a plurality of input / output control devices that hold input / output path information from the CH to the IOD and control a certain physical IOD, as one aggregate. The LCUW has a validity flag (V) indicating whether the entry information is valid or invalid, a unique number (LCUNO) in the system assigned by the hardware when the LCUW is stored in the MS, and is connected to the LCU. Number of IODs (UCW numbers), channel numbers (CHNO) that connect LCUs, channel registration masks (PIM) that indicate whether or not each channel number is valid, and the number of the guest OS that forms the LCU (guest OS
NO) etc. are stored. When V = 1, it indicates that the entry information is valid, and when V = 0, it indicates that the entry information is invalid.

The UCW defines specific information set for each IOD. A validity flag (V) indicating whether the entry information is valid or invalid, a device number (DEVNO) by which the operator identifies the IOD in the system,
A unique I / O device number (UCW) assigned in the system when the hardware stores the IOD information in the MS3.
NO), the number of the LCU to which the IOD is connected (LCU
NO), a channel registration mask (PIM), PI that designates, among the channels connecting the LCU that controls the IOD, the channels that can access the IOD in bit correspondence.
A channel availability mask (PAM) that specifies whether or not the channel specified by M can be used, in bit correspondence, and when the IOD is actually accessed using the channel, the I / O device is accessed via that channel An operable mask (POM) or the like indicating whether or not it is possible is stored.

FIG. 6 shows a control table of the spare storage area stored on the MS 3, which is saved when the input / output configuration information change processing described in FIG. 5 is performed. The spare storage area is composed of information of three areas as in FIG. 5, and includes channel control information save information (hereinafter abbreviated as APCW), logical input / output control device save information (hereinafter abbreviated as ALCUW), and input / output. It consists of device evacuation information (hereinafter abbreviated as AUCW). The information of APCW, ALCUW, and AUCW is I
When the input / output configuration information change processing of the OP is started, the entry information shown in FIG. 5 that is actually changed is saved.

Next, referring to FIG. 7 and FIG. 8, the outline of the processing of the failure occurrence operation instruction to the IOP by the hypervisor at the time of the IOP failure occurrence report will be described. FIG. 8 is a flowchart of the input / output configuration changing process in the hypervisor according to the embodiment of the present invention, and FIG. 7 is an instruction format showing a failure recovery process operation from the hypervisor.

As shown in FIG. 8, the hypervisor is an OS.
It constantly monitors whether or not there is a request to change the input / output configuration information from the hypervisor (step 8-1). When the input / output configuration change request from the hypervisor is recognized, the contradiction detection counter held by the hypervisor is cleared (step). 8-
2). The contradiction detection counter is for making a determination when an abnormal termination report is sent to the OS when the failure recovery processing is instructed a specific number of times. Then, the input / output configuration change request from the OS is simulated and the hardware is instructed of the input / output configuration change request (step 8-
3). After that, the hypervisor enters a waiting state for the end report from the IOP (step 8-4). When the IOP recognizes the normal end report of the I / O configuration change, it reports the normal end of the I / O configuration change process to the OS (step 8-11). When the failure report is detected from the IOP (step 8-5) or the abnormal termination report is recognized (step 8-6), it is determined whether or not the contradiction detection counter matches a specific number set in advance by the system. (Step 8-7), if the number of times matches the specified number of times, the OS
It is reported to the user that the input / output configuration cannot be changed (step 8-12). When the contradiction detection counter does not match the specific number of times, the contradiction detection counter is counted up (step 8-8), and the failure recovery operation instruction command is issued to the IOP (step 8-9).
The state of waiting for the completion report from the IOP is entered again. As shown in FIG. 7, the format of the instruction word (ECSC instruction) of the failure recovery instruction of the input / output configuration information issued by the hypervisor is a privileged mode instruction in the RRE format with the instruction code x (B25F),
That is, the instruction can be used only by the OS. The operand uses a general-purpose register, and the general-purpose register number of the first operand is shown by bits 24-27. The content of the first operand (R1) indicates an address on the MS3 called an instruction control table (hereinafter, abbreviated as SCT) for performing communication between the hypervisor 9 and the IOP6. The SCT has two formats: an operation request table (hereinafter abbreviated as SCTREQ) indicating the content of the operation instruction from the hypervisor 9 to the IOP 6 and an operation response table (hereinafter abbreviated as SCTRSP) from the IOP 6 to the hypervisor 9. Composed. The format of SCTREQ is the size of the SCTREQ (LNG1) and the operation code (COM
MAND) and the like. For example, in this embodiment,
LNG1 is fixed at x (0010), COMMAN
In this embodiment, D stores x (FF3D) when instructing the IOP failure recovery processing operation. SCTR
The SP format is the size of the SCTRSP (LNG
2), the reason code (R
C) and additional information when the operation is completed (AINF
O) etc. For example, in this embodiment, LNG
2 is fixed to x (0008), RC is x (000
1) indicates normal termination, and other than x (0001) indicates the above termination.

When the failure recovery process report from the IOP 6 is a normal end report (step 8-10), the input / output configuration information change process is activated again for the hardware (step 8-3). . At this time, the contradiction detection counter held by the hypervisor is not cleared. Therefore, the number of times the failure recovery process and the activation of the input / output configuration information are repeated is counted by the contradiction detection counter, and when the number of times the process is repeated matches the specific number set in the system, the OS is notified. And reports that the input / output configuration information cannot be changed (step 8-
12).

Next, with reference to FIG. 9, an input / output configuration changing process in the IOP in response to a failure recovery operation instruction from the hypervisor to the IOP, showing an embodiment of the present invention, will be described. Further, FIG. 10 is a diagram in which only the input / output configuration information regarding the IODs 104 and 105 is extracted from FIG. 3, and corresponds to the configuration of FIG. Below, IOD 104, 105
An embodiment of the present invention will be described based on an example of input / output configuration information change processing in the case of deleting.

As shown in FIG. 9, the IOP 6 constantly monitors whether there is a request for changing the input / output configuration information from the hypervisor 9 (step 9-1), and the IP 1 or 2 executes the changing process of the input / output configuration information. Upon activation, the IOP 6 identifies a request for changing the input / output configuration information from the hypervisor 9. Actually, the IP1 or 2 is connected to the IO via the sub-channel which is a communication means between the IP1 and 2 and the IOP6.
When activated to P6, the IOP 6 discriminates a general input / output instruction or an input / output configuration change instruction based on the subchannel information, but this processing will not be described in this embodiment. Subsequently, the IOP 6 determines whether the request is a change request of the input / output configuration information or a failure recovery processing request of the input / output configuration information (step 9).
-2), in the case of a request to change the input / output configuration information, PCW information (here, PCW0), LCUW (here, LCUW0), UCW, which is the configuration information to be subjected to the change processing prior to the actual change processing. (Here UCW0 and U
CW 1) is recognized and the input / output configuration information change processing is started. Here, it is checked whether the configuration information can be changed before the change processing (step 9-
3) If the input / output configuration information cannot be changed,
An abnormal end report is sent to the hypervisor (step 9-15). In the actual change processing, the related input / output configuration information cannot be changed at the same time, and each information is changed sequentially. First, IOP6 has UCW0 and UC
Recognizing that W1 must be deleted, UCW
Is updated (step 9-4). And FIG.
Based on the UCW information of the above, the data is saved to the spare storage area (step 9-5). First, V of the head entry of the AUCW control area is set to "1" and the count is set to "1". Then, V is set to "1" as the entry information of AUCW0,
Guest OSNO is '1', DEVNO is '104', U
CWNO = '0', LCUNO = '0', PIM = '1'
1,000,000 ', PAM is '11, 000,000', P
Set the OM to '11111111'. Next, add "1" to the count value and set the count to "2",
As the entry information of AUCW1, V is "1", guest OSNO is "1", DEVNO is "105", UCWN
O is' 1 ', LCUNO is'0', PIM is' 1100.
0000 ', PAM is'11000000', POM
Is set to '11111111'. And the actual U
CW information UCW0 and UCW1 are deleted. Subsequently, the LCUW and PCW information is performed based on the information of FIG. 10 as in the save processing to the preliminary storage area, and the actual change processing is performed (steps 9-7 and 9-10). During the process of changing the input / output configuration, the IOP monitors whether a failure has occurred (step 9-6,
9-9 and 9-12), when a failure occurs, the failure occurrence is reported to the hypervisor (step 9-14). If no failure has occurred and the input / output information change processing has ended normally, a normal end report is sent to the hypervisor (step 9-13). Then I
When the OP recognizes the failure recovery operation command from the hypervisor, M is changed in the previous input / output configuration information change processing.
Based on the configuration information saved in the spare storage area on S, the UCW information, the LCUW information, and the PCW information that have been changed are restored to the information shown in FIG. 10 (step 9-1).
6). First, the IOP sequentially reads the AUCW, ALCUW, and APCW information from the information stored in the spare storage area, and determines whether V of each head entry is "1". In the case of "0", it is recognized that the recovery process for the information is not necessary, and another spare storage area is read. When V of the first entry is "1", the value of the counter is read, the number of valid entries in the spare storage area is recognized, the number of entries matching the counter is read, and the changed input / output configuration information is read. Recover. Then, when the information in all the spare storage areas has been recovered, a normal termination report is sent to the hypervisor (step 9).
-13). If the recovery process cannot be completed normally, an abnormal end report is sent to the hypervisor (step 9-15).

Although the present invention has been specifically described with reference to the embodiments, the present invention is not limited to the above embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention.

[0026]

According to the present invention, the information before the change of the input / output configuration information is stored in the spare storage area in the system before the hardware changes the input / output configuration information. Then, when a failure occurs during the process of changing the input / output configuration, the input / output configuration change is recovered based on the information before the change stored in the spare storage area. Therefore, in order to recover the I / O configuration information, it is not necessary to initialize the system again and load the I / O configuration information into the main memory, and it is not necessary to stop the system, improving the high performance of the computer system. Has the effect of

[Brief description of drawings]

FIG. 1 is a configuration diagram of a virtual computer system according to an embodiment.

FIG. 2 is a configuration diagram of a logical virtual computer system focusing on a program in the configuration of FIG.

FIG. 3 is a configuration diagram of a virtual computer system viewed from a guest OS 1.

FIG. 4 is a configuration diagram of a virtual computer system viewed from a guest OS 2.

5 is a diagram showing a table of input / output configuration information expanded in the main storage device of FIG.

6 is a diagram showing a control table of a spare storage area stored in the main storage device of FIG. 1. FIG.

FIG. 7 is a diagram showing an instruction format showing a failure recovery operation from a hypervisor.

FIG. 8 is a flowchart of an input / output configuration changing process in the hypervisor according to the embodiment of the present invention.

FIG. 9 is a flowchart of an input / output configuration process in the input / output processor showing the embodiment of the present invention.

10 is a diagram showing an information table regarding a specific input / output device in the input / output configuration information of FIG.

FIG. 11 is a diagram showing a control table of a spare storage area stored in the main storage device of FIG. 1 in the input / output configuration change processing in this embodiment.

[Explanation of symbols]

1-2: instruction processor, 3 ... main memory, 4 ...
System control device, 5 ... Service processor, 6 ... Input / output processor, 7 ... Guest OS1, 8 ... Guest OS2,
9 ... Hypervisor, 40 ... File device, 1
00-109 input / output devices.

Claims (1)

[Claims] 1. One or more instruction processors (IP), a main memory (MS), and one or more input / output processors (I).
OP), a system controller (SC) that couples these processors to the main memory, a plurality of input / output channels (CH) included in the input / output processor, and the input / output controller (IOC). A processing device including one or more input / output devices (IODs), an input / output channel, an input / output control device, and a service processor (SVP) that holds input / output configuration definition information that defines the input / output device. In a virtual computer system having a function of changing the input / output configuration information during operation of the virtual computer system under the control of the control program on the processing device, the control information of the input / output configuration information A spare storage area for storing the input / output configuration information in the main storage device, and the input / output configuration information is stored in the spare storage area in the process of dynamically reconfiguring the input / output configuration information. Means for storing, and when the control program receives a failure occurrence report from the input / output processor during execution of change processing of the input / output configuration information, the control program issues an operation command for recovery processing to the input / output processor. Issuing means, and when the recovery processing operation command is issued from the control program to the input / output processor, the input / output configuration information is set to the state before the change based on the information indicating the change contents stored in the spare storage area. A failure recovery processing method comprising means for recovering, and means for continuing the input / output configuration change processing by the control program after recovery processing of the input / output configuration information by the input / output processor. .