JPH09321162A - Package for semiconductor circuit device - Google Patents

Package for semiconductor circuit device

Info

Publication number
JPH09321162A
JPH09321162A JP8133167A JP13316796A JPH09321162A JP H09321162 A JPH09321162 A JP H09321162A JP 8133167 A JP8133167 A JP 8133167A JP 13316796 A JP13316796 A JP 13316796A JP H09321162 A JPH09321162 A JP H09321162A
Authority
JP
Japan
Prior art keywords
circuit board
package
gold
aluminum alloy
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8133167A
Other languages
Japanese (ja)
Inventor
Hiroyuki Goto
弘之 後藤
Bunro Yamamoto
文朗 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP8133167A priority Critical patent/JPH09321162A/en
Publication of JPH09321162A publication Critical patent/JPH09321162A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

PROBLEM TO BE SOLVED: To provide a package for a semiconductor circuit device which is small in size and low in weight and has excellent damp-proof property, heat resistance property and electro-magnetic shield property. SOLUTION: A ceramic circuit board 13 is connected with a second aperture of a gold-plated aluminum alloy container 11 having a first aperture and the second aperture, by an Au-Ge solder 15 via a buffer ring 12 of gold-plated copper. A connection part of the ceramic circuit board 13 with the buffer ring 12 is gold-plated, and a wiring pattern is formed on a semiconductor element mounting surface. A ring 14 made of gold-plated stainless steel is connected with the first aperture of the aluminum alloy container 11 by the Au-Ge solder 15. Then, a semiconductor element 16 is fixed to the wiring pattern portion on the circuit board 13 by a junction member 17. A bonding terminal of the semiconductor element 16 and the wiring pattern on the circuit board 13 are connected with each other by a bonding wire 19. Finally, a cover 18 made of gold-plated stainless steel is mounted on the ring 14 so as to cover the aperture, and joined by welding using a seam welding machine.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、半導体回路装置用
パッケージに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor circuit device package.

【0002】[0002]

【従来の技術】航空機に搭載する電子機器は小型軽量で
耐湿性、耐熱性等に優れ、高信頼性であることが要求さ
れる。そのため半導体回路装置用パッケージ、特にハイ
ブリッド半導体およびマルチチップ半導体回路装置用パ
ッケージに対してアルミ合金を使用する場合がある。
2. Description of the Related Art Electronic equipment mounted on an aircraft is required to be small and lightweight, have excellent moisture resistance and heat resistance, and have high reliability. Therefore, an aluminum alloy may be used for a semiconductor circuit device package, particularly for a hybrid semiconductor and a multi-chip semiconductor circuit device package.

【0003】従来のこの種の半導体回路装置用パッケー
ジを概略断面図で図2に示す。
FIG. 2 is a schematic sectional view of a conventional package for a semiconductor circuit device of this type.

【0004】図2を参照して説明すると、容器21は、
軽量であること、熱伝導性がよいことを考慮してアルミ
合金を使用する。半導体素子23はアルミ合金と熱膨張
係数の差があり、種々の問題がある。そこで一般には、
半導体素子23と熱膨張係数が近く、熱伝導性のよいキ
ャリアプレート22に半導体素子23をはんだ等の接合
材24により固定し、このキャリアプレート22を容器
21にねじで固定する場合が多い。また、キャリアプレ
ート22には半導体素子23に信号を授受する配線パタ
ーンを設けた回路基板25が同様に固定されており、半
導体素子23とボンディングワイヤ27にて接続され
る。容器21に蓋26を載せ、Au−Snはんだ等を使
用したはんだ接合かレーザ溶接等により接合する。な
お、はんだ接合を行う場合は容器21にNiめっきやA
uめっき等のはんだ接合に適しためっきが必要である。
Referring to FIG. 2, the container 21 is
Aluminum alloy is used because it is lightweight and has good thermal conductivity. The semiconductor element 23 has a difference in thermal expansion coefficient from that of an aluminum alloy, and thus has various problems. So in general,
In many cases, the semiconductor element 23 is fixed to the carrier plate 22 having a thermal expansion coefficient close to that of the semiconductor element 23 and good thermal conductivity with a bonding material 24 such as solder, and the carrier plate 22 is fixed to the container 21 with screws. A circuit board 25 having a wiring pattern for transmitting and receiving signals to and from the semiconductor element 23 is similarly fixed to the carrier plate 22, and is connected to the semiconductor element 23 by a bonding wire 27. The lid 26 is placed on the container 21 and joined by solder joining using Au—Sn solder or the like or laser welding. When soldering is performed, the container 21 is plated with Ni or A
Plating suitable for solder joining such as u plating is required.

【0005】[0005]

【発明が解決しようとする課題】従来技術では、キャリ
アプレート22をパッケージ内にねじで固定するため、
キャリアプレート22、および容器21にねじ止めスペ
ースが必要である。又、キャリアプレート22、回路基
板25、ねじ、と部品点数が多いため、小型軽量化に問
題がある。又、蓋の取り付けにおいて、はんだ付け、特
にAu−Snはんだ付けは搭載部品に熱の影響を与え、
信頼性に問題がある。レーザによる溶接は、溶接部で素
地金属が露出するため耐蝕性に問題があり、製造コスト
上も問題がある。
In the prior art, since the carrier plate 22 is fixed in the package with screws,
A screwing space is required for the carrier plate 22 and the container 21. Further, since the number of parts such as the carrier plate 22, the circuit board 25, and the screws is large, there is a problem in reducing the size and weight. Also, when mounting the lid, soldering, especially Au-Sn soldering, affects the mounted components due to heat,
There is a problem with reliability. Laser welding has a problem in corrosion resistance because the base metal is exposed at the welded portion, and also in manufacturing cost.

【0006】本発明は上記の欠点を解消するもので、小
型軽量、高信頼性で量産性の高い半導体用パッケージを
提供することを目的とする。
The present invention solves the above-mentioned drawbacks, and an object of the present invention is to provide a semiconductor package which is small in size, lightweight, highly reliable and highly producible.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
本発明は、第一の開口部と第二の開口部とを有するアル
ミ合金容器と、前記第一の開口部に接合され、シーム溶
接可能な材料から成るリングと、半導体素子を載せ、こ
の半導体素子に信号を授受する配線パターンを設けたセ
ラミック回路基板と、シーム溶接可能な材料から成る蓋
とを具備し、前記セラミック回路基板は前記第二の開口
部に緩衝材を介して接合され、前記蓋は前記第一の開口
部の前記リングに接合され、前記半導体素子を気密に封
止する気密封止構造を形成することを特徴とする半導体
回路装置用パッケージである。
In order to solve the above problems, the present invention provides an aluminum alloy container having a first opening and a second opening, and a seam welded to the first opening. A ring made of a possible material, a ceramic circuit board on which a semiconductor element is mounted and a wiring pattern for transmitting and receiving signals to and from the semiconductor element is provided, and a lid made of a material capable of seam welding. The lid is joined to the second opening via a cushioning material, and the lid is joined to the ring of the first opening to form an airtight sealing structure for hermetically sealing the semiconductor element. It is a package for a semiconductor circuit device.

【0008】また、アルミ合金容器は、シリコンを含む
アルミ合金から成ることを特徴とする。
Further, the aluminum alloy container is characterized by being made of an aluminum alloy containing silicon.

【0009】また、アルミ合金容器、リング、およびセ
ラミック回路基板の各々の接合部は金めっきが施してあ
り、金系はんだで接合することを特徴とする。
The aluminum alloy container, the ring, and the ceramic circuit board are jointed with gold plating, which is characterized in that they are joined with gold solder.

【0010】また、セラミック回路基板はAlN、又は
Al2 3 より成ることを特徴とする。
The ceramic circuit board is characterized by being made of AlN or Al 2 O 3 .

【0011】また、緩衝材は銅より成ることを特徴とす
る。
The buffer material is made of copper.

【0012】本発明では、半導体素子に信号を授受する
配線パターンを設けた種々の回路基板は一体化して容器
に設けてあり、半導体素子はその上に固定すればよい。
その結果、キャリアプレート、ねじ、種々の回路基板は
不要となり、部品点数を減らすことができる。さらに、
キャリアプレート、ねじ取り付けスペースは不要となる
ので小型軽量化が達成できる。
In the present invention, various circuit boards provided with a wiring pattern for transmitting and receiving signals to and from the semiconductor element are integrally provided in the container, and the semiconductor element may be fixed thereon.
As a result, the carrier plate, screws, and various circuit boards are unnecessary, and the number of parts can be reduced. further,
Since the carrier plate and the screw mounting space are not required, the size and weight can be reduced.

【0013】容器と回路基板は熱膨張係数のミスマッチ
を解消する緩衝材を介して接合されるので、回路基板は
半導体素子と熱膨張係数のマッチングがとれた材料で必
要ならば熱伝導度の高い材料を使用できる。さらに容器
はSiを含むアルミ合金を使用することで回路基板やリ
ングとの熱膨張係数の差を減らすことができる。
Since the container and the circuit board are bonded together through a buffer material that eliminates the mismatch of the thermal expansion coefficients, the circuit board is made of a material having a matching thermal expansion coefficient with the semiconductor element and has a high thermal conductivity if necessary. Materials can be used. Further, by using an aluminum alloy containing Si for the container, it is possible to reduce the difference in thermal expansion coefficient between the container and the circuit board or the ring.

【0014】シーム溶接可能な材料から成るリングを容
器に設けているので、蓋の取り付けはシーム溶接で行う
ことができ、搭載部品に熱の影響を与えにくく、信頼性
が高く量産性も高い。
Since the container is provided with the ring made of a seam-weldable material, the lid can be attached by seam welding, and the mounted parts are less likely to be affected by heat, and the reliability and mass productivity are high.

【0015】また、リング、回路基板はAu系はんだで
同時に容器に接合することができ生産性を損なわない。
Further, the ring and the circuit board can be simultaneously joined to the container with Au-based solder without impairing the productivity.

【0016】以上により小型軽量、信頼性が高く量産性
の高い半導体回路装置用パッケージを実現できる。
As described above, it is possible to realize a semiconductor circuit device package which is compact, lightweight, highly reliable, and highly producible.

【0017】[0017]

【発明の実施の形態】本発明の実施の形態を図1に概略
断面図で示す。
BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention is shown in a schematic sectional view in FIG.

【0018】第一の開口部と第二の開口部とを有する、
金めっきを施したアルミ合金容器11の第二の開口部
に、金めっきした銅の緩衝用リング12を介して、Al
N又はAl2 3 から成るセラミック回路基板13を、
Au−Geはんだ15で接続する。アルミ合金容器11
は、シリコン20重量%以上を含むアルミ合金から成る
ものを使用する。セラミック回路基板13の緩衝用リン
グ12との接続部には金めっきが施され、半導体素子搭
載面には配線パターンが形成されている。アルミ合金容
器11の第一の開口部には金めっきを施したステンレス
鋼から成るリング14をAu−Geはんだ15で接続す
る。セラミック回路基板13とリング14とをアルミ合
金容器11に接続するのは同時に行い、セラミック回路
基板13を底部とした容器を形成する。
Having a first opening and a second opening,
Al is inserted into the second opening of the aluminum-plated aluminum alloy container 11 via the gold-plated copper buffer ring 12.
A ceramic circuit board 13 made of N or Al 2 O 3 ,
Connection is made with Au-Ge solder 15. Aluminum alloy container 11
Is an aluminum alloy containing 20% by weight or more of silicon. The connection portion of the ceramic circuit board 13 with the buffer ring 12 is plated with gold, and a wiring pattern is formed on the semiconductor element mounting surface. A ring 14 made of gold-plated stainless steel is connected to the first opening of the aluminum alloy container 11 with Au—Ge solder 15. The ceramic circuit board 13 and the ring 14 are simultaneously connected to the aluminum alloy container 11 to form a container having the ceramic circuit board 13 at the bottom.

【0019】その後、半導体素子16をセラミック回路
基板13上の配線パターン部分(図示せず)にAu−S
nはんだ又は接着剤から成る接合材17で固定する。半
導体素子16のボンディング端子とセラミック回路基板
13上の配線パターンとはボンディングワイヤ19で接
続する。最後に金めっきを施したステンレス鋼から成る
蓋18をリング14の上に開口部を気密に塞ぐように載
せ、シーム溶接機により溶接接合し、気密封止構造のパ
ッケージを完成する。
Thereafter, the semiconductor element 16 is formed on the wiring pattern portion (not shown) on the ceramic circuit board 13 by Au-S.
It is fixed with a bonding material 17 made of n solder or an adhesive. The bonding terminals of the semiconductor element 16 and the wiring pattern on the ceramic circuit board 13 are connected by the bonding wires 19. Finally, a lid 18 made of stainless steel plated with gold is placed on the ring 14 so as to hermetically close the opening, and welded and joined by a seam welding machine to complete a package having a hermetically sealed structure.

【0020】アルミ合金容器として、シリコン20重量
%以上を含むアルミ合金を使用するのは、剛性上の問題
と、熱膨張係数をステンレスに合わせることの二点から
である。
The use of an aluminum alloy containing 20% by weight or more of silicon as the aluminum alloy container is due to two problems: the problem of rigidity and the matching of the coefficient of thermal expansion with that of stainless steel.

【0021】回路基板としてセラミックを使用するの
は、熱膨張係数が半導体チップに近いこと、絶縁体であ
って回路をパターニングするのが容易であること、強
度、気密性などの点からである。セラミックとしては、
誘電率などの点からAlNやAl2 3 が好適である。
Ceramics are used as the circuit board because of its thermal expansion coefficient close to that of a semiconductor chip, its ease of patterning a circuit as an insulator, its strength and hermeticity. As a ceramic,
AlN and Al 2 O 3 are preferable in terms of dielectric constant.

【0022】[0022]

【発明の効果】本発明によれば、小型軽量で、信頼性の
高い半導体回路装置用パッケージを提供できる。
According to the present invention, it is possible to provide a compact and lightweight package for a semiconductor circuit device having high reliability.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一例を示す断面図である。FIG. 1 is a sectional view showing an example of the present invention.

【図2】従来例を示す断面図である。FIG. 2 is a sectional view showing a conventional example.

【符号の説明】[Explanation of symbols]

11…アルミ合金容器 12…緩衝用リング 13…セラミック回路基板 14…リング 15…Au−Geはんだ 16…半導体素子 17…接合材 18…蓋 19…ボンディングワイヤ 21…容器 22…キャリアプレート 23…半導体素子 24…接合材 25…回路基板 26…蓋 27…ボンディングワイヤ 11 ... Aluminum alloy container 12 ... Buffer ring 13 ... Ceramic circuit board 14 ... Ring 15 ... Au-Ge solder 16 ... Semiconductor element 17 ... Bonding material 18 ... Lid 19 ... Bonding wire 21 ... Container 22 ... Carrier plate 23 ... Semiconductor element 24 ... Bonding material 25 ... Circuit board 26 ... Lid 27 ... Bonding wire

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 第一の開口部と第二の開口部とを有する
アルミ合金容器と、前記第一の開口部に接合され、シー
ム溶接可能な材料から成るリングと、半導体素子を載
せ、この半導体素子に信号を授受する配線パターンを設
けたセラミック回路基板と、シーム溶接可能な材料から
成る蓋とを具備し、前記セラミック回路基板は前記第二
の開口部に緩衝材を介して接合され、前記蓋は前記第一
の開口部の前記リングに接合され、前記半導体素子を気
密に封止する気密封止構造を形成することを特徴とする
半導体回路装置用パッケージ。
1. An aluminum alloy container having a first opening and a second opening, a ring made of a seam-weldable material joined to the first opening, and a semiconductor element are mounted on the container. A ceramic circuit board provided with a wiring pattern for transmitting and receiving signals to and from a semiconductor element; and a lid made of a seam-weldable material, wherein the ceramic circuit board is joined to the second opening via a cushioning material, The package for a semiconductor circuit device, wherein the lid is joined to the ring of the first opening to form an airtight sealing structure that hermetically seals the semiconductor element.
【請求項2】 アルミ合金容器は、シリコンを含むアル
ミ合金から成ることを特徴とする請求項1記載の半導体
回路装置用パッケージ。
2. The package for a semiconductor circuit device according to claim 1, wherein the aluminum alloy container is made of an aluminum alloy containing silicon.
【請求項3】 アルミ合金容器、リング、およびセラミ
ック回路基板の各々の接合部は金めっきが施してあり、
金系はんだで接合することを特徴とする請求項1記載の
半導体回路装置用パッケージ。
3. The aluminum alloy container, the ring, and the joint portion of the ceramic circuit board are gold-plated,
The package for a semiconductor circuit device according to claim 1, wherein the package is joined with a gold solder.
【請求項4】 セラミック回路基板はAlNより成るこ
とを特徴とする請求項1記載の半導体回路装置用パッケ
ージ。
4. The package for a semiconductor circuit device according to claim 1, wherein the ceramic circuit board is made of AlN.
【請求項5】 セラミック回路基板はAl2 3 より成
ることを特徴とする請求項1記載の半導体回路装置用パ
ッケージ。
5. The package for a semiconductor circuit device according to claim 1, wherein the ceramic circuit board is made of Al 2 O 3 .
【請求項6】 緩衝材は銅より成ることを特徴とする請
求項1記載の半導体回路装置用パッケージ。
6. The package for a semiconductor circuit device according to claim 1, wherein the buffer material is made of copper.
JP8133167A 1996-05-28 1996-05-28 Package for semiconductor circuit device Pending JPH09321162A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8133167A JPH09321162A (en) 1996-05-28 1996-05-28 Package for semiconductor circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8133167A JPH09321162A (en) 1996-05-28 1996-05-28 Package for semiconductor circuit device

Publications (1)

Publication Number Publication Date
JPH09321162A true JPH09321162A (en) 1997-12-12

Family

ID=15098256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8133167A Pending JPH09321162A (en) 1996-05-28 1996-05-28 Package for semiconductor circuit device

Country Status (1)

Country Link
JP (1) JPH09321162A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016111240A (en) * 2014-12-08 2016-06-20 株式会社フジクラ Housing for accommodating semiconductor device, semiconductor module, and method for manufacturing housing for accommodating semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016111240A (en) * 2014-12-08 2016-06-20 株式会社フジクラ Housing for accommodating semiconductor device, semiconductor module, and method for manufacturing housing for accommodating semiconductor device

Similar Documents

Publication Publication Date Title
US4855869A (en) Chip carrier
JP4058172B2 (en) Optical semiconductor element storage package
JP3816821B2 (en) High frequency power module substrate and manufacturing method thereof
US5200640A (en) Hermetic package having covers and a base providing for direct electrical connection
JPH09307122A (en) Photocell module
JPH09321162A (en) Package for semiconductor circuit device
JPH04114455A (en) Semiconductor device and mounting structure thereof
JPH0974158A (en) Package for high-power hybrid integrated circuit
USRE29325E (en) Hermetic power package
JPH0196952A (en) Hermetically sealed chip carrier
JP3410041B2 (en) Hybrid module
JP2002184890A (en) Surface mounting semiconductor device
JPH04293311A (en) Surface acoustic wave device
JP2006013241A (en) Semiconductor device and package therefor
JPH03248449A (en) Semiconductor device with heat sink
KR100264644B1 (en) Module package
JPH05347324A (en) Semiconductor package
JPS62247555A (en) Pin grid array package substrate
JP2000133911A (en) Electronic component mounting device
JPH10321746A (en) Electronic component packaging structure
JPH085563Y2 (en) Metal package for high power hybrid IC
JPH0710495Y2 (en) Semiconductor device
JP2570889B2 (en) LSI case
JPH04267360A (en) Semiconductor device
JP2006041272A (en) Semiconductor device and package therefor